2024-01-31 13:38:59

by Jisheng Zhang

Subject: [PATCH v3 0/6] riscv: dts: starfive: add Milkv Mars board device tree

The Milkv Mars is a development board based on the Starfive JH7110 SoC.
The board features:

- JH7110 SoC
- 1/2/4/8 GiB LPDDR4 DRAM
- AXP15060 PMIC
- 40 pin GPIO header
- 3x USB 3.0 host port
- 1x USB 2.0 host port
- 1x M.2 E-Key
- 1x eMMC slot
- 1x MicroSD slot
- 1x QSPI Flash
- 1x 1Gbps Ethernet port
- 1x HDMI port
- 1x 2-lane DSI and 1x 4-lane DSI
- 1x 2-lane CSI

patch1 adds 'cpus' label
patch2 adds "milkv,mars" board dt-binding
patch3 ~ patch4 adopt Krzysztof's suggestions to DT node names
patch5 introduces a board common dtsi for visionfive2 and mars
patch3 adds the mars board dts file describing the currently supported
features:
Namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.

Since v2:
- add a common board file which can be used by vf2 and mars

Since v1:
- add two new patches which add "cpus" label and board dt-binding
- adopt Krzysztof's suggestions, thanks

Jisheng Zhang (6):
riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi
dt-bindings: riscv: starfive: add Milkv Mars board
riscv: dts: starfive: visionfive 2: update sound and codec dt node
name
riscv: dts: starfive: visionfive 2: use cpus label for timebase freq
riscv: dts: starfive: introduce a common board dtsi for jh7110 based
boards
riscv: dts: starfive: add Milkv Mars board device tree

.../devicetree/bindings/riscv/starfive.yaml | 1 +
arch/riscv/boot/dts/starfive/Makefile | 1 +
arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +-
.../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +
.../jh7110-starfive-visionfive-2.dtsi | 600 +----------------
.../jh7110-visionfive2-mars-common.dtsi | 617 ++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 +-
7 files changed, 657 insertions(+), 601 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
create mode 100644 arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi

--
2.43.0

2024-01-31 13:39:17

by Jisheng Zhang

Subject: [PATCH v3 1/6] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi

Add the 'cpus' label so that we can reference it in board dts files.

Signed-off-by: Jisheng Zhang <[email protected]>
---
arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +-
arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index c216aaecac53..b2d36685db5b 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -13,7 +13,7 @@ / {
#address-cells = <2>;
#size-cells = <2>;

- cpus {
+ cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 45213cdf50dc..5a6ff90685e5 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -15,7 +15,7 @@ / {
#address-cells = <2>;
#size-cells = <2>;

- cpus {
+ cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;

--
2.43.0

2024-01-31 13:39:53

by Jisheng Zhang

Subject: [PATCH v3 3/6] riscv: dts: starfive: visionfive 2: update sound and codec dt node name

Use "audio-codec" as the codec dt node name, and "sound" as the simple
audio card dt name.

Suggested-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Jisheng Zhang <[email protected]>
---
.../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index b89e9791efa7..11db93966dd6 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -41,12 +41,12 @@ gpio-restart {
priority = <224>;
};

- pwmdac_codec: pwmdac-codec {
+ pwmdac_codec: audio-codec {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};

- sound-pwmdac {
+ sound {
compatible = "simple-audio-card";
simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
#address-cells = <1>;
--
2.43.0

2024-01-31 13:40:11

by Jisheng Zhang

Subject: [PATCH v3 4/6] riscv: dts: starfive: visionfive 2: use cpus label for timebase freq

As pointed out by Krzysztof "Board should not bring new CPU nodes.
Override by label instead."

Suggested-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Jisheng Zhang <[email protected]>
---
.../boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 11db93966dd6..974851a764e1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -26,10 +26,6 @@ chosen {
stdout-path = "serial0:115200n8";
};

- cpus {
- timebase-frequency = <4000000>;
- };
-
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0x1 0x0>;
@@ -69,6 +65,10 @@ codec {
};
};

+&cpus {
+ timebase-frequency = <4000000>;
+};
+
&dvp_clk {
clock-frequency = <74250000>;
};
--
2.43.0

2024-01-31 13:40:30

by Jisheng Zhang

Subject: [PATCH v3 5/6] riscv: dts: starfive: introduce a common board dtsi for jh7110 based boards

This is to prepare for Milkv Mars board dts support in the following
patch. Let's factored out common part into .dtsi.

Signed-off-by: Jisheng Zhang <[email protected]>
---
.../jh7110-starfive-visionfive-2.dtsi | 600 +----------------
.../jh7110-visionfive2-mars-common.dtsi | 617 ++++++++++++++++++
2 files changed, 618 insertions(+), 599 deletions(-)
create mode 100644 arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 974851a764e1..76a2b061a421 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -5,82 +5,14 @@
*/

/dts-v1/;
-#include "jh7110.dtsi"
-#include "jh7110-pinfunc.h"
-#include <dt-bindings/gpio/gpio.h>
+#include "jh7110-visionfive2-mars-common.dtsi"

/ {
aliases {
- ethernet0 = &gmac0;
ethernet1 = &gmac1;
- i2c0 = &i2c0;
- i2c2 = &i2c2;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- mmc0 = &mmc0;
- mmc1 = &mmc1;
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0x1 0x0>;
- };
-
- gpio-restart {
- compatible = "gpio-restart";
- gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
- priority = <224>;
- };
-
- pwmdac_codec: audio-codec {
- compatible = "linux,spdif-dit";
- #sound-dai-cells = <0>;
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
- #address-cells = <1>;
- #size-cells = <0>;
-
- simple-audio-card,dai-link@0 {
- reg = <0>;
- format = "left_j";
- bitclock-master = <&sndcpu0>;
- frame-master = <&sndcpu0>;
-
- sndcpu0: cpu {
- sound-dai = <&pwmdac>;
- };
-
- codec {
- sound-dai = <&pwmdac_codec>;
- };
- };
};
};

-&cpus {
- timebase-frequency = <4000000>;
-};
-
-&dvp_clk {
- clock-frequency = <74250000>;
-};
-
-&gmac0_rgmii_rxin {
- clock-frequency = <125000000>;
-};
-
-&gmac0_rmii_refin {
- clock-frequency = <50000000>;
-};
-
&gmac1_rgmii_rxin {
clock-frequency = <125000000>;
};
@@ -89,58 +21,6 @@ &gmac1_rmii_refin {
clock-frequency = <50000000>;
};

-&hdmitx0_pixelclk {
- clock-frequency = <297000000>;
-};
-
-&i2srx_bclk_ext {
- clock-frequency = <12288000>;
-};
-
-&i2srx_lrck_ext {
- clock-frequency = <192000>;
-};
-
-&i2stx_bclk_ext {
- clock-frequency = <12288000>;
-};
-
-&i2stx_lrck_ext {
- clock-frequency = <192000>;
-};
-
-&mclk_ext {
- clock-frequency = <12288000>;
-};
-
-&osc {
- clock-frequency = <24000000>;
-};
-
-&rtc_osc {
- clock-frequency = <32768>;
-};
-
-&tdm_ext {
- clock-frequency = <49152000>;
-};
-
-&gmac0 {
- phy-handle = <&phy0>;
- phy-mode = "rgmii-id";
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
- };
-};
-
&gmac1 {
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
@@ -157,488 +37,10 @@ phy1: ethernet-phy@1 {
};
};

-&i2c0 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <510>;
- i2c-scl-falling-time-ns = <510>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
-};
-
-&i2c2 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <510>;
- i2c-scl-falling-time-ns = <510>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
- status = "okay";
-};
-
-&i2c5 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <510>;
- i2c-scl-falling-time-ns = <510>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5_pins>;
- status = "okay";
-
- axp15060: pmic@36 {
- compatible = "x-powers,axp15060";
- reg = <0x36>;
- interrupts = <0>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- regulators {
- vcc_3v3: dcdc1 {
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3";
- };
-
- vdd_cpu: dcdc2 {
- regulator-always-on;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1540000>;
- regulator-name = "vdd-cpu";
- };
-
- emmc_vdd: aldo4 {
- regulator-boot-on;
- regulator-always-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "emmc_vdd";
- };
- };
- };
-};
-
-&i2c6 {
- clock-frequency = <100000>;
- i2c-sda-hold-time-ns = <300>;
- i2c-sda-falling-time-ns = <510>;
- i2c-scl-falling-time-ns = <510>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6_pins>;
- status = "okay";
-};
-
-&i2srx {
- pinctrl-names = "default";
- pinctrl-0 = <&i2srx_pins>;
- status = "okay";
-};
-
-&i2stx0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mclk_ext_pins>;
- status = "okay";
-};
-
-&i2stx1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2stx1_pins>;
- status = "okay";
-};
-
&mmc0 {
- max-frequency = <100000000>;
- assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
- assigned-clock-rates = <50000000>;
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
non-removable;
- cap-mmc-hw-reset;
- post-power-on-delay-ms = <200>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&emmc_vdd>;
- status = "okay";
};

&mmc1 {
- max-frequency = <100000000>;
- assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
- assigned-clock-rates = <50000000>;
- bus-width = <4>;
- no-sdio;
- no-mmc;
broken-cd;
- cap-sd-highspeed;
- post-power-on-delay-ms = <200>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- status = "okay";
-};
-
-&pwmdac {
- pinctrl-names = "default";
- pinctrl-0 = <&pwmdac_pins>;
- status = "okay";
-};
-
-&qspi {
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- nor_flash: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- cdns,read-delay = <5>;
- spi-max-frequency = <12000000>;
- cdns,tshsl-ns = <1>;
- cdns,tsd2d-ns = <1>;
- cdns,tchsh-ns = <1>;
- cdns,tslch-ns = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- spl@0 {
- reg = <0x0 0x80000>;
- };
- uboot-env@f0000 {
- reg = <0xf0000 0x10000>;
- };
- uboot@100000 {
- reg = <0x100000 0x400000>;
- };
- reserved-data@600000 {
- reg = <0x600000 0xa00000>;
- };
- };
- };
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins>;
- status = "okay";
-
- spi_dev0: spi@0 {
- compatible = "rohm,dh2228fv";
- reg = <0>;
- spi-max-frequency = <10000000>;
- };
-};
-
-&sysgpio {
- i2c0_pins: i2c0-0 {
- i2c-pins {
- pinmux = <GPIOMUX(57, GPOUT_LOW,
- GPOEN_SYS_I2C0_CLK,
- GPI_SYS_I2C0_CLK)>,
- <GPIOMUX(58, GPOUT_LOW,
- GPOEN_SYS_I2C0_DATA,
- GPI_SYS_I2C0_DATA)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c2_pins: i2c2-0 {
- i2c-pins {
- pinmux = <GPIOMUX(3, GPOUT_LOW,
- GPOEN_SYS_I2C2_CLK,
- GPI_SYS_I2C2_CLK)>,
- <GPIOMUX(2, GPOUT_LOW,
- GPOEN_SYS_I2C2_DATA,
- GPI_SYS_I2C2_DATA)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c5_pins: i2c5-0 {
- i2c-pins {
- pinmux = <GPIOMUX(19, GPOUT_LOW,
- GPOEN_SYS_I2C5_CLK,
- GPI_SYS_I2C5_CLK)>,
- <GPIOMUX(20, GPOUT_LOW,
- GPOEN_SYS_I2C5_DATA,
- GPI_SYS_I2C5_DATA)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2c6_pins: i2c6-0 {
- i2c-pins {
- pinmux = <GPIOMUX(16, GPOUT_LOW,
- GPOEN_SYS_I2C6_CLK,
- GPI_SYS_I2C6_CLK)>,
- <GPIOMUX(17, GPOUT_LOW,
- GPOEN_SYS_I2C6_DATA,
- GPI_SYS_I2C6_DATA)>;
- bias-disable; /* external pull-up */
- input-enable;
- input-schmitt-enable;
- };
- };
-
- i2srx_pins: i2srx-0 {
- clk-sd-pins {
- pinmux = <GPIOMUX(38, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_I2SRX_BCLK)>,
- <GPIOMUX(63, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_I2SRX_LRCK)>,
- <GPIOMUX(38, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_I2STX1_BCLK)>,
- <GPIOMUX(63, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_I2STX1_LRCK)>,
- <GPIOMUX(61, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_I2SRX_SDIN0)>;
- input-enable;
- };
- };
-
- i2stx1_pins: i2stx1-0 {
- sd-pins {
- pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-disable;
- input-disable;
- };
- };
-
- mclk_ext_pins: mclk-ext-0 {
- mclk-ext-pins {
- pinmux = <GPIOMUX(4, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_MCLK_EXT)>;
- input-enable;
- };
- };
-
- mmc0_pins: mmc0-0 {
- rst-pins {
- pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-pull-up;
- drive-strength = <12>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
-
- mmc-pins {
- pinmux = <PINMUX(64, 0)>,
- <PINMUX(65, 0)>,
- <PINMUX(66, 0)>,
- <PINMUX(67, 0)>,
- <PINMUX(68, 0)>,
- <PINMUX(69, 0)>,
- <PINMUX(70, 0)>,
- <PINMUX(71, 0)>,
- <PINMUX(72, 0)>,
- <PINMUX(73, 0)>;
- bias-pull-up;
- drive-strength = <12>;
- input-enable;
- };
- };
-
- mmc1_pins: mmc1-0 {
- clk-pins {
- pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-pull-up;
- drive-strength = <12>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
-
- mmc-pins {
- pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
- GPOEN_SYS_SDIO1_CMD,
- GPI_SYS_SDIO1_CMD)>,
- <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
- GPOEN_SYS_SDIO1_DATA0,
- GPI_SYS_SDIO1_DATA0)>,
- <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
- GPOEN_SYS_SDIO1_DATA1,
- GPI_SYS_SDIO1_DATA1)>,
- <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
- GPOEN_SYS_SDIO1_DATA2,
- GPI_SYS_SDIO1_DATA2)>,
- <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
- GPOEN_SYS_SDIO1_DATA3,
- GPI_SYS_SDIO1_DATA3)>;
- bias-pull-up;
- drive-strength = <12>;
- input-enable;
- input-schmitt-enable;
- slew-rate = <0>;
- };
- };
-
- pwmdac_pins: pwmdac-0 {
- pwmdac-pins {
- pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
- GPOEN_ENABLE,
- GPI_NONE)>,
- <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-disable;
- drive-strength = <2>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
- };
-
- spi0_pins: spi0-0 {
- mosi-pins {
- pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-disable;
- input-disable;
- input-schmitt-disable;
- };
-
- miso-pins {
- pinmux = <GPIOMUX(53, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_SPI0_RXD)>;
- bias-pull-up;
- input-enable;
- input-schmitt-enable;
- };
-
- sck-pins {
- pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
- GPOEN_ENABLE,
- GPI_SYS_SPI0_CLK)>;
- bias-disable;
- input-disable;
- input-schmitt-disable;
- };
-
- ss-pins {
- pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
- GPOEN_ENABLE,
- GPI_SYS_SPI0_FSS)>;
- bias-disable;
- input-disable;
- input-schmitt-disable;
- };
- };
-
- tdm_pins: tdm-0 {
- tx-pins {
- pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-pull-up;
- drive-strength = <2>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
-
- rx-pins {
- pinmux = <GPIOMUX(61, GPOUT_HIGH,
- GPOEN_DISABLE,
- GPI_SYS_TDM_RXD)>;
- input-enable;
- };
-
- sync-pins {
- pinmux = <GPIOMUX(63, GPOUT_HIGH,
- GPOEN_DISABLE,
- GPI_SYS_TDM_SYNC)>;
- input-enable;
- };
-
- pcmclk-pins {
- pinmux = <GPIOMUX(38, GPOUT_HIGH,
- GPOEN_DISABLE,
- GPI_SYS_TDM_CLK)>;
- input-enable;
- };
- };
-
- uart0_pins: uart0-0 {
- tx-pins {
- pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
- GPOEN_ENABLE,
- GPI_NONE)>;
- bias-disable;
- drive-strength = <12>;
- input-disable;
- input-schmitt-disable;
- slew-rate = <0>;
- };
-
- rx-pins {
- pinmux = <GPIOMUX(6, GPOUT_LOW,
- GPOEN_DISABLE,
- GPI_SYS_UART0_RX)>;
- bias-disable; /* external pull-up */
- drive-strength = <2>;
- input-enable;
- input-schmitt-enable;
- slew-rate = <0>;
- };
- };
-};
-
-&tdm {
- pinctrl-names = "default";
- pinctrl-0 = <&tdm_pins>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
- status = "okay";
-};
-
-&usb0 {
- dr_mode = "peripheral";
- status = "okay";
-};
-
-&U74_1 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&U74_2 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&U74_3 {
- cpu-supply = <&vdd_cpu>;
-};
-
-&U74_4 {
- cpu-supply = <&vdd_cpu>;
};
diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi
new file mode 100644
index 000000000000..72f527a9e75e
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive2-mars-common.dtsi
@@ -0,0 +1,617 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Emil Renner Berthing <[email protected]>
+ */
+
+/dts-v1/;
+#include "jh7110.dtsi"
+#include "jh7110-pinfunc.h"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ aliases {
+ ethernet0 = &gmac0;
+ i2c0 = &i2c0;
+ i2c2 = &i2c2;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ mmc0 = &mmc0;
+ mmc1 = &mmc1;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0x1 0x0>;
+ };
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
+ priority = <224>;
+ };
+
+ pwmdac_codec: audio-codec {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ simple-audio-card,dai-link@0 {
+ reg = <0>;
+ format = "left_j";
+ bitclock-master = <&sndcpu0>;
+ frame-master = <&sndcpu0>;
+
+ sndcpu0: cpu {
+ sound-dai = <&pwmdac>;
+ };
+
+ codec {
+ sound-dai = <&pwmdac_codec>;
+ };
+ };
+ };
+};
+
+&cpus {
+ timebase-frequency = <4000000>;
+};
+
+&dvp_clk {
+ clock-frequency = <74250000>;
+};
+
+&gmac0_rgmii_rxin {
+ clock-frequency = <125000000>;
+};
+
+&gmac0_rmii_refin {
+ clock-frequency = <50000000>;
+};
+
+&hdmitx0_pixelclk {
+ clock-frequency = <297000000>;
+};
+
+&i2srx_bclk_ext {
+ clock-frequency = <12288000>;
+};
+
+&i2srx_lrck_ext {
+ clock-frequency = <192000>;
+};
+
+&i2stx_bclk_ext {
+ clock-frequency = <12288000>;
+};
+
+&i2stx_lrck_ext {
+ clock-frequency = <192000>;
+};
+
+&mclk_ext {
+ clock-frequency = <12288000>;
+};
+
+&osc {
+ clock-frequency = <24000000>;
+};
+
+&rtc_osc {
+ clock-frequency = <32768>;
+};
+
+&tdm_ext {
+ clock-frequency = <49152000>;
+};
+
+&gmac0 {
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+ status = "okay";
+};
+
+&i2c5 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5_pins>;
+ status = "okay";
+
+ axp15060: pmic@36 {
+ compatible = "x-powers,axp15060";
+ reg = <0x36>;
+ interrupts = <0>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ regulators {
+ vcc_3v3: dcdc1 {
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3";
+ };
+
+ vdd_cpu: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1540000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ emmc_vdd: aldo4 {
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "emmc_vdd";
+ };
+ };
+ };
+};
+
+&i2c6 {
+ clock-frequency = <100000>;
+ i2c-sda-hold-time-ns = <300>;
+ i2c-sda-falling-time-ns = <510>;
+ i2c-scl-falling-time-ns = <510>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6_pins>;
+ status = "okay";
+};
+
+&i2srx {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2srx_pins>;
+ status = "okay";
+};
+
+&i2stx0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mclk_ext_pins>;
+ status = "okay";
+};
+
+&i2stx1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2stx1_pins>;
+ status = "okay";
+};
+
+&mmc0 {
+ max-frequency = <100000000>;
+ assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
+ assigned-clock-rates = <50000000>;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ cap-mmc-hw-reset;
+ post-power-on-delay-ms = <200>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&emmc_vdd>;
+ status = "okay";
+};
+
+&mmc1 {
+ max-frequency = <100000000>;
+ assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
+ assigned-clock-rates = <50000000>;
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+ cap-sd-highspeed;
+ post-power-on-delay-ms = <200>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "okay";
+};
+
+&pwmdac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwmdac_pins>;
+ status = "okay";
+};
+
+&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ nor_flash: flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ cdns,read-delay = <5>;
+ spi-max-frequency = <12000000>;
+ cdns,tshsl-ns = <1>;
+ cdns,tsd2d-ns = <1>;
+ cdns,tchsh-ns = <1>;
+ cdns,tslch-ns = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ spl@0 {
+ reg = <0x0 0x80000>;
+ };
+ uboot-env@f0000 {
+ reg = <0xf0000 0x10000>;
+ };
+ uboot@100000 {
+ reg = <0x100000 0x400000>;
+ };
+ reserved-data@600000 {
+ reg = <0x600000 0xa00000>;
+ };
+ };
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "okay";
+
+ spi_dev0: spi@0 {
+ compatible = "rohm,dh2228fv";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ };
+};
+
+&sysgpio {
+ i2c0_pins: i2c0-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(57, GPOUT_LOW,
+ GPOEN_SYS_I2C0_CLK,
+ GPI_SYS_I2C0_CLK)>,
+ <GPIOMUX(58, GPOUT_LOW,
+ GPOEN_SYS_I2C0_DATA,
+ GPI_SYS_I2C0_DATA)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c2_pins: i2c2-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(3, GPOUT_LOW,
+ GPOEN_SYS_I2C2_CLK,
+ GPI_SYS_I2C2_CLK)>,
+ <GPIOMUX(2, GPOUT_LOW,
+ GPOEN_SYS_I2C2_DATA,
+ GPI_SYS_I2C2_DATA)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c5_pins: i2c5-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(19, GPOUT_LOW,
+ GPOEN_SYS_I2C5_CLK,
+ GPI_SYS_I2C5_CLK)>,
+ <GPIOMUX(20, GPOUT_LOW,
+ GPOEN_SYS_I2C5_DATA,
+ GPI_SYS_I2C5_DATA)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2c6_pins: i2c6-0 {
+ i2c-pins {
+ pinmux = <GPIOMUX(16, GPOUT_LOW,
+ GPOEN_SYS_I2C6_CLK,
+ GPI_SYS_I2C6_CLK)>,
+ <GPIOMUX(17, GPOUT_LOW,
+ GPOEN_SYS_I2C6_DATA,
+ GPI_SYS_I2C6_DATA)>;
+ bias-disable; /* external pull-up */
+ input-enable;
+ input-schmitt-enable;
+ };
+ };
+
+ i2srx_pins: i2srx-0 {
+ clk-sd-pins {
+ pinmux = <GPIOMUX(38, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_BCLK)>,
+ <GPIOMUX(63, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_LRCK)>,
+ <GPIOMUX(38, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2STX1_BCLK)>,
+ <GPIOMUX(63, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2STX1_LRCK)>,
+ <GPIOMUX(61, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_I2SRX_SDIN0)>;
+ input-enable;
+ };
+ };
+
+ i2stx1_pins: i2stx1-0 {
+ sd-pins {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ input-disable;
+ };
+ };
+
+ mclk_ext_pins: mclk-ext-0 {
+ mclk-ext-pins {
+ pinmux = <GPIOMUX(4, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_MCLK_EXT)>;
+ input-enable;
+ };
+ };
+
+ mmc0_pins: mmc0-0 {
+ rst-pins {
+ pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ mmc-pins {
+ pinmux = <PINMUX(64, 0)>,
+ <PINMUX(65, 0)>,
+ <PINMUX(66, 0)>,
+ <PINMUX(67, 0)>,
+ <PINMUX(68, 0)>,
+ <PINMUX(69, 0)>,
+ <PINMUX(70, 0)>,
+ <PINMUX(71, 0)>,
+ <PINMUX(72, 0)>,
+ <PINMUX(73, 0)>;
+ bias-pull-up;
+ drive-strength = <12>;
+ input-enable;
+ };
+ };
+
+ mmc1_pins: mmc1-0 {
+ clk-pins {
+ pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ mmc-pins {
+ pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
+ GPOEN_SYS_SDIO1_CMD,
+ GPI_SYS_SDIO1_CMD)>,
+ <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
+ GPOEN_SYS_SDIO1_DATA0,
+ GPI_SYS_SDIO1_DATA0)>,
+ <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
+ GPOEN_SYS_SDIO1_DATA1,
+ GPI_SYS_SDIO1_DATA1)>,
+ <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
+ GPOEN_SYS_SDIO1_DATA2,
+ GPI_SYS_SDIO1_DATA2)>,
+ <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
+ GPOEN_SYS_SDIO1_DATA3,
+ GPI_SYS_SDIO1_DATA3)>;
+ bias-pull-up;
+ drive-strength = <12>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
+
+ pwmdac_pins: pwmdac-0 {
+ pwmdac-pins {
+ pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
+ GPOEN_ENABLE,
+ GPI_NONE)>,
+ <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+ };
+
+ spi0_pins: spi0-0 {
+ mosi-pins {
+ pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ input-disable;
+ input-schmitt-disable;
+ };
+
+ miso-pins {
+ pinmux = <GPIOMUX(53, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_SPI0_RXD)>;
+ bias-pull-up;
+ input-enable;
+ input-schmitt-enable;
+ };
+
+ sck-pins {
+ pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
+ GPOEN_ENABLE,
+ GPI_SYS_SPI0_CLK)>;
+ bias-disable;
+ input-disable;
+ input-schmitt-disable;
+ };
+
+ ss-pins {
+ pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
+ GPOEN_ENABLE,
+ GPI_SYS_SPI0_FSS)>;
+ bias-disable;
+ input-disable;
+ input-schmitt-disable;
+ };
+ };
+
+ tdm_pins: tdm-0 {
+ tx-pins {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pinmux = <GPIOMUX(61, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_RXD)>;
+ input-enable;
+ };
+
+ sync-pins {
+ pinmux = <GPIOMUX(63, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_SYNC)>;
+ input-enable;
+ };
+
+ pcmclk-pins {
+ pinmux = <GPIOMUX(38, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_CLK)>;
+ input-enable;
+ };
+ };
+
+ uart0_pins: uart0-0 {
+ tx-pins {
+ pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-disable;
+ drive-strength = <12>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ rx-pins {
+ pinmux = <GPIOMUX(6, GPOUT_LOW,
+ GPOEN_DISABLE,
+ GPI_SYS_UART0_RX)>;
+ bias-disable; /* external pull-up */
+ drive-strength = <2>;
+ input-enable;
+ input-schmitt-enable;
+ slew-rate = <0>;
+ };
+ };
+};
+
+&tdm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tdm_pins>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&usb0 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&U74_1 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&U74_2 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&U74_3 {
+ cpu-supply = <&vdd_cpu>;
+};
+
+&U74_4 {
+ cpu-supply = <&vdd_cpu>;
+};
--
2.43.0

2024-01-31 13:40:37

by Jisheng Zhang

Subject: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

The Milkv Mars is a development board based on the Starfive JH7110 SoC.
The board features:

- JH7110 SoC
- 1/2/4/8 GiB LPDDR4 DRAM
- AXP15060 PMIC
- 40 pin GPIO header
- 3x USB 3.0 host port
- 1x USB 2.0 host port
- 1x M.2 E-Key
- 1x eMMC slot
- 1x MicroSD slot
- 1x QSPI Flash
- 1x 1Gbps Ethernet port
- 1x HDMI port
- 1x 2-lane DSI and 1x 4-lane DSI
- 1x 2-lane CSI

Add the devicetree file describing the currently supported features,
namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.

Signed-off-by: Jisheng Zhang <[email protected]>
---
arch/riscv/boot/dts/starfive/Makefile | 1 +
.../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
2 files changed, 36 insertions(+)
create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts

diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 0141504c0f5c..2fa0cd7f31c3 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb

+dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
new file mode 100644
index 000000000000..de600e799e7d
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2023 Jisheng Zhang <[email protected]>
+ */
+
+/dts-v1/;
+#include "jh7110-visionfive2-mars-common.dtsi"
+
+/ {
+ model = "Milk-V Mars";
+ compatible = "milkv,mars", "starfive,jh7110";
+};
+
+&gmac0 {
+ starfive,tx-use-rgmii-clk;
+ assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
+ assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
+};
+
+
+&phy0 {
+ motorcomm,tx-clk-adj-enabled;
+ motorcomm,tx-clk-10-inverted;
+ motorcomm,tx-clk-100-inverted;
+ motorcomm,tx-clk-1000-inverted;
+ motorcomm,rx-clk-drv-microamp = <3970>;
+ motorcomm,rx-data-drv-microamp = <2910>;
+ rx-internal-delay-ps = <1500>;
+ tx-internal-delay-ps = <1500>;
+};
+
+&mmc1 {
+ disable-wp;
+ cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
+};
--
2.43.0

2024-01-31 14:12:45

by Jisheng Zhang

Subject: [PATCH v3 2/6] dt-bindings: riscv: starfive: add Milkv Mars board

Add device tree bindings for the Milkv Mars board which is
equipped with StarFive JH7110 SoC.

Signed-off-by: Jisheng Zhang <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/riscv/starfive.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml
index cc4d92f0a1bf..b672f8521949 100644
--- a/Documentation/devicetree/bindings/riscv/starfive.yaml
+++ b/Documentation/devicetree/bindings/riscv/starfive.yaml
@@ -26,6 +26,7 @@ properties:

- items:
- enum:
+ - milkv,mars
- starfive,visionfive-2-v1.2a
- starfive,visionfive-2-v1.3b
- const: starfive,jh7110
--
2.43.0

2024-02-06 19:14:05

by Conor Dooley

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> The board features:
>
> - JH7110 SoC
> - 1/2/4/8 GiB LPDDR4 DRAM
> - AXP15060 PMIC
> - 40 pin GPIO header
> - 3x USB 3.0 host port
> - 1x USB 2.0 host port
> - 1x M.2 E-Key
> - 1x eMMC slot
> - 1x MicroSD slot
> - 1x QSPI Flash
> - 1x 1Gbps Ethernet port
> - 1x HDMI port
> - 1x 2-lane DSI and 1x 4-lane DSI
> - 1x 2-lane CSI
>
> Add the devicetree file describing the currently supported features,
> namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
>
> Signed-off-by: Jisheng Zhang <[email protected]>

Got a dtbs_check issue in the patchwork CI:

+arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
+ from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
+arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
+ from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#

Can you fix that please? Also, I applied some patches the other day that
seem to conflict quite a bit with the common board dts patch. Would you
please do a rebase on top of that please?

Cheers,
Conor.

> ---
> arch/riscv/boot/dts/starfive/Makefile | 1 +
> .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
> 2 files changed, 36 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 0141504c0f5c..2fa0cd7f31c3 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> new file mode 100644
> index 000000000000..de600e799e7d
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <[email protected]>
> + */
> +
> +/dts-v1/;
> +#include "jh7110-visionfive2-mars-common.dtsi"
> +
> +/ {
> + model = "Milk-V Mars";
> + compatible = "milkv,mars", "starfive,jh7110";
> +};
> +
> +&gmac0 {
> + starfive,tx-use-rgmii-clk;
> + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> +};
> +
> +
> +&phy0 {
> + motorcomm,tx-clk-adj-enabled;
> + motorcomm,tx-clk-10-inverted;
> + motorcomm,tx-clk-100-inverted;
> + motorcomm,tx-clk-1000-inverted;
> + motorcomm,rx-clk-drv-microamp = <3970>;
> + motorcomm,rx-data-drv-microamp = <2910>;
> + rx-internal-delay-ps = <1500>;
> + tx-internal-delay-ps = <1500>;
> +};
> +
> +&mmc1 {
> + disable-wp;
> + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> +};
> --
> 2.43.0
>

Attachments:

2024-03-27 18:07:11

by Conor Dooley

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

Yo,

On Tue, Feb 06, 2024 at 07:13:48PM +0000, Conor Dooley wrote:
> On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > The board features:
> >
> > - JH7110 SoC
> > - 1/2/4/8 GiB LPDDR4 DRAM
> > - AXP15060 PMIC
> > - 40 pin GPIO header
> > - 3x USB 3.0 host port
> > - 1x USB 2.0 host port
> > - 1x M.2 E-Key
> > - 1x eMMC slot
> > - 1x MicroSD slot
> > - 1x QSPI Flash
> > - 1x 1Gbps Ethernet port
> > - 1x HDMI port
> > - 1x 2-lane DSI and 1x 4-lane DSI
> > - 1x 2-lane CSI
> >
> > Add the devicetree file describing the currently supported features,
> > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> >
> > Signed-off-by: Jisheng Zhang <[email protected]>
>
> Got a dtbs_check issue in the patchwork CI:
>
> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
>
> Can you fix that please? Also, I applied some patches the other day that
> seem to conflict quite a bit with the common board dts patch. Would you
> please do a rebase on top of that please?

Been going through stuff on my todo list now that the merge window is
closed. Could you please resend this with the rebase done?

Thanks,
Conor.

Attachments:

2024-03-28 10:22:33

by Jisheng Zhang

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On Wed, Mar 27, 2024 at 06:06:58PM +0000, Conor Dooley wrote:
> Yo,
>
> On Tue, Feb 06, 2024 at 07:13:48PM +0000, Conor Dooley wrote:
> > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > The board features:
> > >
> > > - JH7110 SoC
> > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > - AXP15060 PMIC
> > > - 40 pin GPIO header
> > > - 3x USB 3.0 host port
> > > - 1x USB 2.0 host port
> > > - 1x M.2 E-Key
> > > - 1x eMMC slot
> > > - 1x MicroSD slot
> > > - 1x QSPI Flash
> > > - 1x 1Gbps Ethernet port
> > > - 1x HDMI port
> > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > - 1x 2-lane CSI
> > >
> > > Add the devicetree file describing the currently supported features,
> > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > >
> > > Signed-off-by: Jisheng Zhang <[email protected]>
> >
> > Got a dtbs_check issue in the patchwork CI:
> >
> > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> >
> > Can you fix that please? Also, I applied some patches the other day that
> > seem to conflict quite a bit with the common board dts patch. Would you
> > please do a rebase on top of that please?
>
> Been going through stuff on my todo list now that the merge window is
> closed. Could you please resend this with the rebase done?

Thanks for the reminding, I will rebase on 6.9-rc1 then send out the
patches.

>
> Thanks,
> Conor.

2024-03-28 12:48:36

by Emil Renner Berthing

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

Jisheng Zhang wrote:
> On Wed, Mar 27, 2024 at 06:06:58PM +0000, Conor Dooley wrote:
> > Yo,
> >
> > On Tue, Feb 06, 2024 at 07:13:48PM +0000, Conor Dooley wrote:
> > > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > > The board features:
> > > >
> > > > - JH7110 SoC
> > > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > > - AXP15060 PMIC
> > > > - 40 pin GPIO header
> > > > - 3x USB 3.0 host port
> > > > - 1x USB 2.0 host port
> > > > - 1x M.2 E-Key
> > > > - 1x eMMC slot
> > > > - 1x MicroSD slot
> > > > - 1x QSPI Flash
> > > > - 1x 1Gbps Ethernet port
> > > > - 1x HDMI port
> > > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > > - 1x 2-lane CSI
> > > >
> > > > Add the devicetree file describing the currently supported features,
> > > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > > >
> > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > >
> > > Got a dtbs_check issue in the patchwork CI:
> > >
> > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > >
> > > Can you fix that please? Also, I applied some patches the other day that
> > > seem to conflict quite a bit with the common board dts patch. Would you
> > > please do a rebase on top of that please?
> >
> > Been going through stuff on my todo list now that the merge window is
> > closed. Could you please resend this with the rebase done?
>
> Thanks for the reminding, I will rebase on 6.9-rc1 then send out the
> patches.

Hi Jisheng,

A rebase would be great. It looks good to me, but could you maybe call the
common .dtsi something more generic like jh7110-common.dtsi like the
jh7100-common.dtsi. If we'll see other boards based on the jh7110 upstreamed
(eg. Star64) I suspect they'll also be heavily based on^M^M^M similar to the
VF2 schematics.

/Emil

>
> >
> > Thanks,
> > Conor.
>
>

2024-03-28 21:28:55

by Heinrich Schuchardt

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On 2/6/24 20:13, Conor Dooley wrote:
> On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
>> The Milkv Mars is a development board based on the Starfive JH7110 SoC.
>> The board features:
>>
>> - JH7110 SoC
>> - 1/2/4/8 GiB LPDDR4 DRAM
>> - AXP15060 PMIC
>> - 40 pin GPIO header
>> - 3x USB 3.0 host port
>> - 1x USB 2.0 host port
>> - 1x M.2 E-Key
>> - 1x eMMC slot
>> - 1x MicroSD slot
>> - 1x QSPI Flash
>> - 1x 1Gbps Ethernet port
>> - 1x HDMI port
>> - 1x 2-lane DSI and 1x 4-lane DSI
>> - 1x 2-lane CSI
>>
>> Add the devicetree file describing the currently supported features,
>> namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
>>
>> Signed-off-by: Jisheng Zhang <[email protected]>
>
> Got a dtbs_check issue in the patchwork CI:
>
> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
>
> Can you fix that please? Also, I applied some patches the other day that
> seem to conflict quite a bit with the common board dts patch. Would you
> please do a rebase on top of that please?
>
> Cheers,
> Conor.
>
>> ---
>> arch/riscv/boot/dts/starfive/Makefile | 1 +
>> .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
>> 2 files changed, 36 insertions(+)
>> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>>
>> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
>> index 0141504c0f5c..2fa0cd7f31c3 100644
>> --- a/arch/riscv/boot/dts/starfive/Makefile
>> +++ b/arch/riscv/boot/dts/starfive/Makefile
>> @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>>
>> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>> new file mode 100644
>> index 000000000000..de600e799e7d
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>> @@ -0,0 +1,35 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>> +/*
>> + * Copyright (C) 2023 Jisheng Zhang <[email protected]>
>> + */
>> +
>> +/dts-v1/;
>> +#include "jh7110-visionfive2-mars-common.dtsi"
>> +
>> +/ {
>> + model = "Milk-V Mars";
>> + compatible = "milkv,mars", "starfive,jh7110";
>> +};
>> +
>> +&gmac0 {
>> + starfive,tx-use-rgmii-clk;
>> + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>> + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
>> +};
>> +
>> +
>> +&phy0 {
>> + motorcomm,tx-clk-adj-enabled;
>> + motorcomm,tx-clk-10-inverted;
>> + motorcomm,tx-clk-100-inverted;
>> + motorcomm,tx-clk-1000-inverted;
>> + motorcomm,rx-clk-drv-microamp = <3970>;
>> + motorcomm,rx-data-drv-microamp = <2910>;
>> + rx-internal-delay-ps = <1500>;
>> + tx-internal-delay-ps = <1500>;
>> +};
>> +
>> +&mmc1 {
>> + disable-wp;

Due to which difference is 'disable-wp' necessary for the Mars board and
not necessary for the VisionFive 2 board?

>> + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;

On my VisionFive 2 1.2B, and 1.3A boards GPIO 41 reflects if an SD-card
is inserted (as shown in U-Boot by gpio status -a). So shouldn't this
value be moved to the common include
"jh7110-visionfive2-mars-common.dtsi" and broken-cd removed from the
VisionFive2 board?

https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
has a line

GPIO41 | SD_SDIO0_CD_GPIO41 | Micro SD：J10

Best regards

Heinrich

>> +};
>> --
>> 2.43.0

2024-03-29 02:45:01

by Jisheng Zhang

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On Thu, Mar 28, 2024 at 10:28:28PM +0100, Heinrich Schuchardt wrote:
> On 2/6/24 20:13, Conor Dooley wrote:
> > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > The board features:
> > >
> > > - JH7110 SoC
> > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > - AXP15060 PMIC
> > > - 40 pin GPIO header
> > > - 3x USB 3.0 host port
> > > - 1x USB 2.0 host port
> > > - 1x M.2 E-Key
> > > - 1x eMMC slot
> > > - 1x MicroSD slot
> > > - 1x QSPI Flash
> > > - 1x 1Gbps Ethernet port
> > > - 1x HDMI port
> > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > - 1x 2-lane CSI
> > >
> > > Add the devicetree file describing the currently supported features,
> > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > >
> > > Signed-off-by: Jisheng Zhang <[email protected]>
> >
> > Got a dtbs_check issue in the patchwork CI:
> >
> > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> >
> > Can you fix that please? Also, I applied some patches the other day that
> > seem to conflict quite a bit with the common board dts patch. Would you
> > please do a rebase on top of that please?
> >
> > Cheers,
> > Conor.
> >
> > > ---
> > > arch/riscv/boot/dts/starfive/Makefile | 1 +
> > > .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
> > > 2 files changed, 36 insertions(+)
> > > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > >
> > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> > > index 0141504c0f5c..2fa0cd7f31c3 100644
> > > --- a/arch/riscv/boot/dts/starfive/Makefile
> > > +++ b/arch/riscv/boot/dts/starfive/Makefile
> > > @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
> > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
> > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
> > > +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
> > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > > new file mode 100644
> > > index 000000000000..de600e799e7d
> > > --- /dev/null
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > > @@ -0,0 +1,35 @@
> > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > +/*
> > > + * Copyright (C) 2023 Jisheng Zhang <[email protected]>
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "jh7110-visionfive2-mars-common.dtsi"
> > > +
> > > +/ {
> > > + model = "Milk-V Mars";
> > > + compatible = "milkv,mars", "starfive,jh7110";
> > > +};
> > > +
> > > +&gmac0 {
> > > + starfive,tx-use-rgmii-clk;
> > > + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> > > + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> > > +};
> > > +
> > > +
> > > +&phy0 {
> > > + motorcomm,tx-clk-adj-enabled;
> > > + motorcomm,tx-clk-10-inverted;
> > > + motorcomm,tx-clk-100-inverted;
> > > + motorcomm,tx-clk-1000-inverted;
> > > + motorcomm,rx-clk-drv-microamp = <3970>;
> > > + motorcomm,rx-data-drv-microamp = <2910>;
> > > + rx-internal-delay-ps = <1500>;
> > > + tx-internal-delay-ps = <1500>;
> > > +};
> > > +
> > > +&mmc1 {
> > > + disable-wp;
>
> Due to which difference is 'disable-wp' necessary for the Mars board and not
> necessary for the VisionFive 2 board?

Mars doesn't have wp pin, but dunno vf2 case since I don't have a VF2
board ;)
>
> > > + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
>
> On my VisionFive 2 1.2B, and 1.3A boards GPIO 41 reflects if an SD-card is
> inserted (as shown in U-Boot by gpio status -a). So shouldn't this value be
> moved to the common include "jh7110-visionfive2-mars-common.dtsi" and
> broken-cd removed from the VisionFive2 board?

I tested the CD pin and can confirm it works on Mars, but I dunno whether
this works on VF2 since I have no VF2 board.
Could you please check whether it works or not on VF2?

>
> https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
> has a line
>
> GPIO41 | SD_SDIO0_CD_GPIO41 | Micro SD：J10
>
> Best regards
>
> Heinrich
>
> > > +};
> > > --
> > > 2.43.0
>

2024-03-29 02:46:00

by Jisheng Zhang

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On Thu, Mar 28, 2024 at 05:45:21AM -0700, Emil Renner Berthing wrote:
> Jisheng Zhang wrote:
> > On Wed, Mar 27, 2024 at 06:06:58PM +0000, Conor Dooley wrote:
> > > Yo,
> > >
> > > On Tue, Feb 06, 2024 at 07:13:48PM +0000, Conor Dooley wrote:
> > > > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > > > The board features:
> > > > >
> > > > > - JH7110 SoC
> > > > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > > > - AXP15060 PMIC
> > > > > - 40 pin GPIO header
> > > > > - 3x USB 3.0 host port
> > > > > - 1x USB 2.0 host port
> > > > > - 1x M.2 E-Key
> > > > > - 1x eMMC slot
> > > > > - 1x MicroSD slot
> > > > > - 1x QSPI Flash
> > > > > - 1x 1Gbps Ethernet port
> > > > > - 1x HDMI port
> > > > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > > > - 1x 2-lane CSI
> > > > >
> > > > > Add the devicetree file describing the currently supported features,
> > > > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > > > >
> > > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > >
> > > > Got a dtbs_check issue in the patchwork CI:
> > > >
> > > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> > > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> > > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > > >
> > > > Can you fix that please? Also, I applied some patches the other day that
> > > > seem to conflict quite a bit with the common board dts patch. Would you
> > > > please do a rebase on top of that please?
> > >
> > > Been going through stuff on my todo list now that the merge window is
> > > closed. Could you please resend this with the rebase done?
> >
> > Thanks for the reminding, I will rebase on 6.9-rc1 then send out the
> > patches.
>
> Hi Jisheng,

Hi,

>
> A rebase would be great. It looks good to me, but could you maybe call the
> common .dtsi something more generic like jh7110-common.dtsi like the
> jh7100-common.dtsi. If we'll see other boards based on the jh7110 upstreamed

make sense, will do in v4 series.

> (eg. Star64) I suspect they'll also be heavily based on^M^M^M similar to the
> VF2 schematics.
>
> /Emil
>
> >
> > >
> > > Thanks,
> > > Conor.
> >
> >

2024-04-01 13:28:37

by Heinrich Schuchardt

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On 3/29/24 03:31, Jisheng Zhang wrote:
> On Thu, Mar 28, 2024 at 10:28:28PM +0100, Heinrich Schuchardt wrote:
>> On 2/6/24 20:13, Conor Dooley wrote:
>>> On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
>>>> The Milkv Mars is a development board based on the Starfive JH7110 SoC.
>>>> The board features:
>>>>
>>>> - JH7110 SoC
>>>> - 1/2/4/8 GiB LPDDR4 DRAM
>>>> - AXP15060 PMIC
>>>> - 40 pin GPIO header
>>>> - 3x USB 3.0 host port
>>>> - 1x USB 2.0 host port
>>>> - 1x M.2 E-Key
>>>> - 1x eMMC slot
>>>> - 1x MicroSD slot
>>>> - 1x QSPI Flash
>>>> - 1x 1Gbps Ethernet port
>>>> - 1x HDMI port
>>>> - 1x 2-lane DSI and 1x 4-lane DSI
>>>> - 1x 2-lane CSI
>>>>
>>>> Add the devicetree file describing the currently supported features,
>>>> namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
>>>>
>>>> Signed-off-by: Jisheng Zhang <[email protected]>
>>>
>>> Got a dtbs_check issue in the patchwork CI:
>>>
>>> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
>>> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
>>> +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
>>> + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
>>>
>>> Can you fix that please? Also, I applied some patches the other day that
>>> seem to conflict quite a bit with the common board dts patch. Would you
>>> please do a rebase on top of that please?
>>>
>>> Cheers,
>>> Conor.
>>>
>>>> ---
>>>> arch/riscv/boot/dts/starfive/Makefile | 1 +
>>>> .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
>>>> 2 files changed, 36 insertions(+)
>>>> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>>>>
>>>> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
>>>> index 0141504c0f5c..2fa0cd7f31c3 100644
>>>> --- a/arch/riscv/boot/dts/starfive/Makefile
>>>> +++ b/arch/riscv/boot/dts/starfive/Makefile
>>>> @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
>>>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
>>>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>>>> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>>>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
>>>> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
>>>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>>>> new file mode 100644
>>>> index 000000000000..de600e799e7d
>>>> --- /dev/null
>>>> +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
>>>> @@ -0,0 +1,35 @@
>>>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>>>> +/*
>>>> + * Copyright (C) 2023 Jisheng Zhang <[email protected]>
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +#include "jh7110-visionfive2-mars-common.dtsi"
>>>> +
>>>> +/ {
>>>> + model = "Milk-V Mars";
>>>> + compatible = "milkv,mars", "starfive,jh7110";
>>>> +};
>>>> +
>>>> +&gmac0 {
>>>> + starfive,tx-use-rgmii-clk;
>>>> + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
>>>> + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
>>>> +};
>>>> +
>>>> +
>>>> +&phy0 {
>>>> + motorcomm,tx-clk-adj-enabled;
>>>> + motorcomm,tx-clk-10-inverted;
>>>> + motorcomm,tx-clk-100-inverted;
>>>> + motorcomm,tx-clk-1000-inverted;
>>>> + motorcomm,rx-clk-drv-microamp = <3970>;
>>>> + motorcomm,rx-data-drv-microamp = <2910>;
>>>> + rx-internal-delay-ps = <1500>;
>>>> + tx-internal-delay-ps = <1500>;
>>>> +};
>>>> +
>>>> +&mmc1 {
>>>> + disable-wp;
>>
>> Due to which difference is 'disable-wp' necessary for the Mars board and not
>> necessary for the VisionFive 2 board?
>
> Mars doesn't have wp pin, but dunno vf2 case since I don't have a VF2
> board ;)

If the Milk-V Mars does not have a WP GPIO, we should be able to drop
this property. The VisionFive 2 does not need it either.

>>
>>>> + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
>>
>> On my VisionFive 2 1.2B, and 1.3A boards GPIO 41 reflects if an SD-card is
>> inserted (as shown in U-Boot by gpio status -a). So shouldn't this value be
>> moved to the common include "jh7110-visionfive2-mars-common.dtsi" and
>> broken-cd removed from the VisionFive2 board?
>
> I tested the CD pin and can confirm it works on Mars, but I dunno whether
> this works on VF2 since I have no VF2 board.
> Could you please check whether it works or not on VF2?

As mentioned in my prior mail the card detect GPIO is working on the
VisionFive 2. StarFive acknowledged my U-Boot patch:

https://lore.kernel.org/u-boot/SHXPR01MB086314C47C281B3DDDF7BAE9E63AA@SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn/

Best regards

Heinrich

>
>>
>> https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
>> has a line
>>
>> GPIO41 | SD_SDIO0_CD_GPIO41 | Micro SD：J10
>>
>> Best regards
>>
>> Heinrich
>>
>>>> +};
>>>> --
>>>> 2.43.0
>>

2024-04-01 14:58:10

by Jisheng Zhang

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

On Mon, Apr 01, 2024 at 03:28:33PM +0200, Heinrich Schuchardt wrote:
> On 3/29/24 03:31, Jisheng Zhang wrote:
> > On Thu, Mar 28, 2024 at 10:28:28PM +0100, Heinrich Schuchardt wrote:
> > > On 2/6/24 20:13, Conor Dooley wrote:
> > > > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > > > The board features:
> > > > >
> > > > > - JH7110 SoC
> > > > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > > > - AXP15060 PMIC
> > > > > - 40 pin GPIO header
> > > > > - 3x USB 3.0 host port
> > > > > - 1x USB 2.0 host port
> > > > > - 1x M.2 E-Key
> > > > > - 1x eMMC slot
> > > > > - 1x MicroSD slot
> > > > > - 1x QSPI Flash
> > > > > - 1x 1Gbps Ethernet port
> > > > > - 1x HDMI port
> > > > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > > > - 1x 2-lane CSI
> > > > >
> > > > > Add the devicetree file describing the currently supported features,
> > > > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > > > >
> > > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > >
> > > > Got a dtbs_check issue in the patchwork CI:
> > > >
> > > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property
> > > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property
> > > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
> > > >
> > > > Can you fix that please? Also, I applied some patches the other day that
> > > > seem to conflict quite a bit with the common board dts patch. Would you
> > > > please do a rebase on top of that please?
> > > >
> > > > Cheers,
> > > > Conor.
> > > >
> > > > > ---
> > > > > arch/riscv/boot/dts/starfive/Makefile | 1 +
> > > > > .../boot/dts/starfive/jh7110-milkv-mars.dts | 35 +++++++++++++++++++
> > > > > 2 files changed, 36 insertions(+)
> > > > > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > > > >
> > > > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> > > > > index 0141504c0f5c..2fa0cd7f31c3 100644
> > > > > --- a/arch/riscv/boot/dts/starfive/Makefile
> > > > > +++ b/arch/riscv/boot/dts/starfive/Makefile
> > > > > @@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
> > > > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
> > > > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
> > > > > +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
> > > > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> > > > > dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> > > > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > > > > new file mode 100644
> > > > > index 000000000000..de600e799e7d
> > > > > --- /dev/null
> > > > > +++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
> > > > > @@ -0,0 +1,35 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > > > +/*
> > > > > + * Copyright (C) 2023 Jisheng Zhang <[email protected]>
> > > > > + */
> > > > > +
> > > > > +/dts-v1/;
> > > > > +#include "jh7110-visionfive2-mars-common.dtsi"
> > > > > +
> > > > > +/ {
> > > > > + model = "Milk-V Mars";
> > > > > + compatible = "milkv,mars", "starfive,jh7110";
> > > > > +};
> > > > > +
> > > > > +&gmac0 {
> > > > > + starfive,tx-use-rgmii-clk;
> > > > > + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
> > > > > + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
> > > > > +};
> > > > > +
> > > > > +
> > > > > +&phy0 {
> > > > > + motorcomm,tx-clk-adj-enabled;
> > > > > + motorcomm,tx-clk-10-inverted;
> > > > > + motorcomm,tx-clk-100-inverted;
> > > > > + motorcomm,tx-clk-1000-inverted;
> > > > > + motorcomm,rx-clk-drv-microamp = <3970>;
> > > > > + motorcomm,rx-data-drv-microamp = <2910>;
> > > > > + rx-internal-delay-ps = <1500>;
> > > > > + tx-internal-delay-ps = <1500>;
> > > > > +};
> > > > > +
> > > > > +&mmc1 {
> > > > > + disable-wp;
> > >
> > > Due to which difference is 'disable-wp' necessary for the Mars board and not
> > > necessary for the VisionFive 2 board?
> >
> > Mars doesn't have wp pin, but dunno vf2 case since I don't have a VF2
> > board ;)
>
> If the Milk-V Mars does not have a WP GPIO, we should be able to drop this
> property. The VisionFive 2 does not need it either.

Nope, dropping this property would result in RO sdcard on vf2.
>
> > >
> > > > > + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> > >
> > > On my VisionFive 2 1.2B, and 1.3A boards GPIO 41 reflects if an SD-card is
> > > inserted (as shown in U-Boot by gpio status -a). So shouldn't this value be
> > > moved to the common include "jh7110-visionfive2-mars-common.dtsi" and
> > > broken-cd removed from the VisionFive2 board?
> >
> > I tested the CD pin and can confirm it works on Mars, but I dunno whether
> > this works on VF2 since I have no VF2 board.
> > Could you please check whether it works or not on VF2?
>
> As mentioned in my prior mail the card detect GPIO is working on the
> VisionFive 2. StarFive acknowledged my U-Boot patch:
>
> https://lore.kernel.org/u-boot/SHXPR01MB086314C47C281B3DDDF7BAE9E63AA@SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn/

Thanks for confirmation.

>
> Best regards
>
> Heinrich
>
> >
> > >
> > > https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
> > > has a line
> > >
> > > GPIO41 | SD_SDIO0_CD_GPIO41 | Micro SD：J10
> > >
> > > Best regards
> > >
> > > Heinrich
> > >
> > > > > +};
> > > > > --
> > > > > 2.43.0
> > >
>

2024-04-19 22:04:45

by Emil Renner Berthing

Subject: Re: [PATCH v3 1/6] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi

Jisheng Zhang wrote:
> Add the 'cpus' label so that we can reference it in board dts files.
>
> Signed-off-by: Jisheng Zhang <[email protected]>

Reviewed-by: Emil Renner Berthing <[email protected]>

2024-04-19 22:05:04

by Emil Renner Berthing

Subject: Re: [PATCH v3 2/6] dt-bindings: riscv: starfive: add Milkv Mars board

Jisheng Zhang wrote:
> Add device tree bindings for the Milkv Mars board which is
> equipped with StarFive JH7110 SoC.
>
> Signed-off-by: Jisheng Zhang <[email protected]>
> Acked-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Emil Renner Berthing <[email protected]>

2024-04-19 22:05:28

by Emil Renner Berthing

Subject: Re: [PATCH v3 3/6] riscv: dts: starfive: visionfive 2: update sound and codec dt node name

Jisheng Zhang wrote:
> Use "audio-codec" as the codec dt node name, and "sound" as the simple
> audio card dt name.
>
> Suggested-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Jisheng Zhang <[email protected]>

Reviewed-by: Emil Renner Berthing <[email protected]>

2024-04-19 22:05:52

by Emil Renner Berthing

Subject: Re: [PATCH v3 4/6] riscv: dts: starfive: visionfive 2: use cpus label for timebase freq

Jisheng Zhang wrote:
> As pointed out by Krzysztof "Board should not bring new CPU nodes.
> Override by label instead."
>
> Suggested-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Jisheng Zhang <[email protected]>

Reviewed-by: Emil Renner Berthing <[email protected]>

2024-04-19 22:12:00

by Emil Renner Berthing

Subject: Re: [PATCH v3 6/6] riscv: dts: starfive: add Milkv Mars board device tree

Jisheng Zhang wrote:
> On Mon, Apr 01, 2024 at 03:28:33PM +0200, Heinrich Schuchardt wrote:
> > On 3/29/24 03:31, Jisheng Zhang wrote:
> > > On Thu, Mar 28, 2024 at 10:28:28PM +0100, Heinrich Schuchardt wrote:
> > > > On 2/6/24 20:13, Conor Dooley wrote:
> > > > > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote:
> > > > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC.
> > > > > > The board features:
> > > > > >
> > > > > > - JH7110 SoC
> > > > > > - 1/2/4/8 GiB LPDDR4 DRAM
> > > > > > - AXP15060 PMIC
> > > > > > - 40 pin GPIO header
> > > > > > - 3x USB 3.0 host port
> > > > > > - 1x USB 2.0 host port
> > > > > > - 1x M.2 E-Key
> > > > > > - 1x eMMC slot
> > > > > > - 1x MicroSD slot
> > > > > > - 1x QSPI Flash
> > > > > > - 1x 1Gbps Ethernet port
> > > > > > - 1x HDMI port
> > > > > > - 1x 2-lane DSI and 1x 4-lane DSI
> > > > > > - 1x 2-lane CSI
> > > > > >
> > > > > > Add the devicetree file describing the currently supported features,
> > > > > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet.
> > > > > >
> > > > > > Signed-off-by: Jisheng Zhang <[email protected]>
..
> > > > > > +
> > > > > > +&mmc1 {
> > > > > > + disable-wp;
> > > >
> > > > Due to which difference is 'disable-wp' necessary for the Mars board and not
> > > > necessary for the VisionFive 2 board?
> > >
> > > Mars doesn't have wp pin, but dunno vf2 case since I don't have a VF2
> > > board ;)

The schematic is available here:
https://doc-en.rvspace.org/VisionFive2/PDF/RV002_V1.3B_20230208.PDF

> >
> > If the Milk-V Mars does not have a WP GPIO, we should be able to drop this
> > property. The VisionFive 2 does not need it either.
>
> Nope, dropping this property would result in RO sdcard on vf2.
> >
> > > >
> > > > > > + cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
> > > >
> > > > On my VisionFive 2 1.2B, and 1.3A boards GPIO 41 reflects if an SD-card is
> > > > inserted (as shown in U-Boot by gpio status -a). So shouldn't this value be
> > > > moved to the common include "jh7110-visionfive2-mars-common.dtsi" and
> > > > broken-cd removed from the VisionFive2 board?
> > >
> > > I tested the CD pin and can confirm it works on Mars, but I dunno whether
> > > this works on VF2 since I have no VF2 board.
> > > Could you please check whether it works or not on VF2?
> >
> > As mentioned in my prior mail the card detect GPIO is working on the
> > VisionFive 2. StarFive acknowledged my U-Boot patch:
> >
> > https://lore.kernel.org/u-boot/SHXPR01MB086314C47C281B3DDDF7BAE9E63AA@SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn/
>
> Thanks for confirmation.

Actually comparing the schematic for the VF2 above and the Mars board[1] I
don't see any differences in how the SD-card is connected, so if I'm right the
mmc1 node could be fully defined in the jh7110-common.dtsi.

[1]: https://github.com/milkv-mars/mars-files/blob/main/Mars_hardware_schematics/Mars_V1.11_20230821.pdf

/Emil

>
> >
> > Best regards
> >
> > Heinrich
> >
> > >
> > > >
> > > > https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216pdf
> > > > has a line
> > > >
> > > > GPIO41 | SD_SDIO0_CD_GPIO41 | Micro SD：J10
> > > >
> > > > Best regards
> > > >
> > > > Heinrich
> > > >
> > > > > > +};
> > > > > > --
> > > > > > 2.43.0
> > > >
> >