This patchset adds clock support for the Nuvoton
Arbel NPCM8XX Board Management controller (BMC) SoC family.
This patchset cover letter is based from the initial support for NPCM8xx BMC to
keep tracking the version history.
for your note:
1. dt-bindings clock modification started from v22 since the upstream npcm8xx
clock driver haven't merged yet and requires dt binding update according to
the new npcm8xx clock driver.
2. all the other initial support patches had been applied to Linux kernel 6.0.
This patchset was tested on the Arbel NPCM8XX evaluation board.
Addressed comments from:
- Rob Herring: https://www.spinics.net/lists/devicetree/msg663403.html
- Krzysztof Kozlowski: https://www.spinics.net/lists/devicetree/msg665206.html
Changes since version 22:
- Modify commit message to explain broken ABI in dt-binding
- Using regmap parenet regmap memory therefore remove use of npcm8xx rst-clock patch.
- Leave npcm7xx rst node as is
Changes since version 21:
- Since using regmap instead of ioremap replace reg to syscon
property in dt-bindings and dts.
- Add reference clock property to the dt-bindings and dts.
- Using .index instead of .name in clk_parent_data structures.
- Using string where any macros are used once.
Changes since version 20:
- Using regmap instead of ioremap.
the clock and reset modules are sharing the same memory region
and cause failure when using devm_platform_ioremap_resource
function, this version uses regmap to handle shared
reset and clock memory region, in case it is approved I will
modify the reset driver to use the regmap as well.
- Using clk_hw instead of clk_parent_data structre.
- Divider clock definition to one line
Changes since version 19:
- Remove unnecessary free command.
- Defining pr_fmt().
- Using dev_err_probe.
- Return zero in the end of the probe function.
Changes since version 18:
- NPCM8XX clock driver did not changed from version 18 only build and tested under kernel 6.6-rc1.
Changes since version 17:
- NPCM8XX clock driver did not changed from version 17 only build and tested under kernel 6.5-rc3.
Changes since version 16:
- NPCM8XX clock driver
- Using devm_kzalloc instead kzalloc.
- Remove unnecessary parenthesis.
- Modify incorrect spelling.
Changes since version 15:
- NPCM8XX clock driver
- Remove unused regs parameter from npcm8xx_pll_data structure.
- Using index and clk_hw parameters to set the clock parent in the clock structures.
Changes since version 14:
- NPCM8XX clock driver
- Remove unnecessary register definitions.
- Remove the internal reference clock, instead use the external DT reference clock.
- rearrange the driver.
- using .names parameter in DT to define clock (refclk).
Changes since version 13:
- NPCM8XX clock driver
- Remove unnecessary definitions and add module.h define
- Use in clk_parent_data struct.fw_name and .name.
- Add module_exit function.
- Add const to divider clock names.
- Add MODULE_DESCRIPTION and MODULE_LICENSE
Changes since version 12:
- NPCM8XX clock driver
- Use clk_parent_data in mux and div clock structure.
- Add const to mux tables.
- Using devm_clk_hw_register_fixed_rate function.
- use only .name clk_parent_data instead .name and .fw_name.
- Modify mask values in mux clocks.
Changes since version 11:
- NPCM8XX clock driver
- Modify Kconfig help.
- Modify loop variable to unsigned int.
Changes since version 11:
- NPCM8XX clock driver
- Modify Kconfig help.
- Modify loop variable to unsigned int.
Changes since version 10:
- NPCM8XX clock driver
- Fix const warning.
Changes since version 9:
- NPCM8XX clock driver
- Move configuration place.
- Using clk_parent_data instead of parent_name
- using devm_ioremap instead of ioremap. deeply sorry, I know we had
a long discussion on what should the driver use, from other examples
(also in other clock drivers) I see the combination of
platform_get_resource and devm_ioremap are commonly used and it answer
the reset and clock needs.
Changes since version 8:
- NPCM8XX clock driver
- Move configuration place.
- Add space before and aftre '{' '}'.
- Handle devm_of_clk_add_hw_provider function error.
Changes since version 7:
- NPCM8XX clock driver
- The clock and reset registers using the same memory region,
due to it the clock driver should claim the ioremap directly
without checking the memory region.
Changes since version 5:
- NPCM8XX clock driver
- Remove refclk if devm_of_clk_add_hw_provider function failed.
Changes since version 4:
- NPCM8XX clock driver
- Use the same quote in the dt-binding file.
Changes since version 3:
- NPCM8XX clock driver
- Rename NPCM8xx clock dt-binding header file.
- Remove unused structures.
- Improve Handling the clocks registration.
Changes since version 2:
- NPCM8XX clock driver
- Add debug new line.
- Add 25M fixed rate clock.
- Remove unused clocks and clock name from dt-binding.
Changes since version 1:
- NPCM8XX clock driver
- Modify dt-binding.
- Remove unsed definition and include.
- Include alphabetically.
- Use clock devm.
Tomer Maimon (3):
dt-bindings: clock: npcm845: Add reference 25m clock property
arm64: dts: nuvoton: npcm8xx: add reference 25m clock
clk: npcm8xx: add clock controller
.../bindings/clock/nuvoton,npcm845-clk.yaml | 12 +
.../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 2 +
.../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 6 +
drivers/clk/Kconfig | 8 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-npcm8xx.c | 509 ++++++++++++++++++
6 files changed, 538 insertions(+)
create mode 100644 drivers/clk/clk-npcm8xx.c
--
2.34.1
Add 25Mhz reference clock that to the clock node since the reference
clock in not a part of Nuvoton BMC NPCM8XX SoC.
Signed-off-by: Tomer Maimon <[email protected]>
---
arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 2 ++
arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index ecd171b2feba..f10027c14e63 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
@@ -58,6 +58,8 @@ clk: clock-controller@f0801000 {
compatible = "nuvoton,npcm845-clk";
#clock-cells = <1>;
reg = <0x0 0xf0801000 0x0 0x1000>;
+ clocks = <&refclk>;
+ clock-names = "refclk";
};
apb {
diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
index a5ab2bc0f835..722a46d78d23 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts
@@ -19,6 +19,12 @@ chosen {
memory {
reg = <0x0 0x0 0x0 0x40000000>;
};
+
+ refclk: refclk-25mhz {
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+ #clock-cells = <0>;
+ };
};
&serial0 {
--
2.34.1
On 31/01/2024 19:26, Tomer Maimon wrote:
> This patchset adds clock support for the Nuvoton
> Arbel NPCM8XX Board Management controller (BMC) SoC family.
>
> This patchset cover letter is based from the initial support for NPCM8xx BMC to
> keep tracking the version history.
>
> for your note:
> 1. dt-bindings clock modification started from v22 since the upstream npcm8xx
> clock driver haven't merged yet and requires dt binding update according to
> the new npcm8xx clock driver.
>
> 2. all the other initial support patches had been applied to Linux kernel 6.0.
>
> This patchset was tested on the Arbel NPCM8XX evaluation board.
>
> Addressed comments from:
> - Rob Herring: https://www.spinics.net/lists/devicetree/msg663403.html
> - Krzysztof Kozlowski: https://www.spinics.net/lists/devicetree/msg665206.html
Use lore links which are way much more helpful.
Best regards,
Krzysztof