From: Frank Wunderlich <[email protected]>
Infracfg on mt7988 supports reset controller function which is
needed to get lvts thermal working.
changes:
v4:
- changed commit message of dt-bindings patch to include information
about starting from 0 again suggested by Conor Dooley.
v3:
- start resets on RST0 offset (LVTS is RST1)
- rename offset constants with MT7988 prefix (else collision with reset.h)
v2:
- change value of constant to 0 from 9
- add missing SoB and commit-message for binding-patch
Frank Wunderlich (2):
dt-bindings: reset: mediatek: add MT7988 infracfg reset IDs
clk: mediatek: add infracfg reset controller for mt7988
drivers/clk/mediatek/clk-mt7988-infracfg.c | 23 +++++++++++++++++++
.../reset/mediatek,mt7988-resets.h | 6 +++++
2 files changed, 29 insertions(+)
--
2.34.1
From: Frank Wunderlich <[email protected]>
Add reset constants for using as index in driver and dts.
Value is starting again from 0 because resets are used in another device
than existing constants.
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Acked-by: Conor Dooley <[email protected]>
---
v4:
- add info about restarting ids from 0 to commit message
v3:
- add pcie reset id as suggested by angelo
v2:
- add missing commit message and SoB
- change value of infrareset to 0
---
include/dt-bindings/reset/mediatek,mt7988-resets.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
index 493301971367..0eb152889a89 100644
--- a/include/dt-bindings/reset/mediatek,mt7988-resets.h
+++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
@@ -10,4 +10,10 @@
/* ETHWARP resets */
#define MT7988_ETHWARP_RST_SWITCH 0
+/* INFRA resets */
+#define MT7988_INFRA_RST0_PEXTP_MAC_SWRST 0
+#define MT7988_INFRA_RST1_THERM_CTRL_SWRST 1
+
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7988 */
+
--
2.34.1
From: Frank Wunderlich <[email protected]>
Infracfg can also operate as reset controller, add support for it.
Signed-off-by: Frank Wunderlich <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
---
v4: unchanged
v3:
- start with RST0 (LVTS is in RST1)
- rename reset offset to contain SOC to not collide with constants
defined in reset.h
---
drivers/clk/mediatek/clk-mt7988-infracfg.c | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/clk/mediatek/clk-mt7988-infracfg.c b/drivers/clk/mediatek/clk-mt7988-infracfg.c
index 8011ef278bea..449041f8abbc 100644
--- a/drivers/clk/mediatek/clk-mt7988-infracfg.c
+++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c
@@ -14,6 +14,10 @@
#include "clk-gate.h"
#include "clk-mux.h"
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
+#include <dt-bindings/reset/mediatek,mt7988-resets.h>
+
+#define MT7988_INFRA_RST0_SET_OFFSET 0x70
+#define MT7988_INFRA_RST1_SET_OFFSET 0x80
static DEFINE_SPINLOCK(mt7988_clk_lock);
@@ -249,12 +253,31 @@ static const struct mtk_gate infra_clks[] = {
GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3", "sysaxi_sel", 31),
};
+static u16 infra_rst_ofs[] = {
+ MT7988_INFRA_RST0_SET_OFFSET,
+ MT7988_INFRA_RST1_SET_OFFSET,
+};
+
+static u16 infra_idx_map[] = {
+ [MT7988_INFRA_RST0_PEXTP_MAC_SWRST] = 0 * RST_NR_PER_BANK + 6,
+ [MT7988_INFRA_RST1_THERM_CTRL_SWRST] = 1 * RST_NR_PER_BANK + 9,
+};
+
+static struct mtk_clk_rst_desc infra_rst_desc = {
+ .version = MTK_RST_SET_CLR,
+ .rst_bank_ofs = infra_rst_ofs,
+ .rst_bank_nr = ARRAY_SIZE(infra_rst_ofs),
+ .rst_idx_map = infra_idx_map,
+ .rst_idx_map_nr = ARRAY_SIZE(infra_idx_map),
+};
+
static const struct mtk_clk_desc infra_desc = {
.clks = infra_clks,
.num_clks = ARRAY_SIZE(infra_clks),
.mux_clks = infra_muxes,
.num_mux_clks = ARRAY_SIZE(infra_muxes),
.clk_lock = &mt7988_clk_lock,
+ .rst_desc = &infra_rst_desc,
};
static const struct of_device_id of_match_clk_mt7988_infracfg[] = {
--
2.34.1
Quoting Frank Wunderlich (2024-02-01 10:24:09)
> From: Frank Wunderlich <[email protected]>
>
> Infracfg can also operate as reset controller, add support for it.
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
> ---
Applied to clk-next
Quoting Frank Wunderlich (2024-02-01 10:24:08)
> From: Frank Wunderlich <[email protected]>
>
> Add reset constants for using as index in driver and dts.
>
> Value is starting again from 0 because resets are used in another device
> than existing constants.
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
> Acked-by: Conor Dooley <[email protected]>
> ---
Applied to clk-next