2024-02-01 18:30:41

by Sam Protsenko

Subject: [PATCH v3] arm64: dts: exynos: Add SPI nodes for Exynos850

Some USI blocks can be configured as SPI controllers. Add corresponding
SPI nodes to Exynos850 SoC device tree.

Signed-off-by: Sam Protsenko <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[krzysztof: order properties according to DTS coding style]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes in v3:
- Fix dtschema warnings by specifying "spi" as a first clock

Changes in v2:
- Sorted pinctrl properties properly

arch/arm64/boot/dts/exynos/exynos850.dtsi | 54 +++++++++++++++++++++++
1 file changed, 54 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
index e7e1171a3864..2ba67c3d0681 100644
--- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
@@ -738,6 +738,24 @@ usi_spi_0: usi@139400c0 {
<&cmu_peri CLK_GOUT_SPI0_IPCLK>;
clock-names = "pclk", "ipclk";
status = "disabled";
+
+ spi_0: spi@13940000 {
+ compatible = "samsung,exynos850-spi";
+ reg = <0x13940000 0x30>;
+ clocks = <&cmu_peri CLK_GOUT_SPI0_PCLK>,
+ <&cmu_peri CLK_GOUT_SPI0_IPCLK>;
+ clock-names = "spi", "spi_busclk0";
+ dmas = <&pdma0 5>, <&pdma0 4>;
+ dma-names = "tx", "rx";
+ interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi0_pins>;
+ pinctrl-names = "default";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};

usi_cmgp0: usi@11d000c0 {
@@ -779,6 +797,24 @@ serial_1: serial@11d00000 {
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
+
+ spi_1: spi@11d00000 {
+ compatible = "samsung,exynos850-spi";
+ reg = <0x11d00000 0x30>;
+ clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>,
+ <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>;
+ clock-names = "spi", "spi_busclk0";
+ dmas = <&pdma0 12>, <&pdma0 13>;
+ dma-names = "tx", "rx";
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi1_pins>;
+ pinctrl-names = "default";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};

usi_cmgp1: usi@11d200c0 {
@@ -820,6 +856,24 @@ serial_2: serial@11d20000 {
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
+
+ spi_2: spi@11d20000 {
+ compatible = "samsung,exynos850-spi";
+ reg = <0x11d20000 0x30>;
+ clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>,
+ <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>;
+ clock-names = "spi", "spi_busclk0";
+ dmas = <&pdma0 14>, <&pdma0 15>;
+ dma-names = "tx", "rx";
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi2_pins>;
+ pinctrl-names = "default";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
};
};
--
2.39.2

2024-02-06 08:11:26

by Krzysztof Kozlowski

Subject: Re: [PATCH v3] arm64: dts: exynos: Add SPI nodes for Exynos850

On Thu, 01 Feb 2024 12:30:25 -0600, Sam Protsenko wrote:
> Some USI blocks can be configured as SPI controllers. Add corresponding
> SPI nodes to Exynos850 SoC device tree.
>
>

Applied, thanks!

[1/1] arm64: dts: exynos: Add SPI nodes for Exynos850
https://git.kernel.org/krzk/linux/c/2ef4cddd31950f563b5642e34d8fa38ad2352ef0

Best regards,
--
Krzysztof Kozlowski <[email protected]>