From: Gabriel Fernandez <[email protected]>
v9: base on next-20240207
- update dt binding documentation with v8 modidification on RCC driver
(use .index of clk_parent_data struct to define a parent)
- rebase patch "arm64: dts: st: add rcc support for STM32MP25"
with next-20240207 tag
v8:
- use .index of clk_parent_data struct to define a parent
- remove unnecessary dependency check with SCMI clock driver
- convert to platform device APIs
- convert to devm_of_clk_add_hw_provider()
- convert single value enum to a define
v7: base on next-20231219
- These patches below are applied to clk-next:
clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
clk: stm32mp1: use stm32mp13 reset driver
dt-bindings: stm32: add clocks and reset binding for stm32mp25
- remove unnecessary includes
- migrate clock parents to struct clk_parent_data and remove
CLK_STM32_XXX() macros to have a more readble code
- use platform device APIs (devm_of_iomap() instead of_iomap())
- move content of stm32mp25_rcc_init() to stm32mp25_rcc_clocks_probe()
- simply get_clock_deps()
- add const to stm32mp25_data struct
- remove ck_icn_p_serc clock (will be integrate later with security
management)
v6:
- remove useless defines in drivers/clk/stm32/stm32mp25_rcc.h
v5:
- Fix sparse warnings: was not declared. Should it be static?
drivers/clk/stm32/clk-stm32mp13.c:1516:29: symbol 'stm32mp13_reset_data'
drivers/clk/stm32/clk-stm32mp1.c:2148:29: symbol 'stm32mp1_reset_data'
drivers/clk/stm32/clk-stm32mp25.c:1003:5: symbol 'stm32mp25_cpt_gate'
drivers/clk/stm32/clk-stm32mp25.c:1005:29: symbol 'stm32mp25_clock_data'
drivers/clk/stm32/clk-stm32mp25.c:1011:29: symbol 'stm32mp25_reset_data'
v4:
- use GPL-2.0-only OR BSD-2-Clause for clock and reset binding files
- use quotes ' for #clock-cells and #reset-cells in YAML documentation
- reset binding start now to 0 instead 1
- improve management of reset lines that are not managed
v3:
- from Rob Herring change clock item description in YAML documentation
v2:
- rework reset binding (use ID witch start from 0)
- rework reset driver to manage STM32MP13 / STM32MP15 / STM32MP25
- rework YAML documentation
Gabriel Fernandez (4):
clk: stm32mp13: use platform device APIs
dt-bindings: stm32: update DT bingding for stm32mp25
clk: stm32: introduce clocks for STM32MP257 platform
arm64: dts: st: add rcc support for STM32MP25
.../bindings/clock/st,stm32mp25-rcc.yaml | 171 +-
arch/arm64/boot/dts/st/stm32mp251.dtsi | 144 +-
arch/arm64/boot/dts/st/stm32mp255.dtsi | 4 +-
drivers/clk/stm32/Kconfig | 7 +
drivers/clk/stm32/Makefile | 1 +
drivers/clk/stm32/clk-stm32-core.c | 11 +-
drivers/clk/stm32/clk-stm32mp13.c | 72 +-
drivers/clk/stm32/clk-stm32mp25.c | 1876 +++++++++++++++++
drivers/clk/stm32/reset-stm32.c | 59 +-
drivers/clk/stm32/reset-stm32.h | 7 +
drivers/clk/stm32/stm32mp25_rcc.h | 712 +++++++
11 files changed, 2922 insertions(+), 142 deletions(-)
create mode 100644 drivers/clk/stm32/clk-stm32mp25.c
create mode 100644 drivers/clk/stm32/stm32mp25_rcc.h
--
2.25.1
From: Gabriel Fernandez <[email protected]>
Convert devm_platform_ioremap_resource() and remove unnecessary
dependency check with SCMI clock driver.
Signed-off-by: Gabriel Fernandez <[email protected]>
---
drivers/clk/stm32/clk-stm32-core.c | 11 +++--
drivers/clk/stm32/clk-stm32mp13.c | 72 +++---------------------------
2 files changed, 10 insertions(+), 73 deletions(-)
diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c
index 58705fcad334..1721a3ed7386 100644
--- a/drivers/clk/stm32/clk-stm32-core.c
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -25,7 +25,6 @@ static int stm32_rcc_clock_init(struct device *dev,
{
const struct stm32_rcc_match_data *data = match->data;
struct clk_hw_onecell_data *clk_data = data->hw_clks;
- struct device_node *np = dev_of_node(dev);
struct clk_hw **hws;
int n, max_binding;
@@ -64,7 +63,7 @@ static int stm32_rcc_clock_init(struct device *dev,
hws[cfg_clock->id] = hw;
}
- return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
+ return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clk_data);
}
int stm32_rcc_init(struct device *dev, const struct of_device_id *match_data,
@@ -638,7 +637,7 @@ struct clk_hw *clk_stm32_mux_register(struct device *dev,
mux->lock = lock;
mux->clock_data = data->clock_data;
- err = clk_hw_register(dev, hw);
+ err = devm_clk_hw_register(dev, hw);
if (err)
return ERR_PTR(err);
@@ -659,7 +658,7 @@ struct clk_hw *clk_stm32_gate_register(struct device *dev,
gate->lock = lock;
gate->clock_data = data->clock_data;
- err = clk_hw_register(dev, hw);
+ err = devm_clk_hw_register(dev, hw);
if (err)
return ERR_PTR(err);
@@ -680,7 +679,7 @@ struct clk_hw *clk_stm32_div_register(struct device *dev,
div->lock = lock;
div->clock_data = data->clock_data;
- err = clk_hw_register(dev, hw);
+ err = devm_clk_hw_register(dev, hw);
if (err)
return ERR_PTR(err);
@@ -701,7 +700,7 @@ struct clk_hw *clk_stm32_composite_register(struct device *dev,
composite->lock = lock;
composite->clock_data = data->clock_data;
- err = clk_hw_register(dev, hw);
+ err = devm_clk_hw_register(dev, hw);
if (err)
return ERR_PTR(err);
diff --git a/drivers/clk/stm32/clk-stm32mp13.c b/drivers/clk/stm32/clk-stm32mp13.c
index d4ecb3c34a1b..bf81d7491708 100644
--- a/drivers/clk/stm32/clk-stm32mp13.c
+++ b/drivers/clk/stm32/clk-stm32mp13.c
@@ -1536,77 +1536,16 @@ static const struct of_device_id stm32mp13_match_data[] = {
};
MODULE_DEVICE_TABLE(of, stm32mp13_match_data);
-static int stm32mp1_rcc_init(struct device *dev)
-{
- void __iomem *rcc_base;
- int ret = -ENOMEM;
-
- rcc_base = of_iomap(dev_of_node(dev), 0);
- if (!rcc_base) {
- dev_err(dev, "%pOFn: unable to map resource", dev_of_node(dev));
- goto out;
- }
-
- ret = stm32_rcc_init(dev, stm32mp13_match_data, rcc_base);
-out:
- if (ret) {
- if (rcc_base)
- iounmap(rcc_base);
-
- of_node_put(dev_of_node(dev));
- }
-
- return ret;
-}
-
-static int get_clock_deps(struct device *dev)
-{
- static const char * const clock_deps_name[] = {
- "hsi", "hse", "csi", "lsi", "lse",
- };
- size_t deps_size = sizeof(struct clk *) * ARRAY_SIZE(clock_deps_name);
- struct clk **clk_deps;
- int i;
-
- clk_deps = devm_kzalloc(dev, deps_size, GFP_KERNEL);
- if (!clk_deps)
- return -ENOMEM;
-
- for (i = 0; i < ARRAY_SIZE(clock_deps_name); i++) {
- struct clk *clk = of_clk_get_by_name(dev_of_node(dev),
- clock_deps_name[i]);
-
- if (IS_ERR(clk)) {
- if (PTR_ERR(clk) != -EINVAL && PTR_ERR(clk) != -ENOENT)
- return PTR_ERR(clk);
- } else {
- /* Device gets a reference count on the clock */
- clk_deps[i] = devm_clk_get(dev, __clk_get_name(clk));
- clk_put(clk);
- }
- }
-
- return 0;
-}
-
static int stm32mp1_rcc_clocks_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
- int ret = get_clock_deps(dev);
+ void __iomem *base;
- if (!ret)
- ret = stm32mp1_rcc_init(dev);
-
- return ret;
-}
-
-static void stm32mp1_rcc_clocks_remove(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
- struct device_node *child, *np = dev_of_node(dev);
+ base = devm_platform_ioremap_resource(pdev, 0);
+ if (WARN_ON(IS_ERR(base)))
+ return PTR_ERR(base);
- for_each_available_child_of_node(np, child)
- of_clk_del_provider(child);
+ return stm32_rcc_init(dev, stm32mp13_match_data, base);
}
static struct platform_driver stm32mp13_rcc_clocks_driver = {
@@ -1615,7 +1554,6 @@ static struct platform_driver stm32mp13_rcc_clocks_driver = {
.of_match_table = stm32mp13_match_data,
},
.probe = stm32mp1_rcc_clocks_probe,
- .remove_new = stm32mp1_rcc_clocks_remove,
};
static int __init stm32mp13_clocks_init(void)
--
2.25.1
From: Gabriel Fernandez <[email protected]>
Now RCC driver use '.index' of clk_parent_data struct to define a parent.
The majority of parents are SCMI clocks, then dt-bindings must be fixed.
Fixes: b5be49db3d47 ("dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform")
Signed-off-by: Gabriel Fernandez <[email protected]>
---
.../bindings/clock/st,stm32mp25-rcc.yaml | 171 ++++++++++++++++--
1 file changed, 155 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
index 7732e79a42b9..57bd4e7157bd 100644
--- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
+++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
@@ -38,22 +38,87 @@ properties:
- description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
- description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
- description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
-
- clock-names:
- items:
- - const: hse
- - const: hsi
- - const: msi
- - const: lse
- - const: lsi
-
+ - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)
+ - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
+ - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
+ - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
+ - description: CK_SCMI_ICN_DDR DDR interconnect bus clock
+ - description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock
+ - description: CK_SCMI_ICN_HSL HSL interconnect bus clock
+ - description: CK_SCMI_ICN_NIC NIC interconnect bus clock
+ - description: CK_SCMI_ICN_VID Video interconnect bus clock
+ - description: CK_SCMI_FLEXGEN_07 flexgen clock 7
+ - description: CK_SCMI_FLEXGEN_08 flexgen clock 8
+ - description: CK_SCMI_FLEXGEN_09 flexgen clock 9
+ - description: CK_SCMI_FLEXGEN_10 flexgen clock 10
+ - description: CK_SCMI_FLEXGEN_11 flexgen clock 11
+ - description: CK_SCMI_FLEXGEN_12 flexgen clock 12
+ - description: CK_SCMI_FLEXGEN_13 flexgen clock 13
+ - description: CK_SCMI_FLEXGEN_14 flexgen clock 14
+ - description: CK_SCMI_FLEXGEN_15 flexgen clock 15
+ - description: CK_SCMI_FLEXGEN_16 flexgen clock 16
+ - description: CK_SCMI_FLEXGEN_17 flexgen clock 17
+ - description: CK_SCMI_FLEXGEN_18 flexgen clock 18
+ - description: CK_SCMI_FLEXGEN_19 flexgen clock 19
+ - description: CK_SCMI_FLEXGEN_20 flexgen clock 20
+ - description: CK_SCMI_FLEXGEN_21 flexgen clock 21
+ - description: CK_SCMI_FLEXGEN_22 flexgen clock 22
+ - description: CK_SCMI_FLEXGEN_23 flexgen clock 23
+ - description: CK_SCMI_FLEXGEN_24 flexgen clock 24
+ - description: CK_SCMI_FLEXGEN_25 flexgen clock 25
+ - description: CK_SCMI_FLEXGEN_26 flexgen clock 26
+ - description: CK_SCMI_FLEXGEN_27 flexgen clock 27
+ - description: CK_SCMI_FLEXGEN_28 flexgen clock 28
+ - description: CK_SCMI_FLEXGEN_29 flexgen clock 29
+ - description: CK_SCMI_FLEXGEN_30 flexgen clock 30
+ - description: CK_SCMI_FLEXGEN_31 flexgen clock 31
+ - description: CK_SCMI_FLEXGEN_32 flexgen clock 32
+ - description: CK_SCMI_FLEXGEN_33 flexgen clock 33
+ - description: CK_SCMI_FLEXGEN_34 flexgen clock 34
+ - description: CK_SCMI_FLEXGEN_35 flexgen clock 35
+ - description: CK_SCMI_FLEXGEN_36 flexgen clock 36
+ - description: CK_SCMI_FLEXGEN_37 flexgen clock 37
+ - description: CK_SCMI_FLEXGEN_38 flexgen clock 38
+ - description: CK_SCMI_FLEXGEN_39 flexgen clock 39
+ - description: CK_SCMI_FLEXGEN_40 flexgen clock 40
+ - description: CK_SCMI_FLEXGEN_41 flexgen clock 41
+ - description: CK_SCMI_FLEXGEN_42 flexgen clock 42
+ - description: CK_SCMI_FLEXGEN_43 flexgen clock 43
+ - description: CK_SCMI_FLEXGEN_44 flexgen clock 44
+ - description: CK_SCMI_FLEXGEN_45 flexgen clock 45
+ - description: CK_SCMI_FLEXGEN_46 flexgen clock 46
+ - description: CK_SCMI_FLEXGEN_47 flexgen clock 47
+ - description: CK_SCMI_FLEXGEN_48 flexgen clock 48
+ - description: CK_SCMI_FLEXGEN_49 flexgen clock 49
+ - description: CK_SCMI_FLEXGEN_50 flexgen clock 50
+ - description: CK_SCMI_FLEXGEN_51 flexgen clock 51
+ - description: CK_SCMI_FLEXGEN_52 flexgen clock 52
+ - description: CK_SCMI_FLEXGEN_53 flexgen clock 53
+ - description: CK_SCMI_FLEXGEN_54 flexgen clock 54
+ - description: CK_SCMI_FLEXGEN_55 flexgen clock 55
+ - description: CK_SCMI_FLEXGEN_56 flexgen clock 56
+ - description: CK_SCMI_FLEXGEN_57 flexgen clock 57
+ - description: CK_SCMI_FLEXGEN_58 flexgen clock 58
+ - description: CK_SCMI_FLEXGEN_59 flexgen clock 59
+ - description: CK_SCMI_FLEXGEN_60 flexgen clock 60
+ - description: CK_SCMI_FLEXGEN_61 flexgen clock 61
+ - description: CK_SCMI_FLEXGEN_62 flexgen clock 62
+ - description: CK_SCMI_FLEXGEN_63 flexgen clock 63
+ - description: CK_SCMI_ICN_APB1 Peripheral bridge 1
+ - description: CK_SCMI_ICN_APB2 Peripheral bridge 2
+ - description: CK_SCMI_ICN_APB3 Peripheral bridge 3
+ - description: CK_SCMI_ICN_APB4 Peripheral bridge 4
+ - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub
+ - description: CK_SCMI_TIMG1 Peripheral bridge for timer1
+ - description: CK_SCMI_TIMG2 Peripheral bridge for timer2
+ - description: CK_SCMI_PLL3 PLL3 clock
+ - description: clk_dsi_txbyte DSI byte clock
required:
- compatible
- reg
- '#clock-cells'
- '#reset-cells'
- clocks
- - clock-names
additionalProperties: false
@@ -66,11 +131,85 @@ examples:
reg = <0x44200000 0x10000>;
#clock-cells = <1>;
#reset-cells = <1>;
- clock-names = "hse", "hsi", "msi", "lse", "lsi";
- clocks = <&scmi_clk CK_SCMI_HSE>,
- <&scmi_clk CK_SCMI_HSI>,
- <&scmi_clk CK_SCMI_MSI>,
- <&scmi_clk CK_SCMI_LSE>,
- <&scmi_clk CK_SCMI_LSI>;
+ clocks = <&scmi_clk CK_SCMI_HSE>,
+ <&scmi_clk CK_SCMI_HSI>,
+ <&scmi_clk CK_SCMI_MSI>,
+ <&scmi_clk CK_SCMI_LSE>,
+ <&scmi_clk CK_SCMI_LSI>,
+ <&scmi_clk CK_SCMI_HSE_DIV2>,
+ <&scmi_clk CK_SCMI_ICN_HS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_LS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_SDMMC>,
+ <&scmi_clk CK_SCMI_ICN_DDR>,
+ <&scmi_clk CK_SCMI_ICN_DISPLAY>,
+ <&scmi_clk CK_SCMI_ICN_HSL>,
+ <&scmi_clk CK_SCMI_ICN_NIC>,
+ <&scmi_clk CK_SCMI_ICN_VID>,
+ <&scmi_clk CK_SCMI_FLEXGEN_07>,
+ <&scmi_clk CK_SCMI_FLEXGEN_08>,
+ <&scmi_clk CK_SCMI_FLEXGEN_09>,
+ <&scmi_clk CK_SCMI_FLEXGEN_10>,
+ <&scmi_clk CK_SCMI_FLEXGEN_11>,
+ <&scmi_clk CK_SCMI_FLEXGEN_12>,
+ <&scmi_clk CK_SCMI_FLEXGEN_13>,
+ <&scmi_clk CK_SCMI_FLEXGEN_14>,
+ <&scmi_clk CK_SCMI_FLEXGEN_15>,
+ <&scmi_clk CK_SCMI_FLEXGEN_16>,
+ <&scmi_clk CK_SCMI_FLEXGEN_17>,
+ <&scmi_clk CK_SCMI_FLEXGEN_18>,
+ <&scmi_clk CK_SCMI_FLEXGEN_19>,
+ <&scmi_clk CK_SCMI_FLEXGEN_20>,
+ <&scmi_clk CK_SCMI_FLEXGEN_21>,
+ <&scmi_clk CK_SCMI_FLEXGEN_22>,
+ <&scmi_clk CK_SCMI_FLEXGEN_23>,
+ <&scmi_clk CK_SCMI_FLEXGEN_24>,
+ <&scmi_clk CK_SCMI_FLEXGEN_25>,
+ <&scmi_clk CK_SCMI_FLEXGEN_26>,
+ <&scmi_clk CK_SCMI_FLEXGEN_27>,
+ <&scmi_clk CK_SCMI_FLEXGEN_28>,
+ <&scmi_clk CK_SCMI_FLEXGEN_29>,
+ <&scmi_clk CK_SCMI_FLEXGEN_30>,
+ <&scmi_clk CK_SCMI_FLEXGEN_31>,
+ <&scmi_clk CK_SCMI_FLEXGEN_32>,
+ <&scmi_clk CK_SCMI_FLEXGEN_33>,
+ <&scmi_clk CK_SCMI_FLEXGEN_34>,
+ <&scmi_clk CK_SCMI_FLEXGEN_35>,
+ <&scmi_clk CK_SCMI_FLEXGEN_36>,
+ <&scmi_clk CK_SCMI_FLEXGEN_37>,
+ <&scmi_clk CK_SCMI_FLEXGEN_38>,
+ <&scmi_clk CK_SCMI_FLEXGEN_39>,
+ <&scmi_clk CK_SCMI_FLEXGEN_40>,
+ <&scmi_clk CK_SCMI_FLEXGEN_41>,
+ <&scmi_clk CK_SCMI_FLEXGEN_42>,
+ <&scmi_clk CK_SCMI_FLEXGEN_43>,
+ <&scmi_clk CK_SCMI_FLEXGEN_44>,
+ <&scmi_clk CK_SCMI_FLEXGEN_45>,
+ <&scmi_clk CK_SCMI_FLEXGEN_46>,
+ <&scmi_clk CK_SCMI_FLEXGEN_47>,
+ <&scmi_clk CK_SCMI_FLEXGEN_48>,
+ <&scmi_clk CK_SCMI_FLEXGEN_49>,
+ <&scmi_clk CK_SCMI_FLEXGEN_50>,
+ <&scmi_clk CK_SCMI_FLEXGEN_51>,
+ <&scmi_clk CK_SCMI_FLEXGEN_52>,
+ <&scmi_clk CK_SCMI_FLEXGEN_53>,
+ <&scmi_clk CK_SCMI_FLEXGEN_54>,
+ <&scmi_clk CK_SCMI_FLEXGEN_55>,
+ <&scmi_clk CK_SCMI_FLEXGEN_56>,
+ <&scmi_clk CK_SCMI_FLEXGEN_57>,
+ <&scmi_clk CK_SCMI_FLEXGEN_58>,
+ <&scmi_clk CK_SCMI_FLEXGEN_59>,
+ <&scmi_clk CK_SCMI_FLEXGEN_60>,
+ <&scmi_clk CK_SCMI_FLEXGEN_61>,
+ <&scmi_clk CK_SCMI_FLEXGEN_62>,
+ <&scmi_clk CK_SCMI_FLEXGEN_63>,
+ <&scmi_clk CK_SCMI_ICN_APB1>,
+ <&scmi_clk CK_SCMI_ICN_APB2>,
+ <&scmi_clk CK_SCMI_ICN_APB3>,
+ <&scmi_clk CK_SCMI_ICN_APB4>,
+ <&scmi_clk CK_SCMI_ICN_APBDBG>,
+ <&scmi_clk CK_SCMI_TIMG1>,
+ <&scmi_clk CK_SCMI_TIMG2>,
+ <&scmi_clk CK_SCMI_PLL3>,
+ <&clk_dsi_txbyte>;
};
...
--
2.25.1
From: Gabriel Fernandez <[email protected]>
Add RCC support to manage clocks and resets on the STM32MP25.
Signed-off-by: Gabriel Fernandez <[email protected]>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 144 ++++++++++++++++++-------
arch/arm64/boot/dts/st/stm32mp255.dtsi | 4 +-
2 files changed, 110 insertions(+), 38 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 5dd4f3580a60..15b79d26d1c6 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -3,7 +3,9 @@
* Copyright (C) STMicroelectronics 2023 - All Rights Reserved
* Author: Alexandre Torgue <[email protected]> for STMicroelectronics.
*/
+#include <dt-bindings/clock/st,stm32mp25-rcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/st,stm32mp25-rcc.h>
/ {
#address-cells = <2>;
@@ -35,34 +37,16 @@ arm_wdt: watchdog {
};
clocks {
- ck_flexgen_08: ck-flexgen-08 {
+ clk_dsi_txbyte: txbyteclk {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <100000000>;
+ clock-frequency = <0>;
};
- ck_flexgen_51: ck-flexgen-51 {
+ clk_rcbsec: clk-rcbsec {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_ls_mcu: ck-icn-ls-mcu {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_p_vdec: ck-icn-p-vdec {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_p_venc: ck-icn-p-venc {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
+ clock-frequency = <64000000>;
};
};
@@ -134,7 +118,7 @@ usart2: serial@400e0000 {
compatible = "st,stm32h7-uart";
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_flexgen_08>;
+ clocks = <&rcc CK_KER_USART2>;
status = "disabled";
};
@@ -143,8 +127,9 @@ sdmmc1: mmc@48220000 {
arm,primecell-periphid = <0x00353180>;
reg = <0x48220000 0x400>, <0x44230400 0x8>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_flexgen_51>;
+ clocks = <&rcc CK_KER_SDMMC1 >;
clock-names = "apb_pclk";
+ resets = <&rcc SDMMC1_R>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <120000000>;
@@ -168,6 +153,93 @@ package_otp@1e8 {
};
};
+ rcc: clock-controller@44200000 {
+ compatible = "st,stm32mp25-rcc";
+ reg = <0x44200000 0x10000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ clocks = <&scmi_clk CK_SCMI_HSE>,
+ <&scmi_clk CK_SCMI_HSI>,
+ <&scmi_clk CK_SCMI_MSI>,
+ <&scmi_clk CK_SCMI_LSE>,
+ <&scmi_clk CK_SCMI_LSI>,
+ <&scmi_clk CK_SCMI_HSE_DIV2>,
+ <&scmi_clk CK_SCMI_ICN_HS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_LS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_SDMMC>,
+ <&scmi_clk CK_SCMI_ICN_DDR>,
+ <&scmi_clk CK_SCMI_ICN_DISPLAY>,
+ <&scmi_clk CK_SCMI_ICN_HSL>,
+ <&scmi_clk CK_SCMI_ICN_NIC>,
+ <&scmi_clk CK_SCMI_ICN_VID>,
+ <&scmi_clk CK_SCMI_FLEXGEN_07>,
+ <&scmi_clk CK_SCMI_FLEXGEN_08>,
+ <&scmi_clk CK_SCMI_FLEXGEN_09>,
+ <&scmi_clk CK_SCMI_FLEXGEN_10>,
+ <&scmi_clk CK_SCMI_FLEXGEN_11>,
+ <&scmi_clk CK_SCMI_FLEXGEN_12>,
+ <&scmi_clk CK_SCMI_FLEXGEN_13>,
+ <&scmi_clk CK_SCMI_FLEXGEN_14>,
+ <&scmi_clk CK_SCMI_FLEXGEN_15>,
+ <&scmi_clk CK_SCMI_FLEXGEN_16>,
+ <&scmi_clk CK_SCMI_FLEXGEN_17>,
+ <&scmi_clk CK_SCMI_FLEXGEN_18>,
+ <&scmi_clk CK_SCMI_FLEXGEN_19>,
+ <&scmi_clk CK_SCMI_FLEXGEN_20>,
+ <&scmi_clk CK_SCMI_FLEXGEN_21>,
+ <&scmi_clk CK_SCMI_FLEXGEN_22>,
+ <&scmi_clk CK_SCMI_FLEXGEN_23>,
+ <&scmi_clk CK_SCMI_FLEXGEN_24>,
+ <&scmi_clk CK_SCMI_FLEXGEN_25>,
+ <&scmi_clk CK_SCMI_FLEXGEN_26>,
+ <&scmi_clk CK_SCMI_FLEXGEN_27>,
+ <&scmi_clk CK_SCMI_FLEXGEN_28>,
+ <&scmi_clk CK_SCMI_FLEXGEN_29>,
+ <&scmi_clk CK_SCMI_FLEXGEN_30>,
+ <&scmi_clk CK_SCMI_FLEXGEN_31>,
+ <&scmi_clk CK_SCMI_FLEXGEN_32>,
+ <&scmi_clk CK_SCMI_FLEXGEN_33>,
+ <&scmi_clk CK_SCMI_FLEXGEN_34>,
+ <&scmi_clk CK_SCMI_FLEXGEN_35>,
+ <&scmi_clk CK_SCMI_FLEXGEN_36>,
+ <&scmi_clk CK_SCMI_FLEXGEN_37>,
+ <&scmi_clk CK_SCMI_FLEXGEN_38>,
+ <&scmi_clk CK_SCMI_FLEXGEN_39>,
+ <&scmi_clk CK_SCMI_FLEXGEN_40>,
+ <&scmi_clk CK_SCMI_FLEXGEN_41>,
+ <&scmi_clk CK_SCMI_FLEXGEN_42>,
+ <&scmi_clk CK_SCMI_FLEXGEN_43>,
+ <&scmi_clk CK_SCMI_FLEXGEN_44>,
+ <&scmi_clk CK_SCMI_FLEXGEN_45>,
+ <&scmi_clk CK_SCMI_FLEXGEN_46>,
+ <&scmi_clk CK_SCMI_FLEXGEN_47>,
+ <&scmi_clk CK_SCMI_FLEXGEN_48>,
+ <&scmi_clk CK_SCMI_FLEXGEN_49>,
+ <&scmi_clk CK_SCMI_FLEXGEN_50>,
+ <&scmi_clk CK_SCMI_FLEXGEN_51>,
+ <&scmi_clk CK_SCMI_FLEXGEN_52>,
+ <&scmi_clk CK_SCMI_FLEXGEN_53>,
+ <&scmi_clk CK_SCMI_FLEXGEN_54>,
+ <&scmi_clk CK_SCMI_FLEXGEN_55>,
+ <&scmi_clk CK_SCMI_FLEXGEN_56>,
+ <&scmi_clk CK_SCMI_FLEXGEN_57>,
+ <&scmi_clk CK_SCMI_FLEXGEN_58>,
+ <&scmi_clk CK_SCMI_FLEXGEN_59>,
+ <&scmi_clk CK_SCMI_FLEXGEN_60>,
+ <&scmi_clk CK_SCMI_FLEXGEN_61>,
+ <&scmi_clk CK_SCMI_FLEXGEN_62>,
+ <&scmi_clk CK_SCMI_FLEXGEN_63>,
+ <&scmi_clk CK_SCMI_ICN_APB1>,
+ <&scmi_clk CK_SCMI_ICN_APB2>,
+ <&scmi_clk CK_SCMI_ICN_APB3>,
+ <&scmi_clk CK_SCMI_ICN_APB4>,
+ <&scmi_clk CK_SCMI_ICN_APBDBG>,
+ <&scmi_clk CK_SCMI_TIMG1>,
+ <&scmi_clk CK_SCMI_TIMG2>,
+ <&scmi_clk CK_SCMI_PLL3>,
+ <&clk_dsi_txbyte>;
+ };
+
syscfg: syscon@44230000 {
compatible = "st,stm32mp25-syscfg", "syscon";
reg = <0x44230000 0x10000>;
@@ -186,7 +258,7 @@ gpioa: gpio@44240000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOA>;
st,bank-name = "GPIOA";
status = "disabled";
};
@@ -197,7 +269,7 @@ gpiob: gpio@44250000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x10000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOB>;
st,bank-name = "GPIOB";
status = "disabled";
};
@@ -208,7 +280,7 @@ gpioc: gpio@44260000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x20000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOC>;
st,bank-name = "GPIOC";
status = "disabled";
};
@@ -219,7 +291,7 @@ gpiod: gpio@44270000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x30000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOD>;
st,bank-name = "GPIOD";
status = "disabled";
};
@@ -230,7 +302,7 @@ gpioe: gpio@44280000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x40000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOE>;
st,bank-name = "GPIOE";
status = "disabled";
};
@@ -241,7 +313,7 @@ gpiof: gpio@44290000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x50000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOF>;
st,bank-name = "GPIOF";
status = "disabled";
};
@@ -252,7 +324,7 @@ gpiog: gpio@442a0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x60000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOG>;
st,bank-name = "GPIOG";
status = "disabled";
};
@@ -263,7 +335,7 @@ gpioh: gpio@442b0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x70000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOH>;
st,bank-name = "GPIOH";
status = "disabled";
};
@@ -274,7 +346,7 @@ gpioi: gpio@442c0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x80000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOI>;
st,bank-name = "GPIOI";
status = "disabled";
};
@@ -285,7 +357,7 @@ gpioj: gpio@442d0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x90000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOJ>;
st,bank-name = "GPIOJ";
status = "disabled";
};
@@ -296,7 +368,7 @@ gpiok: gpio@442e0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xa0000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOK>;
st,bank-name = "GPIOK";
status = "disabled";
};
@@ -315,7 +387,7 @@ gpioz: gpio@46200000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOZ>;
st,bank-name = "GPIOZ";
st,bank-ioport = <11>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index 17f197c5b22b..d5175a1f339c 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -12,14 +12,14 @@ vdec: vdec@480d0000 {
compatible = "st,stm32mp25-vdec";
reg = <0x480d0000 0x3c8>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_icn_p_vdec>;
+ clocks = <&rcc CK_BUS_VDEC>;
};
venc: venc@480e0000 {
compatible = "st,stm32mp25-venc";
reg = <0x480e0000 0x800>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&rcc CK_BUS_VENC>;
};
};
};
--
2.25.1
On Thu, Feb 08, 2024 at 03:22:59PM +0100, [email protected] wrote:
> From: Gabriel Fernandez <[email protected]>
>
> Now RCC driver use '.index' of clk_parent_data struct to define a parent.
The RCC driver in linux might have stopped using the names, but they
were a required property that could be replied upon by other software
too. Have you checked U-Boot or *BSD etc to make sure clock-names are
not used there?
Thanks,
Conor.
> The majority of parents are SCMI clocks, then dt-bindings must be fixed.
>
> Fixes: b5be49db3d47 ("dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform")
>
> Signed-off-by: Gabriel Fernandez <[email protected]>
> ---
> .../bindings/clock/st,stm32mp25-rcc.yaml | 171 ++++++++++++++++--
> 1 file changed, 155 insertions(+), 16 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
> index 7732e79a42b9..57bd4e7157bd 100644
> --- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
> @@ -38,22 +38,87 @@ properties:
> - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
> - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
> - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
> -
> - clock-names:
> - items:
> - - const: hse
> - - const: hsi
> - - const: msi
> - - const: lse
> - - const: lsi
> -
> + - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)
> + - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
> + - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
> + - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
> + - description: CK_SCMI_ICN_DDR DDR interconnect bus clock
> + - description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock
> + - description: CK_SCMI_ICN_HSL HSL interconnect bus clock
> + - description: CK_SCMI_ICN_NIC NIC interconnect bus clock
> + - description: CK_SCMI_ICN_VID Video interconnect bus clock
> + - description: CK_SCMI_FLEXGEN_07 flexgen clock 7
> + - description: CK_SCMI_FLEXGEN_08 flexgen clock 8
> + - description: CK_SCMI_FLEXGEN_09 flexgen clock 9
> + - description: CK_SCMI_FLEXGEN_10 flexgen clock 10
> + - description: CK_SCMI_FLEXGEN_11 flexgen clock 11
> + - description: CK_SCMI_FLEXGEN_12 flexgen clock 12
> + - description: CK_SCMI_FLEXGEN_13 flexgen clock 13
> + - description: CK_SCMI_FLEXGEN_14 flexgen clock 14
> + - description: CK_SCMI_FLEXGEN_15 flexgen clock 15
> + - description: CK_SCMI_FLEXGEN_16 flexgen clock 16
> + - description: CK_SCMI_FLEXGEN_17 flexgen clock 17
> + - description: CK_SCMI_FLEXGEN_18 flexgen clock 18
> + - description: CK_SCMI_FLEXGEN_19 flexgen clock 19
> + - description: CK_SCMI_FLEXGEN_20 flexgen clock 20
> + - description: CK_SCMI_FLEXGEN_21 flexgen clock 21
> + - description: CK_SCMI_FLEXGEN_22 flexgen clock 22
> + - description: CK_SCMI_FLEXGEN_23 flexgen clock 23
> + - description: CK_SCMI_FLEXGEN_24 flexgen clock 24
> + - description: CK_SCMI_FLEXGEN_25 flexgen clock 25
> + - description: CK_SCMI_FLEXGEN_26 flexgen clock 26
> + - description: CK_SCMI_FLEXGEN_27 flexgen clock 27
> + - description: CK_SCMI_FLEXGEN_28 flexgen clock 28
> + - description: CK_SCMI_FLEXGEN_29 flexgen clock 29
> + - description: CK_SCMI_FLEXGEN_30 flexgen clock 30
> + - description: CK_SCMI_FLEXGEN_31 flexgen clock 31
> + - description: CK_SCMI_FLEXGEN_32 flexgen clock 32
> + - description: CK_SCMI_FLEXGEN_33 flexgen clock 33
> + - description: CK_SCMI_FLEXGEN_34 flexgen clock 34
> + - description: CK_SCMI_FLEXGEN_35 flexgen clock 35
> + - description: CK_SCMI_FLEXGEN_36 flexgen clock 36
> + - description: CK_SCMI_FLEXGEN_37 flexgen clock 37
> + - description: CK_SCMI_FLEXGEN_38 flexgen clock 38
> + - description: CK_SCMI_FLEXGEN_39 flexgen clock 39
> + - description: CK_SCMI_FLEXGEN_40 flexgen clock 40
> + - description: CK_SCMI_FLEXGEN_41 flexgen clock 41
> + - description: CK_SCMI_FLEXGEN_42 flexgen clock 42
> + - description: CK_SCMI_FLEXGEN_43 flexgen clock 43
> + - description: CK_SCMI_FLEXGEN_44 flexgen clock 44
> + - description: CK_SCMI_FLEXGEN_45 flexgen clock 45
> + - description: CK_SCMI_FLEXGEN_46 flexgen clock 46
> + - description: CK_SCMI_FLEXGEN_47 flexgen clock 47
> + - description: CK_SCMI_FLEXGEN_48 flexgen clock 48
> + - description: CK_SCMI_FLEXGEN_49 flexgen clock 49
> + - description: CK_SCMI_FLEXGEN_50 flexgen clock 50
> + - description: CK_SCMI_FLEXGEN_51 flexgen clock 51
> + - description: CK_SCMI_FLEXGEN_52 flexgen clock 52
> + - description: CK_SCMI_FLEXGEN_53 flexgen clock 53
> + - description: CK_SCMI_FLEXGEN_54 flexgen clock 54
> + - description: CK_SCMI_FLEXGEN_55 flexgen clock 55
> + - description: CK_SCMI_FLEXGEN_56 flexgen clock 56
> + - description: CK_SCMI_FLEXGEN_57 flexgen clock 57
> + - description: CK_SCMI_FLEXGEN_58 flexgen clock 58
> + - description: CK_SCMI_FLEXGEN_59 flexgen clock 59
> + - description: CK_SCMI_FLEXGEN_60 flexgen clock 60
> + - description: CK_SCMI_FLEXGEN_61 flexgen clock 61
> + - description: CK_SCMI_FLEXGEN_62 flexgen clock 62
> + - description: CK_SCMI_FLEXGEN_63 flexgen clock 63
> + - description: CK_SCMI_ICN_APB1 Peripheral bridge 1
> + - description: CK_SCMI_ICN_APB2 Peripheral bridge 2
> + - description: CK_SCMI_ICN_APB3 Peripheral bridge 3
> + - description: CK_SCMI_ICN_APB4 Peripheral bridge 4
> + - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub
> + - description: CK_SCMI_TIMG1 Peripheral bridge for timer1
> + - description: CK_SCMI_TIMG2 Peripheral bridge for timer2
> + - description: CK_SCMI_PLL3 PLL3 clock
> + - description: clk_dsi_txbyte DSI byte clock
> required:
> - compatible
> - reg
> - '#clock-cells'
> - '#reset-cells'
> - clocks
> - - clock-names
>
> additionalProperties: false
>
> @@ -66,11 +131,85 @@ examples:
> reg = <0x44200000 0x10000>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> - clock-names = "hse", "hsi", "msi", "lse", "lsi";
> - clocks = <&scmi_clk CK_SCMI_HSE>,
> - <&scmi_clk CK_SCMI_HSI>,
> - <&scmi_clk CK_SCMI_MSI>,
> - <&scmi_clk CK_SCMI_LSE>,
> - <&scmi_clk CK_SCMI_LSI>;
> + clocks = <&scmi_clk CK_SCMI_HSE>,
> + <&scmi_clk CK_SCMI_HSI>,
> + <&scmi_clk CK_SCMI_MSI>,
> + <&scmi_clk CK_SCMI_LSE>,
> + <&scmi_clk CK_SCMI_LSI>,
> + <&scmi_clk CK_SCMI_HSE_DIV2>,
> + <&scmi_clk CK_SCMI_ICN_HS_MCU>,
> + <&scmi_clk CK_SCMI_ICN_LS_MCU>,
> + <&scmi_clk CK_SCMI_ICN_SDMMC>,
> + <&scmi_clk CK_SCMI_ICN_DDR>,
> + <&scmi_clk CK_SCMI_ICN_DISPLAY>,
> + <&scmi_clk CK_SCMI_ICN_HSL>,
> + <&scmi_clk CK_SCMI_ICN_NIC>,
> + <&scmi_clk CK_SCMI_ICN_VID>,
> + <&scmi_clk CK_SCMI_FLEXGEN_07>,
> + <&scmi_clk CK_SCMI_FLEXGEN_08>,
> + <&scmi_clk CK_SCMI_FLEXGEN_09>,
> + <&scmi_clk CK_SCMI_FLEXGEN_10>,
> + <&scmi_clk CK_SCMI_FLEXGEN_11>,
> + <&scmi_clk CK_SCMI_FLEXGEN_12>,
> + <&scmi_clk CK_SCMI_FLEXGEN_13>,
> + <&scmi_clk CK_SCMI_FLEXGEN_14>,
> + <&scmi_clk CK_SCMI_FLEXGEN_15>,
> + <&scmi_clk CK_SCMI_FLEXGEN_16>,
> + <&scmi_clk CK_SCMI_FLEXGEN_17>,
> + <&scmi_clk CK_SCMI_FLEXGEN_18>,
> + <&scmi_clk CK_SCMI_FLEXGEN_19>,
> + <&scmi_clk CK_SCMI_FLEXGEN_20>,
> + <&scmi_clk CK_SCMI_FLEXGEN_21>,
> + <&scmi_clk CK_SCMI_FLEXGEN_22>,
> + <&scmi_clk CK_SCMI_FLEXGEN_23>,
> + <&scmi_clk CK_SCMI_FLEXGEN_24>,
> + <&scmi_clk CK_SCMI_FLEXGEN_25>,
> + <&scmi_clk CK_SCMI_FLEXGEN_26>,
> + <&scmi_clk CK_SCMI_FLEXGEN_27>,
> + <&scmi_clk CK_SCMI_FLEXGEN_28>,
> + <&scmi_clk CK_SCMI_FLEXGEN_29>,
> + <&scmi_clk CK_SCMI_FLEXGEN_30>,
> + <&scmi_clk CK_SCMI_FLEXGEN_31>,
> + <&scmi_clk CK_SCMI_FLEXGEN_32>,
> + <&scmi_clk CK_SCMI_FLEXGEN_33>,
> + <&scmi_clk CK_SCMI_FLEXGEN_34>,
> + <&scmi_clk CK_SCMI_FLEXGEN_35>,
> + <&scmi_clk CK_SCMI_FLEXGEN_36>,
> + <&scmi_clk CK_SCMI_FLEXGEN_37>,
> + <&scmi_clk CK_SCMI_FLEXGEN_38>,
> + <&scmi_clk CK_SCMI_FLEXGEN_39>,
> + <&scmi_clk CK_SCMI_FLEXGEN_40>,
> + <&scmi_clk CK_SCMI_FLEXGEN_41>,
> + <&scmi_clk CK_SCMI_FLEXGEN_42>,
> + <&scmi_clk CK_SCMI_FLEXGEN_43>,
> + <&scmi_clk CK_SCMI_FLEXGEN_44>,
> + <&scmi_clk CK_SCMI_FLEXGEN_45>,
> + <&scmi_clk CK_SCMI_FLEXGEN_46>,
> + <&scmi_clk CK_SCMI_FLEXGEN_47>,
> + <&scmi_clk CK_SCMI_FLEXGEN_48>,
> + <&scmi_clk CK_SCMI_FLEXGEN_49>,
> + <&scmi_clk CK_SCMI_FLEXGEN_50>,
> + <&scmi_clk CK_SCMI_FLEXGEN_51>,
> + <&scmi_clk CK_SCMI_FLEXGEN_52>,
> + <&scmi_clk CK_SCMI_FLEXGEN_53>,
> + <&scmi_clk CK_SCMI_FLEXGEN_54>,
> + <&scmi_clk CK_SCMI_FLEXGEN_55>,
> + <&scmi_clk CK_SCMI_FLEXGEN_56>,
> + <&scmi_clk CK_SCMI_FLEXGEN_57>,
> + <&scmi_clk CK_SCMI_FLEXGEN_58>,
> + <&scmi_clk CK_SCMI_FLEXGEN_59>,
> + <&scmi_clk CK_SCMI_FLEXGEN_60>,
> + <&scmi_clk CK_SCMI_FLEXGEN_61>,
> + <&scmi_clk CK_SCMI_FLEXGEN_62>,
> + <&scmi_clk CK_SCMI_FLEXGEN_63>,
> + <&scmi_clk CK_SCMI_ICN_APB1>,
> + <&scmi_clk CK_SCMI_ICN_APB2>,
> + <&scmi_clk CK_SCMI_ICN_APB3>,
> + <&scmi_clk CK_SCMI_ICN_APB4>,
> + <&scmi_clk CK_SCMI_ICN_APBDBG>,
> + <&scmi_clk CK_SCMI_TIMG1>,
> + <&scmi_clk CK_SCMI_TIMG2>,
> + <&scmi_clk CK_SCMI_PLL3>,
> + <&clk_dsi_txbyte>;
> };
> ...
> --
> 2.25.1
>
Hi Conor,
Thank's for your review.
Yes, I have checked that point. I have also written the RCC driver for
TFA/OPTE/UBOOT and once
I receive Ack in the Kernel, I will upstream the other components.
Best Regards
Gabriel
On 2/8/24 19:06, Conor Dooley wrote:
> On Thu, Feb 08, 2024 at 03:22:59PM +0100, [email protected] wrote:
>> From: Gabriel Fernandez <[email protected]>
>>
>> Now RCC driver use '.index' of clk_parent_data struct to define a parent.
> The RCC driver in linux might have stopped using the names, but they
> were a required property that could be replied upon by other software
> too. Have you checked U-Boot or *BSD etc to make sure clock-names are
> not used there?
>
> Thanks,
> Conor.
>
>> The majority of parents are SCMI clocks, then dt-bindings must be fixed.
>>
>> Fixes: b5be49db3d47 ("dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform")
>>
>> Signed-off-by: Gabriel Fernandez <[email protected]>
>> ---
>> .../bindings/clock/st,stm32mp25-rcc.yaml | 171 ++++++++++++++++--
>> 1 file changed, 155 insertions(+), 16 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> index 7732e79a42b9..57bd4e7157bd 100644
>> --- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> @@ -38,22 +38,87 @@ properties:
>> - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
>> - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
>> - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
>> -
>> - clock-names:
>> - items:
>> - - const: hse
>> - - const: hsi
>> - - const: msi
>> - - const: lse
>> - - const: lsi
>> -
>> + - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)
>> + - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
>> + - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
>> + - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
>> + - description: CK_SCMI_ICN_DDR DDR interconnect bus clock
>> + - description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock
>> + - description: CK_SCMI_ICN_HSL HSL interconnect bus clock
>> + - description: CK_SCMI_ICN_NIC NIC interconnect bus clock
>> + - description: CK_SCMI_ICN_VID Video interconnect bus clock
>> + - description: CK_SCMI_FLEXGEN_07 flexgen clock 7
>> + - description: CK_SCMI_FLEXGEN_08 flexgen clock 8
>> + - description: CK_SCMI_FLEXGEN_09 flexgen clock 9
>> + - description: CK_SCMI_FLEXGEN_10 flexgen clock 10
>> + - description: CK_SCMI_FLEXGEN_11 flexgen clock 11
>> + - description: CK_SCMI_FLEXGEN_12 flexgen clock 12
>> + - description: CK_SCMI_FLEXGEN_13 flexgen clock 13
>> + - description: CK_SCMI_FLEXGEN_14 flexgen clock 14
>> + - description: CK_SCMI_FLEXGEN_15 flexgen clock 15
>> + - description: CK_SCMI_FLEXGEN_16 flexgen clock 16
>> + - description: CK_SCMI_FLEXGEN_17 flexgen clock 17
>> + - description: CK_SCMI_FLEXGEN_18 flexgen clock 18
>> + - description: CK_SCMI_FLEXGEN_19 flexgen clock 19
>> + - description: CK_SCMI_FLEXGEN_20 flexgen clock 20
>> + - description: CK_SCMI_FLEXGEN_21 flexgen clock 21
>> + - description: CK_SCMI_FLEXGEN_22 flexgen clock 22
>> + - description: CK_SCMI_FLEXGEN_23 flexgen clock 23
>> + - description: CK_SCMI_FLEXGEN_24 flexgen clock 24
>> + - description: CK_SCMI_FLEXGEN_25 flexgen clock 25
>> + - description: CK_SCMI_FLEXGEN_26 flexgen clock 26
>> + - description: CK_SCMI_FLEXGEN_27 flexgen clock 27
>> + - description: CK_SCMI_FLEXGEN_28 flexgen clock 28
>> + - description: CK_SCMI_FLEXGEN_29 flexgen clock 29
>> + - description: CK_SCMI_FLEXGEN_30 flexgen clock 30
>> + - description: CK_SCMI_FLEXGEN_31 flexgen clock 31
>> + - description: CK_SCMI_FLEXGEN_32 flexgen clock 32
>> + - description: CK_SCMI_FLEXGEN_33 flexgen clock 33
>> + - description: CK_SCMI_FLEXGEN_34 flexgen clock 34
>> + - description: CK_SCMI_FLEXGEN_35 flexgen clock 35
>> + - description: CK_SCMI_FLEXGEN_36 flexgen clock 36
>> + - description: CK_SCMI_FLEXGEN_37 flexgen clock 37
>> + - description: CK_SCMI_FLEXGEN_38 flexgen clock 38
>> + - description: CK_SCMI_FLEXGEN_39 flexgen clock 39
>> + - description: CK_SCMI_FLEXGEN_40 flexgen clock 40
>> + - description: CK_SCMI_FLEXGEN_41 flexgen clock 41
>> + - description: CK_SCMI_FLEXGEN_42 flexgen clock 42
>> + - description: CK_SCMI_FLEXGEN_43 flexgen clock 43
>> + - description: CK_SCMI_FLEXGEN_44 flexgen clock 44
>> + - description: CK_SCMI_FLEXGEN_45 flexgen clock 45
>> + - description: CK_SCMI_FLEXGEN_46 flexgen clock 46
>> + - description: CK_SCMI_FLEXGEN_47 flexgen clock 47
>> + - description: CK_SCMI_FLEXGEN_48 flexgen clock 48
>> + - description: CK_SCMI_FLEXGEN_49 flexgen clock 49
>> + - description: CK_SCMI_FLEXGEN_50 flexgen clock 50
>> + - description: CK_SCMI_FLEXGEN_51 flexgen clock 51
>> + - description: CK_SCMI_FLEXGEN_52 flexgen clock 52
>> + - description: CK_SCMI_FLEXGEN_53 flexgen clock 53
>> + - description: CK_SCMI_FLEXGEN_54 flexgen clock 54
>> + - description: CK_SCMI_FLEXGEN_55 flexgen clock 55
>> + - description: CK_SCMI_FLEXGEN_56 flexgen clock 56
>> + - description: CK_SCMI_FLEXGEN_57 flexgen clock 57
>> + - description: CK_SCMI_FLEXGEN_58 flexgen clock 58
>> + - description: CK_SCMI_FLEXGEN_59 flexgen clock 59
>> + - description: CK_SCMI_FLEXGEN_60 flexgen clock 60
>> + - description: CK_SCMI_FLEXGEN_61 flexgen clock 61
>> + - description: CK_SCMI_FLEXGEN_62 flexgen clock 62
>> + - description: CK_SCMI_FLEXGEN_63 flexgen clock 63
>> + - description: CK_SCMI_ICN_APB1 Peripheral bridge 1
>> + - description: CK_SCMI_ICN_APB2 Peripheral bridge 2
>> + - description: CK_SCMI_ICN_APB3 Peripheral bridge 3
>> + - description: CK_SCMI_ICN_APB4 Peripheral bridge 4
>> + - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub
>> + - description: CK_SCMI_TIMG1 Peripheral bridge for timer1
>> + - description: CK_SCMI_TIMG2 Peripheral bridge for timer2
>> + - description: CK_SCMI_PLL3 PLL3 clock
>> + - description: clk_dsi_txbyte DSI byte clock
>> required:
>> - compatible
>> - reg
>> - '#clock-cells'
>> - '#reset-cells'
>> - clocks
>> - - clock-names
>>
>> additionalProperties: false
>>
>> @@ -66,11 +131,85 @@ examples:
>> reg = <0x44200000 0x10000>;
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> - clock-names = "hse", "hsi", "msi", "lse", "lsi";
>> - clocks = <&scmi_clk CK_SCMI_HSE>,
>> - <&scmi_clk CK_SCMI_HSI>,
>> - <&scmi_clk CK_SCMI_MSI>,
>> - <&scmi_clk CK_SCMI_LSE>,
>> - <&scmi_clk CK_SCMI_LSI>;
>> + clocks = <&scmi_clk CK_SCMI_HSE>,
>> + <&scmi_clk CK_SCMI_HSI>,
>> + <&scmi_clk CK_SCMI_MSI>,
>> + <&scmi_clk CK_SCMI_LSE>,
>> + <&scmi_clk CK_SCMI_LSI>,
>> + <&scmi_clk CK_SCMI_HSE_DIV2>,
>> + <&scmi_clk CK_SCMI_ICN_HS_MCU>,
>> + <&scmi_clk CK_SCMI_ICN_LS_MCU>,
>> + <&scmi_clk CK_SCMI_ICN_SDMMC>,
>> + <&scmi_clk CK_SCMI_ICN_DDR>,
>> + <&scmi_clk CK_SCMI_ICN_DISPLAY>,
>> + <&scmi_clk CK_SCMI_ICN_HSL>,
>> + <&scmi_clk CK_SCMI_ICN_NIC>,
>> + <&scmi_clk CK_SCMI_ICN_VID>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_07>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_08>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_09>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_10>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_11>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_12>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_13>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_14>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_15>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_16>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_17>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_18>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_19>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_20>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_21>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_22>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_23>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_24>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_25>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_26>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_27>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_28>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_29>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_30>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_31>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_32>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_33>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_34>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_35>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_36>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_37>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_38>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_39>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_40>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_41>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_42>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_43>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_44>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_45>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_46>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_47>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_48>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_49>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_50>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_51>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_52>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_53>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_54>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_55>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_56>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_57>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_58>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_59>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_60>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_61>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_62>,
>> + <&scmi_clk CK_SCMI_FLEXGEN_63>,
>> + <&scmi_clk CK_SCMI_ICN_APB1>,
>> + <&scmi_clk CK_SCMI_ICN_APB2>,
>> + <&scmi_clk CK_SCMI_ICN_APB3>,
>> + <&scmi_clk CK_SCMI_ICN_APB4>,
>> + <&scmi_clk CK_SCMI_ICN_APBDBG>,
>> + <&scmi_clk CK_SCMI_TIMG1>,
>> + <&scmi_clk CK_SCMI_TIMG2>,
>> + <&scmi_clk CK_SCMI_PLL3>,
>> + <&clk_dsi_txbyte>;
>> };
>> ...
>> --
>> 2.25.1
>>
On Fri, Feb 09, 2024 at 10:46:14AM +0100, Gabriel FERNANDEZ wrote:
> Hi Conor,
>
> Thank's for your review.
>
> Yes, I have checked that point. I have also written the RCC driver for
> TFA/OPTE/UBOOT and once
>
> I receive Ack in the Kernel, I will upstream the other components.
Okay, if you know theres no other implementations:
Acked-by: Conor Dooley <[email protected]>
btw, please avoid top posting in the future.
Thanks,
Conor.