DTS for the phone and some fly-by fixes
Patch 1 for Mark/sound
Rest for qcom
Signed-off-by: Konrad Dybcio <[email protected]>
---
Konrad Dybcio (7):
dt-bindings: ASoC: cs35l45: Add interrupts
dt-bindings: arm: qcom: Add Xperia 1 V
arm64: dts: qcom: sm8550: Mark QUPs and GPI dma-coherent
arm64: dts: qcom: sm8550: Mark APPS SMMU as dma-coherent
arm64: dts: qcom: sm8550: Add missing DWC3 quirks
arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent
arm64: dts: qcom: Add SM8550 Xperia 1 V
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
.../devicetree/bindings/sound/cirrus,cs35l45.yaml | 3 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 779 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8550.dtsi | 20 +-
5 files changed, 801 insertions(+), 3 deletions(-)
---
base-commit: ae00c445390b349e070a64dc62f08aa878db7248
change-id: 20240210-topic-1v-18e9697d2056
Best regards,
--
Konrad Dybcio <[email protected]>
This chip seems to have an IRQ line, let us describe it.
Signed-off-by: Konrad Dybcio <[email protected]>
---
Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
index 4c9acb8d4c4c..70f6c62aedca 100644
--- a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
+++ b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml
@@ -25,6 +25,9 @@ properties:
reg:
maxItems: 1
+ interrupts:
+ maxItems: 1
+
'#sound-dai-cells':
const: 1
--
2.43.1
Like on earlier flagship Qualcomm SoCs, the SMMU is dma-coherent.
Mark it as such.
Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index d696ec6c6850..868d48b85555 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3934,6 +3934,7 @@ apps_smmu: iommu@15000000 {
<GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
};
intc: interrupt-controller@17100000 {
--
2.43.1
In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 925e56317fb0..e845c8814fb9 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3207,6 +3207,7 @@ usb_1_dwc3: usb@a600000 {
snps,usb2-lpm-disable;
snps,has-lpm-erratum;
tx-fifo-resize;
+ dma-coherent;
ports {
#address-cells = <1>;
--
2.43.1
On 12/02/2024 14:10, Konrad Dybcio wrote:
> This chip seems to have an IRQ line, let us describe it.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
Subject: ASoC: dt-bindings: cs35l45......
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 12/02/2024 14:10, Konrad Dybcio wrote:
> Like on earlier flagship Qualcomm SoCs, the SMMU is dma-coherent.
> Mark it as such.
>
> Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index d696ec6c6850..868d48b85555 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -3934,6 +3934,7 @@ apps_smmu: iommu@15000000 {
> <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
> + dma-coherent;
> };
>
> intc: interrupt-controller@17100000 {
>
Reviewed-by: Neil Armstrong <[email protected]>
On 12/02/2024 14:10, Konrad Dybcio wrote:
> In a fairly new development, Qualcomm somehow made the DWC3 block
> cache-coherent. Annotate that.
>
> Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 925e56317fb0..e845c8814fb9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -3207,6 +3207,7 @@ usb_1_dwc3: usb@a600000 {
> snps,usb2-lpm-disable;
> snps,has-lpm-erratum;
> tx-fifo-resize;
> + dma-coherent;
>
> ports {
> #address-cells = <1>;
>
Reviewed-by: Neil Armstrong <[email protected]>
Konrad,
> On Feb 12, 2024, at 7:25 AM, Krzysztof Kozlowski <[email protected]> wrote:
>
> On 12/02/2024 14:10, Konrad Dybcio wrote:
>> This chip seems to have an IRQ line, let us describe it.
>>
>> Signed-off-by: Konrad Dybcio <[email protected]>
>
> Subject: ASoC: dt-bindings: cs35l45……
ditto
>
>
> Acked-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Ricardo Rivera-Matos <[email protected] <mailto:[email protected]>>
>
> Best regards,
> Krzysztof
>
Thanks,
Ricardo
On Mon, 12 Feb 2024 14:10:08 +0100, Konrad Dybcio wrote:
> DTS for the phone and some fly-by fixes
>
> Patch 1 for Mark/sound
> Rest for qcom
>
>
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/7] dt-bindings: ASoC: cs35l45: Add interrupts
commit: d0611f617d823a87f04186ad165e2990208c040b
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
On Mon, 12 Feb 2024 14:10:08 +0100, Konrad Dybcio wrote:
> DTS for the phone and some fly-by fixes
>
> Patch 1 for Mark/sound
> Rest for qcom
>
>
Applied, thanks!
[2/7] dt-bindings: arm: qcom: Add Xperia 1 V
commit: 212729551c4186a1a1cbd80379375b1b54488369
[3/7] arm64: dts: qcom: sm8550: Mark QUPs and GPI dma-coherent
commit: 91fc74458d833dbc999aa04ca34c2a197711a0b6
[4/7] arm64: dts: qcom: sm8550: Mark APPS SMMU as dma-coherent
commit: 93395f9a8d52b89868d75e278adaf002f99dec22
[5/7] arm64: dts: qcom: sm8550: Add missing DWC3 quirks
commit: d18b5477dcea7775a562b3ba7aaa68772c8980ba
[6/7] arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent
commit: 6e4f7e53991ca7e70dc7d5d9d66c833091e1f6ae
[7/7] arm64: dts: qcom: Add SM8550 Xperia 1 V
commit: 39c596304e44781c1950ea0cbf178d6433ff9c71
Best regards,
--
Bjorn Andersson <[email protected]>