The main goal of the short series is to provide a procedure implementing
the auto-detection of the number of native Chip-Select signals supported
by the controller. The suggested algorithm is straightforward. It relies
on the fact that the SER register writable flags reflects the actual
number of available native chip-select signals. So the DW APB/AHB SSI
driver now tests the SER register for having the writable bits,
calculates the number of CS signals based on the number of set flags and
then initializes the num_cs private data field based on that, which then
will be passed to the SPI-core subsystem indicating the number of
supported hardware chip-selects. The implemented procedure will be useful
for the DW SSI device nodes not having the explicitly set "num-cs"
property. In case if the property is specified it will be utilized instead
of the auto-detection procedure.
Besides of that a small cleanup patch is introduced in the head of the
series. It converts the driver to using the BITS_TO_BYTES() macro instead
of the hard-coded DIV_ROUND_UP()-based calculation of the number of
bytes-per-transfer-word.
Link: https://lore.kernel.org/linux-spi/[email protected]
Changelog v2:
- Add a new patch:
[PATCH v2 3/4] spi: dw: Convert dw_spi::num_cs to u32
- Fix some spelling notes (@Andy).
Signed-off-by: Serge Semin <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: [email protected]
Cc: [email protected]
Serge Semin (4):
spi: dw: Convert to using BITS_TO_BYTES() macro
spi: dw: Add a number of native CS auto-detection
spi: dw: Convert dw_spi::num_cs to u32
spi: dw: Drop default number of CS setting
drivers/spi/spi-dw-core.c | 20 ++++++++++++++++----
drivers/spi/spi-dw-mmio.c | 8 ++------
drivers/spi/spi-dw.h | 2 +-
3 files changed, 19 insertions(+), 11 deletions(-)
--
2.43.0
Since commit dd3e7cba1627 ("ocfs2/dlm: move BITS_TO_BYTES() to bitops.h
for wider use") there is a generic helper available to calculate a number
of bytes needed to accommodate the specified number of bits. Let's use it
instead of the hard-coded DIV_ROUND_UP() macro function.
Signed-off-by: Serge Semin <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
---
drivers/spi/spi-dw-core.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 0274c9295514..722b5eb1f709 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -6,6 +6,7 @@
*/
#include <linux/bitfield.h>
+#include <linux/bitops.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/module.h>
@@ -421,10 +422,7 @@ static int dw_spi_transfer_one(struct spi_controller *host,
int ret;
dws->dma_mapped = 0;
- dws->n_bytes =
- roundup_pow_of_two(DIV_ROUND_UP(transfer->bits_per_word,
- BITS_PER_BYTE));
-
+ dws->n_bytes = roundup_pow_of_two(BITS_TO_BYTES(transfer->bits_per_word));
dws->tx = (void *)transfer->tx_buf;
dws->tx_len = transfer->len / dws->n_bytes;
dws->rx = transfer->rx_buf;
--
2.43.0
Aside with the FIFO depth and DFS field size it's possible to auto-detect
a number of native chip-select synthesized in the DW APB/AHB SSI IP-core.
It can be done just by writing ones to the SER register. The number of
writable flags in the register is limited by the SSI_NUM_SLAVES IP-core
synthesize parameter. All the upper flags are read-only and wired to zero.
Based on that let's add the number of native CS auto-detection procedure
so the low-level platform drivers wouldn't need to manually set it up
unless it's required to set a constraint due to platform-specific reasons
(for instance, due to a hardware bug).
Signed-off-by: Serge Semin <[email protected]>
---
drivers/spi/spi-dw-core.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 722b5eb1f709..ddfdb903047a 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -834,6 +834,20 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws)
DW_SPI_GET_BYTE(dws->ver, 1));
}
+ /*
+ * Try to detect the number of native chip-selects if the platform
+ * driver didn't set it up. There can be up to 16 lines configured.
+ */
+ if (!dws->num_cs) {
+ u32 ser;
+
+ dw_writel(dws, DW_SPI_SER, 0xffff);
+ ser = dw_readl(dws, DW_SPI_SER);
+ dw_writel(dws, DW_SPI_SER, 0);
+
+ dws->num_cs = hweight16(ser);
+ }
+
/*
* Try to detect the FIFO depth if not set by interface driver,
* the depth could be from 2 to 256 from HW spec
--
2.43.0
Number of native chip-select lines is either retrieved from the "num-cs"
DT-property or auto-detected in the generic DW APB/AHB SSI probe method.
In the former case the property is supposed to be of the "u32" size.
Convert the field type to being u32 then to be able to drop the temporary
variable afterwards.
Signed-off-by: Serge Semin <[email protected]>
---
Changelog v2:
- Just added.
---
drivers/spi/spi-dw.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 6cafeee8ee2a..fc267c6437ae 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -164,8 +164,8 @@ struct dw_spi {
u32 max_freq; /* max bus freq supported */
u32 reg_io_width; /* DR I/O width in bytes */
+ u32 num_cs; /* chip select lines */
u16 bus_num;
- u16 num_cs; /* supported slave numbers */
void (*set_cs)(struct spi_device *spi, bool enable);
/* Current message transfer state info */
--
2.43.0
DW APB/AHB SSI core now supports the procedure automatically detecting the
number of native chip-select lines. Thus there is no longer point in
defaulting to four CS if the platform doesn't specify the real number
especially seeing the default number didn't correspond to any original DW
APB/AHB databook.
Signed-off-by: Serge Semin <[email protected]>
---
Changelog v2:
- Drop temporal variable and pass dws_spi::num_cs directly.
---
drivers/spi/spi-dw-mmio.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index cc74cbe03431..c56de35eca98 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -320,7 +320,6 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
struct resource *mem;
struct dw_spi *dws;
int ret;
- int num_cs;
dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio),
GFP_KERNEL);
@@ -364,11 +363,8 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
&dws->reg_io_width))
dws->reg_io_width = 4;
- num_cs = 4;
-
- device_property_read_u32(&pdev->dev, "num-cs", &num_cs);
-
- dws->num_cs = num_cs;
+ /* Rely on the auto-detection if no property specified */
+ device_property_read_u32(&pdev->dev, "num-cs", &dws->num_cs);
init_func = device_get_match_data(&pdev->dev);
if (init_func) {
--
2.43.0
On Thu, Feb 22, 2024 at 7:28 PM Serge Semin <[email protected]> wrote:
>
> The main goal of the short series is to provide a procedure implementing
> the auto-detection of the number of native Chip-Select signals supported
> by the controller. The suggested algorithm is straightforward. It relies
> on the fact that the SER register writable flags reflects the actual
> number of available native chip-select signals. So the DW APB/AHB SSI
> driver now tests the SER register for having the writable bits,
> calculates the number of CS signals based on the number of set flags and
> then initializes the num_cs private data field based on that, which then
> will be passed to the SPI-core subsystem indicating the number of
> supported hardware chip-selects. The implemented procedure will be useful
> for the DW SSI device nodes not having the explicitly set "num-cs"
> property. In case if the property is specified it will be utilized instead
> of the auto-detection procedure.
>
> Besides of that a small cleanup patch is introduced in the head of the
> series. It converts the driver to using the BITS_TO_BYTES() macro instead
> of the hard-coded DIV_ROUND_UP()-based calculation of the number of
> bytes-per-transfer-word.
>
> Link: https://lore.kernel.org/linux-spi/[email protected]
> Changelog v2:
> - Add a new patch:
> [PATCH v2 3/4] spi: dw: Convert dw_spi::num_cs to u32
> - Fix some spelling notes (@Andy).
For all untagged,
Reviewed-by: Andy Shevchenko <[email protected]>
Thank you!
--
With Best Regards,
Andy Shevchenko