Hi,
This series first adds device nodes for USB0_PHY_CTRL and USB1_PHY_CTRL
in the wkup_conf node and fixus up the USB nodes to use the newly
added nodes.
Then it adds USB support for AM62P SoC and AM62P5-SK board.
In v5, we disable USB LPM support for all USB nodes as it is not supported.
Also Acks were added and To list updated.
Changelog in each patch.
cheers,
-roger
Signed-off-by: Roger Quadros <[email protected]>
---
Roger Quadros (4):
dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers
arm64: dts: ti: k3-am62p: add the USB sub-system
arm64: dts: ti: k3-am62a: Disable USB LPM
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 +-
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 8 ++-
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 50 +++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 ++++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++++
8 files changed, 156 insertions(+), 4 deletions(-)
---
base-commit: ab480b8036fde8c1ea628bb1027919bf399468e9
change-id: 20240223-b4-for-v6-5-am62-usb-typec-dt-769eec4c8c4a
Best regards,
--
Roger Quadros <[email protected]>
Add the compatible for TI AM62 USB PHY Control register. This
register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
is used to indicate the USB PHY PLL reference clock rate and
core voltage level to the USB controller.
[1] - https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changelog:
v5 - no change. Added Lee Jones in To list
v4 - no change. Added Rob's Acked-by
https://lore.kernel.org/all/[email protected]/
v3 - add compatibles in alphabetical order
https://lore.kernel.org/all/[email protected]/
v2 - New patch
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c..9437705af92f 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -72,6 +72,7 @@ properties:
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
+ - ti,am62-usb-phy-ctrl
- ti,am654-dss-oldi-io-ctrl
- const: syscon
--
2.34.1
Exposing the entire CTRL_MMR space to syscon is not a good idea.
Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
in the USB0/USB1 nodes.
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
---
Changelog:
v5 - no change.
v4 - no change. Added Andrew's Reviewed-by
https://lore.kernel.org/all/[email protected]/
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- moved am62p changes to next patch
- use new compatible for USB PHY CTRL node
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++
4 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index e9cffca073ef..23f1464b26ed 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -622,7 +622,7 @@ usbss0: dwc3-usb@f900000 {
reg = <0x00 0x0f900000 0x00 0x800>;
clocks = <&k3_clks 161 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -647,7 +647,7 @@ usbss1: dwc3-usb@f910000 {
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index 23ce1bfda8d6..66ddf2dc51af 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -21,6 +21,16 @@ chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
target-module@2b300050 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index aa1e057082f0..a158df0d0ba6 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -606,7 +606,7 @@ usbss0: dwc3-usb@f900000 {
reg = <0x00 0x0f900000 0x00 0x800>;
clocks = <&k3_clks 161 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -629,7 +629,7 @@ usbss1: dwc3-usb@f910000 {
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index f7bec484705a..98043e9aa316 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -17,6 +17,16 @@ chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
wkup_uart0: serial@2b300000 {
--
2.34.1
As per AM62A TRM [1] USB Link Power Management (LPM)
feature is not supported. Disable it else it may
cause enumeration failure on some devices.
> 4.9.2.1 USB2SS Unsupported Features
> The following features are not supported on this family of devices:
> ...
> - USB 2.0 ECN: Link Power Management (LPM)
> ...
[1] - https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Roger Quadros <[email protected]>
---
Changelog:
v5: new patch
---
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index a158df0d0ba6..adaf578280f9 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -621,6 +621,8 @@ usb0: usb@31000000 {
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
+ snps,usb2-gadget-lpm-disable;
+ snps,usb2-lpm-disable;
};
};
@@ -644,6 +646,8 @@ usb1: usb@31100000 {
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
+ snps,usb2-gadget-lpm-disable;
+ snps,usb2-lpm-disable;
};
};
--
2.34.1
There are two USB instances available on the am62p5 starter kit. Include
and enable them for use on the board.
USB LPM feature is kept disabled as it is not supported.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
---
Changelog:
v5 - disabled USB LPM feature as it is not supported.
v4 - no change. Added Andrew's Reviewed-by
https://lore.kernel.org/all/[email protected]/
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- moved am62p changes to next patch
- use new compatible for USB PHY CTRL node
---
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 50 +++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++++++++++
3 files changed, 127 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 7337a9e13535..46d35036d2d5 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -635,6 +635,56 @@ sdhci2: mmc@fa20000 {
status = "disabled";
};
+ usbss0: usb@f900000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f900000 0x00 0x800>;
+ clocks = <&k3_clks 161 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb0: usb@31000000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31000000 0x00 0x50000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ snps,usb2-gadget-lpm-disable;
+ snps,usb2-lpm-disable;
+ };
+ };
+
+ usbss1: usb@f910000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f910000 0x00 0x800>;
+ clocks = <&k3_clks 162 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb1: usb@31100000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31100000 0x00 0x50000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ snps,usb2-gadget-lpm-disable;
+ snps,usb2-lpm-disable;
+ };
+ };
+
fss: bus@fc00000 {
compatible = "simple-bus";
reg = <0x00 0x0fc00000 0x00 0x70000>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
index a84756c336d0..c71d9624ea27 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
@@ -18,6 +18,16 @@ chipid: chipid@14 {
reg = <0x14 0x4>;
bootph-all;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
wkup_uart0: serial@2b300000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index e86f34e835c1..b63888a4842d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -27,6 +27,8 @@ aliases {
spi0 = &ospi0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
+ usb0 = &usb0;
+ usb1 = &usb1;
};
chosen {
@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
bootph-all;
};
+ main_usb1_pins_default: main-usb1-default-pins {
+ pinctrl-single,pins = <
+ AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
+ >;
+ };
+
main_wlirq_pins_default: main-wlirq-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
};
};
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ typec_pd0: usb-power-controller@3f {
+ compatible = "ti,tps6598x";
+ reg = <0x3f>;
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ self-powered;
+ data-role = "dual";
+ power-role = "sink";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ usb_con_hs: endpoint {
+ remote-endpoint = <&usb0_hs_ep>;
+ };
+ };
+ };
+ };
+ };
+};
+
&main_i2c1 {
status = "okay";
pinctrl-names = "default";
@@ -463,6 +501,35 @@ cpsw3g_phy1: ethernet-phy@1 {
};
};
+&usbss0 {
+ status = "okay";
+ ti,vbus-divider;
+};
+
+&usbss1 {
+ status = "okay";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ usb-role-switch;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usb0_hs_ep: endpoint {
+ remote-endpoint = <&usb_con_hs>;
+ };
+ };
+};
+
+&usb1 {
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb1_pins_default>;
+};
+
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
--
2.34.1
On Fri, 23 Feb 2024, Roger Quadros wrote:
> Add the compatible for TI AM62 USB PHY Control register. This
> register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
> is used to indicate the USB PHY PLL reference clock rate and
> core voltage level to the USB controller.
>
> [1] - https://www.ti.com/lit/pdf/spruiv7
>
> Signed-off-by: Roger Quadros <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> ---
> Changelog:
> v5 - no change. Added Lee Jones in To list
> v4 - no change. Added Rob's Acked-by
> https://lore.kernel.org/all/[email protected]/
> v3 - add compatibles in alphabetical order
> https://lore.kernel.org/all/[email protected]/
> v2 - New patch
> ---
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
> index 084b5c2a2a3c..9437705af92f 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -72,6 +72,7 @@ properties:
> - rockchip,rk3588-qos
> - rockchip,rv1126-qos
> - starfive,jh7100-sysmain
> + - ti,am62-usb-phy-ctrl
> - ti,am654-dss-oldi-io-ctrl
Doesn't apply. Please rebase on tomorrow's -next.
--
Lee Jones [李琼斯]