2024-02-26 10:17:21

by Sinthu Raja

[permalink] [raw]
Subject: [PATCH V3] arm64: dts: ti: k3-am68-sk-som: Add support for OSPI flash

From: Sinthu Raja <[email protected]>

AM68 SK has an OSPI NOR flash on its SOM connected to OSPI0 instance.
Enable support for the same. Also, describe the OSPI flash partition
information through the device tree, according to the offsets in the
bootloader.

Signed-off-by: Sinthu Raja <[email protected]>
---

Changes in V3:
Address review comments:
a. Fix the make dtbs_check error related to ospi pinctrl
b. Increase the partition 0 size to 1MB and update the following
partitions start address accordingly.

V2: https://lore.kernel.org/linux-arm-kernel/[email protected]/

arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 78 ++++++++++++++++++++++
1 file changed, 78 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
index 0f4a5da0ebc4..d3e869c250a2 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
@@ -130,6 +130,24 @@ rtos_ipc_memory_region: ipc-memories@a8000000 {
};
};

+&wkup_pmx0 {
+ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins {
+ pinctrl-single,pins = <
+ J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
+ J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
+ J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
+ J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
+ J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
+ J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
+ J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
+ J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
+ J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
+ J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
+ J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
+ >;
+ };
+};
+
&wkup_pmx2 {
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
@@ -152,6 +170,66 @@ eeprom@51 {
};
};

+&ospi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ spi-max-frequency = <25000000>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "ospi.tispl";
+ reg = <0x100000 0x200000>;
+ };
+
+ partition@300000 {
+ label = "ospi.u-boot";
+ reg = <0x300000 0x400000>;
+ };
+
+ partition@700000 {
+ label = "ospi.env";
+ reg = <0x700000 0x40000>;
+ };
+
+ partition@740000 {
+ label = "ospi.env.backup";
+ reg = <0x740000 0x40000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fc0000 {
+ label = "ospi.phypattern";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };
+ };
+};
+
&mailbox0_cluster0 {
status = "okay";
interrupts = <436>;
--
2.34.1



2024-03-08 08:11:18

by Kumar, Udit

[permalink] [raw]
Subject: Re: [PATCH V3] arm64: dts: ti: k3-am68-sk-som: Add support for OSPI flash

Hi Sinthu,

On 2/26/2024 3:22 PM, Sinthu Raja wrote:
> From: Sinthu Raja <[email protected]>
>
> AM68 SK has an OSPI NOR flash on its SOM connected to OSPI0 instance.
> Enable support for the same. Also, describe the OSPI flash partition
> information through the device tree, according to the offsets in the
> bootloader.
>
> Signed-off-by: Sinthu Raja <[email protected]>
> ---
>
> Changes in V3:
> Address review comments:
> a. Fix the make dtbs_check error related to ospi pinctrl
> b. Increase the partition 0 size to 1MB and update the following
> partitions start address accordingly.
>
> V2: https://lore.kernel.org/linux-arm-kernel/[email protected]/
>
> arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi | 78 ++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
> index 0f4a5da0ebc4..d3e869c250a2 100644
> --- a/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-som.dtsi
> @@ -130,6 +130,24 @@ rtos_ipc_memory_region: ipc-memories@a8000000 {
> };
> };
>
> +&wkup_pmx0 {
> + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins {
> + pinctrl-single,pins = <
> + J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
> + J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
> + J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
> + J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
> + J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
> + J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
> + J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
> + J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
> + J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
> + J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
> + J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */


I see there is one pin SOC_MCU_OSPI0_INT# connected over F17 GPIO.

Please suggest, if this is being used ?

> + >;
> + };
> +};
> +
> &wkup_pmx2 {
> wkup_i2c0_pins_default: wkup-i2c0-default-pins {
> pinctrl-single,pins = <
> @@ -152,6 +170,66 @@ eeprom@51 {
> };
> };
>
> +&ospi0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0x0>;
> + spi-tx-bus-width = <8>;
> + spi-rx-bus-width = <8>;
> + spi-max-frequency = <25000000>;
> + cdns,tshsl-ns = <60>;
> + cdns,tsd2d-ns = <60>;
> + cdns,tchsh-ns = <60>;
> + cdns,tslch-ns = <60>;
> + cdns,read-delay = <4>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "ospi.tiboot3";
> + reg = <0x0 0x100000>;
> + };
> +
> + partition@100000 {
> + label = "ospi.tispl";
> + reg = <0x100000 0x200000>;
> + };
> +
> + partition@300000 {
> + label = "ospi.u-boot";
> + reg = <0x300000 0x400000>;
> + };
> +
> + partition@700000 {
> + label = "ospi.env";
> + reg = <0x700000 0x40000>;
> + };
> +
> + partition@740000 {
> + label = "ospi.env.backup";
> + reg = <0x740000 0x40000>;
> + };
> +
> + partition@800000 {
> + label = "ospi.rootfs";
> + reg = <0x800000 0x37c0000>;
> + };
> +
> + partition@3fc0000 {
> + label = "ospi.phypattern";
> + reg = <0x3fc0000 0x40000>;
> + };
> + };
> + };
> +};
> +
> &mailbox0_cluster0 {
> status = "okay";
> interrupts = <436>;