2024-02-27 12:46:14

by Gjorgji Rosikopulos

[permalink] [raw]
Subject: [PATCH 0/9] Move camss version related defs in to resources

The different resources required for different camss versions are
split in to two groups:

1. Camss device related. In this group are all resources described
in the device tree, clocks, regulators etc.

2. Sub-device specific resources. In the initialization
of the each sub-device, the version of camss is passed.
Based on this version the sub-device adds: hw layer support,
per pad formats, number of dma's etc.

The code for "1" group lives in camss.c itself. However the "2" group
is spread across all sub-device implementations including video device.

This kind of separation is not very convenient when adding new hw
version. The reason is that you need to add support in all sub-device
implementations.

There were some improvements in this direction where some of the
hw version related definitions were moved in to the "1". One
example is attaching of the hw operations.

This series aim to improve the things more and add additional definitions
in to the "1".


What is included:

- Remove all format definitions from camss video. The will be passed
by the parent sub-device

- Make camss generic format definition mapping, containing mbus to
v4l2 mapping, mbus bpp and other required fields used by the
sub-device and video node.

- Add per sub-device type union in the resources, different
sub-devices are using different resources, as an example: is_lite flag.

- Move camss link operation in to the resources. Currently one
function supports different topologies depending of the number
of devices. As hw version support increases this is not good
way of supporting different topologies.

- Add parent device ops in to the resources. This resolves
inter-dependencies of vfe and csid. Csid requests the clocks
regulators etc from parent device instead calling directly vfe
functions.

- Some cleanups in csid code for split the configuration of
RX and testgen and RDI.

Atanas Filipov (1):
media: qcom: camss: Decompose register and link operations

Milen Mitkov (3):
media: qcom: camss: Designate lite subdevices in resources
media: qcom: camss: Split testgen, RDI and RX for CSID 170
media: qcom: camss: Decouple VFE from CSID

Radoslav Tsvetkov (5):
media: qcom: camss: Add per sub-device type resources
media: qcom: camss: Attach formats to VFE resources
media: qcom: camss: Attach formats to CSID resources
media: qcom: camss: Attach formats to CSIPHY resources
media: qcom: camss: Move format related functions

drivers/media/platform/qcom/camss/Makefile | 1 +
.../platform/qcom/camss/camss-csid-4-1.c | 132 +---
.../platform/qcom/camss/camss-csid-4-7.c | 160 +----
.../platform/qcom/camss/camss-csid-gen2.c | 410 +++++--------
.../media/platform/qcom/camss/camss-csid.c | 512 +++++++++++++++-
.../media/platform/qcom/camss/camss-csid.h | 32 +-
.../media/platform/qcom/camss/camss-csiphy.c | 73 +--
.../media/platform/qcom/camss/camss-csiphy.h | 23 +-
.../media/platform/qcom/camss/camss-format.c | 98 +++
.../media/platform/qcom/camss/camss-format.h | 67 ++
.../media/platform/qcom/camss/camss-vfe-170.c | 10 +-
.../media/platform/qcom/camss/camss-vfe-4-1.c | 4 +-
.../media/platform/qcom/camss/camss-vfe-4-7.c | 6 +-
.../media/platform/qcom/camss/camss-vfe-4-8.c | 6 +-
.../platform/qcom/camss/camss-vfe-gen1.c | 8 +-
drivers/media/platform/qcom/camss/camss-vfe.c | 483 +++++++++------
drivers/media/platform/qcom/camss/camss-vfe.h | 22 +-
.../media/platform/qcom/camss/camss-video.c | 294 +--------
.../media/platform/qcom/camss/camss-video.h | 5 +-
drivers/media/platform/qcom/camss/camss.c | 577 +++++++++++++-----
drivers/media/platform/qcom/camss/camss.h | 28 +-
21 files changed, 1656 insertions(+), 1295 deletions(-)
create mode 100644 drivers/media/platform/qcom/camss/camss-format.c
create mode 100644 drivers/media/platform/qcom/camss/camss-format.h

--
2.17.1



2024-02-27 12:47:13

by Gjorgji Rosikopulos

[permalink] [raw]
Subject: [PATCH 2/9] media: qcom: camss: Attach formats to VFE resources

From: Radoslav Tsvetkov <[email protected]>

Video node formats have direct dependency by the sub-device pad formats.
Remove dependency for SoC version and move format definitions in device
which creates video node.

This commit attaches a struct to the VFE resources that holds format
description, so it is much easier to assign them to the video node.
No need to use a switch-case.

NOTE: The mbus_bpp is used to calculate the clock rates and is different
from bpp which is the bits per pixel written to memory. We need to keep
both values to not break the calcualtions.

Signed-off-by: Radoslav Tsvetkov <[email protected]>
---
.../media/platform/qcom/camss/camss-format.h | 62 +++
drivers/media/platform/qcom/camss/camss-vfe.c | 358 ++++++++++++------
drivers/media/platform/qcom/camss/camss-vfe.h | 11 +-
.../media/platform/qcom/camss/camss-video.c | 268 +------------
.../media/platform/qcom/camss/camss-video.h | 5 +-
drivers/media/platform/qcom/camss/camss.c | 48 ++-
drivers/media/platform/qcom/camss/camss.h | 1 +
7 files changed, 359 insertions(+), 394 deletions(-)
create mode 100644 drivers/media/platform/qcom/camss/camss-format.h

diff --git a/drivers/media/platform/qcom/camss/camss-format.h b/drivers/media/platform/qcom/camss/camss-format.h
new file mode 100644
index 000000000000..bfbc761bd46c
--- /dev/null
+++ b/drivers/media/platform/qcom/camss/camss-format.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (c) 2023, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023 Qualcomm Technologies, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define PER_PLANE_DATA(plane, h_fract_num, h_fract_den, v_fract_num, v_fract_den, _bpp) \
+ .hsub[(plane)].numerator = (h_fract_num), \
+ .hsub[(plane)].denominator = (h_fract_den), \
+ .vsub[(plane)].numerator = (v_fract_num), \
+ .vsub[(plane)].denominator = (v_fract_den), \
+ .bpp[(plane)] = (_bpp)
+
+#ifndef __CAMSS_FORMAT_H__
+#define __CAMSS_FORMAT_H__
+
+#include <linux/types.h>
+
+/*
+ * struct fract - Represents a fraction
+ * @numerator: Store the numerator part of the fraction
+ * @denominator: Store the denominator part of the fraction
+ */
+struct fract {
+ u8 numerator;
+ u8 denominator;
+};
+
+/*
+ * struct camss_format_info - ISP media bus format information
+ * @code: V4L2 media bus format code
+ * @mbus_bpp: Media bus bits per pixel
+ * @pixelformat: V4L2 pixel format FCC identifier
+ * @planes: Number of planes
+ * @hsub: Horizontal subsampling (for each plane)
+ * @vsub: Vertical subsampling (for each plane)
+ * @bpp: Bits per pixel when stored in memory (for each plane)
+ */
+struct camss_format_info {
+ u32 code;
+ u32 mbus_bpp;
+ u32 pixelformat;
+ u8 planes;
+ struct fract hsub[3];
+ struct fract vsub[3];
+ unsigned int bpp[3];
+};
+
+struct camss_formats {
+ unsigned int nformats;
+ const struct camss_format_info *formats;
+};
+
+#endif /* __CAMSS_FORMAT_H__ */
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index dbc6d83bb1c6..3daba9e26aee 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -32,96 +32,250 @@

#define SCALER_RATIO_MAX 16

-struct vfe_format {
- u32 code;
- u8 bpp;
+static const struct camss_format_info formats_rdi_8x16[] = {
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_UYVY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_VYUY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_YUYV, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_YVYU, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_SBGGR8_1X8, 8, V4L2_PIX_FMT_SBGGR8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGBRG8_1X8, 8, V4L2_PIX_FMT_SGBRG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGRBG8_1X8, 8, V4L2_PIX_FMT_SGRBG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SRGGB8_1X8, 8, V4L2_PIX_FMT_SRGGB8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SBGGR10_1X10, 10, V4L2_PIX_FMT_SBGGR10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGBRG10_1X10, 10, V4L2_PIX_FMT_SGBRG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGRBG10_1X10, 10, V4L2_PIX_FMT_SGRBG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SRGGB10_1X10, 10, V4L2_PIX_FMT_SRGGB10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SBGGR12_1X12, 12, V4L2_PIX_FMT_SBGGR12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGBRG12_1X12, 12, V4L2_PIX_FMT_SGBRG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGRBG12_1X12, 12, V4L2_PIX_FMT_SGRBG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, 12, V4L2_PIX_FMT_SRGGB12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_Y10_1X10, 10, V4L2_PIX_FMT_Y10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+};
+
+static const struct camss_format_info formats_rdi_8x96[] = {
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_UYVY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_VYUY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_YUYV, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_YVYU, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_SBGGR8_1X8, 8, V4L2_PIX_FMT_SBGGR8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGBRG8_1X8, 8, V4L2_PIX_FMT_SGBRG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGRBG8_1X8, 8, V4L2_PIX_FMT_SGRBG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SRGGB8_1X8, 8, V4L2_PIX_FMT_SRGGB8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SBGGR10_1X10, 10, V4L2_PIX_FMT_SBGGR10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGBRG10_1X10, 10, V4L2_PIX_FMT_SGBRG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGRBG10_1X10, 10, V4L2_PIX_FMT_SGRBG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SRGGB10_1X10, 10, V4L2_PIX_FMT_SRGGB10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 16, V4L2_PIX_FMT_SBGGR10, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_SBGGR12_1X12, 12, V4L2_PIX_FMT_SBGGR12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGBRG12_1X12, 12, V4L2_PIX_FMT_SGBRG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGRBG12_1X12, 12, V4L2_PIX_FMT_SGRBG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, 12, V4L2_PIX_FMT_SRGGB12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SBGGR14_1X14, 14, V4L2_PIX_FMT_SBGGR14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SGBRG14_1X14, 14, V4L2_PIX_FMT_SGBRG14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SGRBG14_1X14, 14, V4L2_PIX_FMT_SGRBG14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SRGGB14_1X14, 14, V4L2_PIX_FMT_SRGGB14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_Y10_1X10, 10, V4L2_PIX_FMT_Y10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, 16, V4L2_PIX_FMT_Y10, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+};
+
+static const struct camss_format_info formats_rdi_845[] = {
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_UYVY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_VYUY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_YUYV, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_YVYU, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_SBGGR8_1X8, 8, V4L2_PIX_FMT_SBGGR8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGBRG8_1X8, 8, V4L2_PIX_FMT_SGBRG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SGRBG8_1X8, 8, V4L2_PIX_FMT_SGRBG8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SRGGB8_1X8, 8, V4L2_PIX_FMT_SRGGB8, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_SBGGR10_1X10, 10, V4L2_PIX_FMT_SBGGR10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGBRG10_1X10, 10, V4L2_PIX_FMT_SGBRG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SGRBG10_1X10, 10, V4L2_PIX_FMT_SGRBG10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SRGGB10_1X10, 10, V4L2_PIX_FMT_SRGGB10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 16, V4L2_PIX_FMT_SBGGR10, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_SBGGR12_1X12, 12, V4L2_PIX_FMT_SBGGR12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGBRG12_1X12, 12, V4L2_PIX_FMT_SGBRG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SGRBG12_1X12, 12, V4L2_PIX_FMT_SGRBG12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SRGGB12_1X12, 12, V4L2_PIX_FMT_SRGGB12P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 12) },
+ { MEDIA_BUS_FMT_SBGGR14_1X14, 14, V4L2_PIX_FMT_SBGGR14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SGBRG14_1X14, 14, V4L2_PIX_FMT_SGBRG14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SGRBG14_1X14, 14, V4L2_PIX_FMT_SGRBG14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_SRGGB14_1X14, 14, V4L2_PIX_FMT_SRGGB14P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 14) },
+ { MEDIA_BUS_FMT_Y8_1X8, 8, V4L2_PIX_FMT_GREY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 8) },
+ { MEDIA_BUS_FMT_Y10_1X10, 10, V4L2_PIX_FMT_Y10P, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 10) },
+ { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, 16, V4L2_PIX_FMT_Y10, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+};
+
+static const struct camss_format_info formats_pix_8x16[] = {
+ { MEDIA_BUS_FMT_YUYV8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+};
+
+static const struct camss_format_info formats_pix_8x96[] = {
+ { MEDIA_BUS_FMT_YUYV8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1_5X8, 8, V4L2_PIX_FMT_NV12, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1_5X8, 8, V4L2_PIX_FMT_NV21, 1,
+ PER_PLANE_DATA(0, 1, 1, 2, 3, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_NV16, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_NV61, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 2, 8) },
+ { MEDIA_BUS_FMT_UYVY8_1X16, 8, V4L2_PIX_FMT_UYVY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_VYUY8_1X16, 8, V4L2_PIX_FMT_VYUY, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YUYV8_1X16, 8, V4L2_PIX_FMT_YUYV, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+ { MEDIA_BUS_FMT_YVYU8_1X16, 8, V4L2_PIX_FMT_YVYU, 1,
+ PER_PLANE_DATA(0, 1, 1, 1, 1, 16) },
+};
+
+const struct camss_formats vfe_formats_rdi_8x16 = {
+ .nformats = ARRAY_SIZE(formats_rdi_8x16),
+ .formats = formats_rdi_8x16
};

-static const struct vfe_format formats_rdi_8x16[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
- { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
- { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
- { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
- { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
- { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
- { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
- { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
- { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
- { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
- { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
- { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
- { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
- { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
- { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
- { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
- { MEDIA_BUS_FMT_Y10_1X10, 10 },
+const struct camss_formats vfe_formats_pix_8x16 = {
+ .nformats = ARRAY_SIZE(formats_pix_8x16),
+ .formats = formats_pix_8x16
};

-static const struct vfe_format formats_pix_8x16[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
- { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
- { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
- { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
+const struct camss_formats vfe_formats_rdi_8x96 = {
+ .nformats = ARRAY_SIZE(formats_rdi_8x96),
+ .formats = formats_rdi_8x96
};

-static const struct vfe_format formats_rdi_8x96[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
- { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
- { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
- { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
- { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
- { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
- { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
- { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
- { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
- { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
- { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
- { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
- { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 16 },
- { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
- { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
- { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
- { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
- { MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
- { MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
- { MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
- { MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
- { MEDIA_BUS_FMT_Y10_1X10, 10 },
- { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, 16 },
+const struct camss_formats vfe_formats_pix_8x96 = {
+ .nformats = ARRAY_SIZE(formats_pix_8x96),
+ .formats = formats_pix_8x96
};

-static const struct vfe_format formats_pix_8x96[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
- { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
- { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
- { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
+const struct camss_formats vfe_formats_rdi_845 = {
+ .nformats = ARRAY_SIZE(formats_rdi_845),
+ .formats = formats_rdi_845
};

-static const struct vfe_format formats_rdi_845[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
- { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
- { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
- { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
- { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
- { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
- { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
- { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
- { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
- { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
- { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
- { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
- { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 16 },
- { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
- { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
- { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
- { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
- { MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
- { MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
- { MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
- { MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
- { MEDIA_BUS_FMT_Y8_1X8, 8 },
- { MEDIA_BUS_FMT_Y10_1X10, 10 },
- { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, 16 },
+/* TODO: Replace with pix formats */
+const struct camss_formats vfe_formats_pix_845 = {
+ .nformats = ARRAY_SIZE(formats_rdi_845),
+ .formats = formats_rdi_845
};

/*
@@ -132,18 +286,18 @@ static const struct vfe_format formats_rdi_845[] = {
*
* Return number of bits per pixel
*/
-static u8 vfe_get_bpp(const struct vfe_format *formats,
+static u8 vfe_get_bpp(const struct camss_format_info *formats,
unsigned int nformats, u32 code)
{
unsigned int i;

for (i = 0; i < nformats; i++)
if (code == formats[i].code)
- return formats[i].bpp;
+ return formats[i].mbus_bpp;

WARN(1, "Unknown format\n");

- return formats[0].bpp;
+ return formats[0].mbus_bpp;
}

static u32 vfe_find_code(u32 *code, unsigned int n_code,
@@ -1494,31 +1648,12 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe,
init_completion(&l->output.sof);
init_completion(&l->output.reg_update);

- switch (camss->res->version) {
- case CAMSS_8x16:
- if (i == VFE_LINE_PIX) {
- l->formats = formats_pix_8x16;
- l->nformats = ARRAY_SIZE(formats_pix_8x16);
- } else {
- l->formats = formats_rdi_8x16;
- l->nformats = ARRAY_SIZE(formats_rdi_8x16);
- }
- break;
- case CAMSS_8x96:
- case CAMSS_660:
- if (i == VFE_LINE_PIX) {
- l->formats = formats_pix_8x96;
- l->nformats = ARRAY_SIZE(formats_pix_8x96);
- } else {
- l->formats = formats_rdi_8x96;
- l->nformats = ARRAY_SIZE(formats_rdi_8x96);
- }
- break;
- case CAMSS_845:
- case CAMSS_8250:
- l->formats = formats_rdi_845;
- l->nformats = ARRAY_SIZE(formats_rdi_845);
- break;
+ if (i == VFE_LINE_PIX) {
+ l->nformats = res->vfe.formats_pix->nformats;
+ l->formats = res->vfe.formats_pix->formats;
+ } else {
+ l->nformats = res->vfe.formats_rdi->nformats;
+ l->formats = res->vfe.formats_rdi->formats;
}
}

@@ -1669,10 +1804,13 @@ int msm_vfe_register_entities(struct vfe_device *vfe,
video_out->bpl_alignment = 16;
video_out->line_based = 1;
}
+
+ video_out->nformats = vfe->line[i].nformats;
+ video_out->formats = vfe->line[i].formats;
+
snprintf(name, ARRAY_SIZE(name), "%s%d_%s%d",
MSM_VFE_NAME, vfe->id, "video", i);
- ret = msm_video_register(video_out, v4l2_dev, name,
- i == VFE_LINE_PIX ? 1 : 0);
+ ret = msm_video_register(video_out, v4l2_dev, name);
if (ret < 0) {
dev_err(dev, "Failed to register video node: %d\n",
ret);
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h
index 87fc159c48cc..10e2cc3c0b83 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.h
+++ b/drivers/media/platform/qcom/camss/camss-vfe.h
@@ -92,7 +92,7 @@ struct vfe_line {
struct v4l2_rect crop;
struct camss_video video_out;
struct vfe_output output;
- const struct vfe_format *formats;
+ const struct camss_format_info *formats;
unsigned int nformats;
};

@@ -132,6 +132,8 @@ struct vfe_subdev_resources {
bool has_pd;
char *pd_name;
const struct vfe_hw_ops *hw_ops;
+ const struct camss_formats *formats_rdi;
+ const struct camss_formats *formats_pix;
};

struct vfe_device {
@@ -224,6 +226,13 @@ void vfe_pm_domain_off(struct vfe_device *vfe);
*/
int vfe_pm_domain_on(struct vfe_device *vfe);

+extern const struct camss_formats vfe_formats_rdi_8x16;
+extern const struct camss_formats vfe_formats_pix_8x16;
+extern const struct camss_formats vfe_formats_rdi_8x96;
+extern const struct camss_formats vfe_formats_pix_8x96;
+extern const struct camss_formats vfe_formats_rdi_845;
+extern const struct camss_formats vfe_formats_pix_845;
+
extern const struct vfe_hw_ops vfe_ops_4_1;
extern const struct vfe_hw_ops vfe_ops_4_7;
extern const struct vfe_hw_ops vfe_ops_4_8;
diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c
index a89da5ef4710..cd13a432e291 100644
--- a/drivers/media/platform/qcom/camss/camss-video.c
+++ b/drivers/media/platform/qcom/camss/camss-video.c
@@ -24,244 +24,6 @@
#define CAMSS_FRAME_MAX_HEIGHT_RDI 8191
#define CAMSS_FRAME_MAX_HEIGHT_PIX 4096

-struct fract {
- u8 numerator;
- u8 denominator;
-};
-
-/*
- * struct camss_format_info - ISP media bus format information
- * @code: V4L2 media bus format code
- * @pixelformat: V4L2 pixel format FCC identifier
- * @planes: Number of planes
- * @hsub: Horizontal subsampling (for each plane)
- * @vsub: Vertical subsampling (for each plane)
- * @bpp: Bits per pixel when stored in memory (for each plane)
- */
-struct camss_format_info {
- u32 code;
- u32 pixelformat;
- u8 planes;
- struct fract hsub[3];
- struct fract vsub[3];
- unsigned int bpp[3];
-};
-
-static const struct camss_format_info formats_rdi_8x16[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_UYVY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_VYUY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_YUYV, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_YVYU, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_PIX_FMT_SBGGR8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_PIX_FMT_SGBRG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_PIX_FMT_SGRBG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_PIX_FMT_SRGGB8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_PIX_FMT_SBGGR10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGBRG10_1X10, V4L2_PIX_FMT_SGBRG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SRGGB10_1X10, V4L2_PIX_FMT_SRGGB10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SBGGR12_1X12, V4L2_PIX_FMT_SBGGR12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGBRG12_1X12, V4L2_PIX_FMT_SGBRG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGRBG12_1X12, V4L2_PIX_FMT_SGRBG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SRGGB12_1X12, V4L2_PIX_FMT_SRGGB12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_Y10_1X10, V4L2_PIX_FMT_Y10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
-};
-
-static const struct camss_format_info formats_rdi_8x96[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_UYVY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_VYUY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_YUYV, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_YVYU, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_PIX_FMT_SBGGR8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_PIX_FMT_SGBRG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_PIX_FMT_SGRBG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_PIX_FMT_SRGGB8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_PIX_FMT_SBGGR10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGBRG10_1X10, V4L2_PIX_FMT_SGBRG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SRGGB10_1X10, V4L2_PIX_FMT_SRGGB10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_PIX_FMT_SBGGR10, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_SBGGR12_1X12, V4L2_PIX_FMT_SBGGR12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGBRG12_1X12, V4L2_PIX_FMT_SGBRG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGRBG12_1X12, V4L2_PIX_FMT_SGRBG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SRGGB12_1X12, V4L2_PIX_FMT_SRGGB12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SBGGR14_1X14, V4L2_PIX_FMT_SBGGR14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SGBRG14_1X14, V4L2_PIX_FMT_SGBRG14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SGRBG14_1X14, V4L2_PIX_FMT_SGRBG14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SRGGB14_1X14, V4L2_PIX_FMT_SRGGB14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_Y10_1X10, V4L2_PIX_FMT_Y10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, V4L2_PIX_FMT_Y10, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
-};
-
-static const struct camss_format_info formats_rdi_845[] = {
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_UYVY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_VYUY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_YUYV, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_YVYU, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_PIX_FMT_SBGGR8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_PIX_FMT_SGBRG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_PIX_FMT_SGRBG8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_PIX_FMT_SRGGB8, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_PIX_FMT_SBGGR10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGBRG10_1X10, V4L2_PIX_FMT_SGBRG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SGRBG10_1X10, V4L2_PIX_FMT_SGRBG10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SRGGB10_1X10, V4L2_PIX_FMT_SRGGB10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_PIX_FMT_SBGGR10, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_SBGGR12_1X12, V4L2_PIX_FMT_SBGGR12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGBRG12_1X12, V4L2_PIX_FMT_SGBRG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SGRBG12_1X12, V4L2_PIX_FMT_SGRBG12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SRGGB12_1X12, V4L2_PIX_FMT_SRGGB12P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 12 } },
- { MEDIA_BUS_FMT_SBGGR14_1X14, V4L2_PIX_FMT_SBGGR14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SGBRG14_1X14, V4L2_PIX_FMT_SGBRG14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SGRBG14_1X14, V4L2_PIX_FMT_SGRBG14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_SRGGB14_1X14, V4L2_PIX_FMT_SRGGB14P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 14 } },
- { MEDIA_BUS_FMT_Y8_1X8, V4L2_PIX_FMT_GREY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 8 } },
- { MEDIA_BUS_FMT_Y10_1X10, V4L2_PIX_FMT_Y10P, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 10 } },
- { MEDIA_BUS_FMT_Y10_2X8_PADHI_LE, V4L2_PIX_FMT_Y10, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
-};
-
-static const struct camss_format_info formats_pix_8x16[] = {
- { MEDIA_BUS_FMT_YUYV8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
-};
-
-static const struct camss_format_info formats_pix_8x96[] = {
- { MEDIA_BUS_FMT_YUYV8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1_5X8, V4L2_PIX_FMT_NV12, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1_5X8, V4L2_PIX_FMT_NV21, 1,
- { { 1, 1 } }, { { 2, 3 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_NV16, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_NV61, 1,
- { { 1, 1 } }, { { 1, 2 } }, { 8 } },
- { MEDIA_BUS_FMT_UYVY8_1X16, V4L2_PIX_FMT_UYVY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_VYUY8_1X16, V4L2_PIX_FMT_VYUY, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YUYV8_1X16, V4L2_PIX_FMT_YUYV, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
- { MEDIA_BUS_FMT_YVYU8_1X16, V4L2_PIX_FMT_YVYU, 1,
- { { 1, 1 } }, { { 1, 1 } }, { 16 } },
-};
-
/* -----------------------------------------------------------------------------
* Helper functions
*/
@@ -968,8 +730,7 @@ static int msm_video_init_format(struct camss_video *video)
* Return 0 on success or a negative error code otherwise
*/

-int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev,
- const char *name, int is_pix)
+int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev, const char *name)
{
struct media_pad *pad = &video->pad;
struct video_device *vdev;
@@ -1006,33 +767,6 @@ int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev,

mutex_init(&video->lock);

- switch (video->camss->res->version) {
- case CAMSS_8x16:
- if (is_pix) {
- video->formats = formats_pix_8x16;
- video->nformats = ARRAY_SIZE(formats_pix_8x16);
- } else {
- video->formats = formats_rdi_8x16;
- video->nformats = ARRAY_SIZE(formats_rdi_8x16);
- }
- break;
- case CAMSS_8x96:
- case CAMSS_660:
- if (is_pix) {
- video->formats = formats_pix_8x96;
- video->nformats = ARRAY_SIZE(formats_pix_8x96);
- } else {
- video->formats = formats_rdi_8x96;
- video->nformats = ARRAY_SIZE(formats_rdi_8x96);
- }
- break;
- case CAMSS_845:
- case CAMSS_8250:
- video->formats = formats_rdi_845;
- video->nformats = ARRAY_SIZE(formats_rdi_845);
- break;
- }
-
ret = msm_video_init_format(video);
if (ret < 0) {
dev_err(v4l2_dev->dev, "Failed to init format: %d\n", ret);
diff --git a/drivers/media/platform/qcom/camss/camss-video.h b/drivers/media/platform/qcom/camss/camss-video.h
index bdbae8424140..4f6c0821ead2 100644
--- a/drivers/media/platform/qcom/camss/camss-video.h
+++ b/drivers/media/platform/qcom/camss/camss-video.h
@@ -33,8 +33,6 @@ struct camss_video_ops {
enum vb2_buffer_state state);
};

-struct camss_format_info;
-
struct camss_video {
struct camss *camss;
struct vb2_queue vb2_q;
@@ -52,8 +50,7 @@ struct camss_video {
unsigned int nformats;
};

-int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev,
- const char *name, int is_pix);
+int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev, const char *name);

void msm_video_unregister(struct camss_video *video);

diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 4005824c65d1..9777f714d5e9 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -143,7 +143,9 @@ static const struct camss_subdev_resources vfe_res_8x16[] = {
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
.line_num = 3,
- .hw_ops = &vfe_ops_4_1
+ .hw_ops = &vfe_ops_4_1,
+ .formats_rdi = &vfe_formats_rdi_8x16,
+ .formats_pix = &vfe_formats_pix_8x16
}
}
};
@@ -318,7 +320,9 @@ static const struct camss_subdev_resources vfe_res_8x96[] = {
.vfe = {
.line_num = 3,
.has_pd = true,
- .hw_ops = &vfe_ops_4_7
+ .hw_ops = &vfe_ops_4_7,
+ .formats_rdi = &vfe_formats_rdi_8x96,
+ .formats_pix = &vfe_formats_pix_8x96
}
},

@@ -342,7 +346,9 @@ static const struct camss_subdev_resources vfe_res_8x96[] = {
.vfe = {
.line_num = 3,
.has_pd = true,
- .hw_ops = &vfe_ops_4_7
+ .hw_ops = &vfe_ops_4_7,
+ .formats_rdi = &vfe_formats_rdi_8x96,
+ .formats_pix = &vfe_formats_pix_8x96
}
}
};
@@ -538,7 +544,9 @@ static const struct camss_subdev_resources vfe_res_660[] = {
.vfe = {
.line_num = 3,
.has_pd = true,
- .hw_ops = &vfe_ops_4_8
+ .hw_ops = &vfe_ops_4_8,
+ .formats_rdi = &vfe_formats_rdi_8x96,
+ .formats_pix = &vfe_formats_pix_8x96
}
},

@@ -565,7 +573,9 @@ static const struct camss_subdev_resources vfe_res_660[] = {
.vfe = {
.line_num = 3,
.has_pd = true,
- .hw_ops = &vfe_ops_4_8
+ .hw_ops = &vfe_ops_4_8,
+ .formats_rdi = &vfe_formats_rdi_8x96,
+ .formats_pix = &vfe_formats_pix_8x96
}
}
};
@@ -758,7 +768,9 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.vfe = {
.line_num = 4,
.has_pd = true,
- .hw_ops = &vfe_ops_170
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},

@@ -784,7 +796,9 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.vfe = {
.line_num = 4,
.has_pd = true,
- .hw_ops = &vfe_ops_170
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},

@@ -809,7 +823,9 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.vfe = {
.is_lite = true,
.line_num = 4,
- .hw_ops = &vfe_ops_170
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
}
};
@@ -985,7 +1001,9 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.line_num = 3,
.has_pd = true,
.pd_name = "ife0",
- .hw_ops = &vfe_ops_480
+ .hw_ops = &vfe_ops_480,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},
/* VFE1 */
@@ -1010,7 +1028,9 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.line_num = 3,
.has_pd = true,
.pd_name = "ife1",
- .hw_ops = &vfe_ops_480
+ .hw_ops = &vfe_ops_480,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},
/* VFE2 (lite) */
@@ -1033,7 +1053,9 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.vfe = {
.is_lite = true,
.line_num = 4,
- .hw_ops = &vfe_ops_480
+ .hw_ops = &vfe_ops_480,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},
/* VFE3 (lite) */
@@ -1056,7 +1078,9 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.vfe = {
.is_lite = true,
.line_num = 4,
- .hw_ops = &vfe_ops_480
+ .hw_ops = &vfe_ops_480,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
}
},
};
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index bb4ad4a16d5c..5abde7481caf 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -22,6 +22,7 @@
#include "camss-csiphy.h"
#include "camss-ispif.h"
#include "camss-vfe.h"
+#include "camss-format.h"

#define to_camss(ptr_module) \
container_of(ptr_module, struct camss, ptr_module)
--
2.17.1


2024-02-27 12:47:30

by Gjorgji Rosikopulos

[permalink] [raw]
Subject: [PATCH 3/9] media: qcom: camss: Attach formats to CSID resources

From: Radoslav Tsvetkov <[email protected]>

Following the example of VFE, move all formats of the decoder
to camss-csid.c and attach them to the subdevices resources.

Signed-off-by: Radoslav Tsvetkov <[email protected]>
---
.../platform/qcom/camss/camss-csid-4-1.c | 132 +----
.../platform/qcom/camss/camss-csid-4-7.c | 160 +-----
.../platform/qcom/camss/camss-csid-gen2.c | 164 +-----
.../media/platform/qcom/camss/camss-csid.c | 474 +++++++++++++++++-
.../media/platform/qcom/camss/camss-csid.h | 24 +-
drivers/media/platform/qcom/camss/camss.c | 51 +-
6 files changed, 522 insertions(+), 483 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-csid-4-1.c b/drivers/media/platform/qcom/camss/camss-csid-4-1.c
index dd49a40e6a70..c95861420502 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-4-1.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-4-1.c
@@ -45,128 +45,6 @@
#define CAMSS_CSID_TG_DT_n_CGG_1(n) (0x0b0 + 0xc * (n))
#define CAMSS_CSID_TG_DT_n_CGG_2(n) (0x0b4 + 0xc * (n))

-static const struct csid_format csid_formats[] = {
- {
- MEDIA_BUS_FMT_UYVY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_VYUY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YUYV8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YVYU8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_SBGGR8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_Y10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
-};
-
static void csid_configure_stream(struct csid_device *csid, u8 enable)
{
struct csid_testgen_config *tg = &csid->testgen;
@@ -174,7 +52,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)

if (enable) {
struct v4l2_mbus_framefmt *input_format;
- const struct csid_format *format;
+ const struct csid_format_info *format;
u8 vc = 0; /* Virtual Channel 0 */
u8 cid = vc * 4; /* id of Virtual Channel and Data Type set */
u8 dt_shift;
@@ -184,7 +62,8 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)
u32 num_lines, num_bytes_per_line;

input_format = &csid->fmt[MSM_CSID_PAD_SRC];
- format = csid_get_fmt_entry(csid->formats, csid->nformats,
+ format = csid_get_fmt_entry(csid->res->formats->formats,
+ csid->res->formats->nformats,
input_format->code);
num_bytes_per_line = input_format->width * format->bpp * format->spp / 8;
num_lines = input_format->height;
@@ -211,7 +90,8 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)
struct csid_phy_config *phy = &csid->phy;

input_format = &csid->fmt[MSM_CSID_PAD_SINK];
- format = csid_get_fmt_entry(csid->formats, csid->nformats,
+ format = csid_get_fmt_entry(csid->res->formats->formats,
+ csid->res->formats->nformats,
input_format->code);

val = phy->lane_cnt - 1;
@@ -311,8 +191,6 @@ static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code,

static void csid_subdev_init(struct csid_device *csid)
{
- csid->formats = csid_formats;
- csid->nformats = ARRAY_SIZE(csid_formats);
csid->testgen.modes = csid_testgen_modes;
csid->testgen.nmodes = CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN1;
}
diff --git a/drivers/media/platform/qcom/camss/camss-csid-4-7.c b/drivers/media/platform/qcom/camss/camss-csid-4-7.c
index 6b26e036294e..08578a143688 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-4-7.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-4-7.c
@@ -44,156 +44,6 @@
#define CAMSS_CSID_TG_DT_n_CGG_1(n) (0x0b8 + 0xc * (n))
#define CAMSS_CSID_TG_DT_n_CGG_2(n) (0x0bc + 0xc * (n))

-static const struct csid_format csid_formats[] = {
- {
- MEDIA_BUS_FMT_UYVY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_VYUY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YUYV8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YVYU8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_SBGGR8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_Y10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
-};
-
static void csid_configure_stream(struct csid_device *csid, u8 enable)
{
struct csid_testgen_config *tg = &csid->testgen;
@@ -203,7 +53,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)

if (enable) {
struct v4l2_mbus_framefmt *input_format;
- const struct csid_format *format;
+ const struct csid_format_info *format;
u8 vc = 0; /* Virtual Channel 0 */
u8 cid = vc * 4; /* id of Virtual Channel and Data Type set */
u8 dt_shift;
@@ -213,7 +63,8 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)
u32 num_bytes_per_line, num_lines;

input_format = &csid->fmt[MSM_CSID_PAD_SRC];
- format = csid_get_fmt_entry(csid->formats, csid->nformats,
+ format = csid_get_fmt_entry(csid->res->formats->formats,
+ csid->res->formats->nformats,
input_format->code);
num_bytes_per_line = input_format->width * format->bpp * format->spp / 8;
num_lines = input_format->height;
@@ -240,7 +91,8 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)
struct csid_phy_config *phy = &csid->phy;

input_format = &csid->fmt[MSM_CSID_PAD_SINK];
- format = csid_get_fmt_entry(csid->formats, csid->nformats,
+ format = csid_get_fmt_entry(csid->res->formats->formats,
+ csid->res->formats->nformats,
input_format->code);

val = phy->lane_cnt - 1;
@@ -387,8 +239,6 @@ static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code,

static void csid_subdev_init(struct csid_device *csid)
{
- csid->formats = csid_formats;
- csid->nformats = ARRAY_SIZE(csid_formats);
csid->testgen.modes = csid_testgen_modes;
csid->testgen.nmodes = CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN1;
}
diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.c b/drivers/media/platform/qcom/camss/camss-csid-gen2.c
index b11de4797cca..eb5dabe2639a 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-gen2.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.c
@@ -176,163 +176,6 @@
#define TPG_COLOR_BOX_CFG_MODE 0
#define TPG_COLOR_BOX_PATTERN_SEL 2

-static const struct csid_format csid_formats[] = {
- {
- MEDIA_BUS_FMT_UYVY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_VYUY8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YUYV8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_YVYU8_1X16,
- DATA_TYPE_YUV422_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 2,
- },
- {
- MEDIA_BUS_FMT_SBGGR8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_Y8_1X8,
- DATA_TYPE_RAW_8BIT,
- DECODE_FORMAT_UNCOMPRESSED_8_BIT,
- 8,
- 1,
- },
- {
- MEDIA_BUS_FMT_Y10_1X10,
- DATA_TYPE_RAW_10BIT,
- DECODE_FORMAT_UNCOMPRESSED_10_BIT,
- 10,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB12_1X12,
- DATA_TYPE_RAW_12BIT,
- DECODE_FORMAT_UNCOMPRESSED_12_BIT,
- 12,
- 1,
- },
- {
- MEDIA_BUS_FMT_SBGGR14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGBRG14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SGRBG14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
- {
- MEDIA_BUS_FMT_SRGGB14_1X14,
- DATA_TYPE_RAW_14BIT,
- DECODE_FORMAT_UNCOMPRESSED_14_BIT,
- 14,
- 1,
- },
-};
-
static void __csid_configure_stream(struct csid_device *csid, u8 enable, u8 vc)
{
struct csid_testgen_config *tg = &csid->testgen;
@@ -341,8 +184,9 @@ static void __csid_configure_stream(struct csid_device *csid, u8 enable, u8 vc)
u8 lane_cnt = csid->phy.lane_cnt;
/* Source pads matching RDI channels on hardware. Pad 1 -> RDI0, Pad 2 -> RDI1, etc. */
struct v4l2_mbus_framefmt *input_format = &csid->fmt[MSM_CSID_PAD_FIRST_SRC + vc];
- const struct csid_format *format = csid_get_fmt_entry(csid->formats, csid->nformats,
- input_format->code);
+ const struct csid_format_info *format = csid_get_fmt_entry(csid->res->formats->formats,
+ csid->res->formats->nformats,
+ input_format->code);

if (!lane_cnt)
lane_cnt = 4;
@@ -612,8 +456,6 @@ static u32 csid_src_pad_code(struct csid_device *csid, u32 sink_code,

static void csid_subdev_init(struct csid_device *csid)
{
- csid->formats = csid_formats;
- csid->nformats = ARRAY_SIZE(csid_formats);
csid->testgen.modes = csid_testgen_modes;
csid->testgen.nmodes = CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN2;
}
diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c
index d1a22e07fdb6..5b23f5b8746d 100644
--- a/drivers/media/platform/qcom/camss/camss-csid.c
+++ b/drivers/media/platform/qcom/camss/camss-csid.c
@@ -45,6 +45,450 @@ const char * const csid_testgen_modes[] = {
NULL
};

+static const struct csid_format_info formats_4_1[] = {
+ {
+ MEDIA_BUS_FMT_UYVY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_VYUY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YUYV8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YVYU8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_Y10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+};
+
+static const struct csid_format_info formats_4_7[] = {
+ {
+ MEDIA_BUS_FMT_UYVY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_VYUY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YUYV8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YVYU8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_Y10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+};
+
+static const struct csid_format_info formats_gen2[] = {
+ {
+ MEDIA_BUS_FMT_UYVY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_VYUY8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YUYV8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_YVYU8_1X16,
+ DATA_TYPE_YUV422_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 2,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_Y8_1X8,
+ DATA_TYPE_RAW_8BIT,
+ DECODE_FORMAT_UNCOMPRESSED_8_BIT,
+ 8,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_Y10_1X10,
+ DATA_TYPE_RAW_10BIT,
+ DECODE_FORMAT_UNCOMPRESSED_10_BIT,
+ 10,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB12_1X12,
+ DATA_TYPE_RAW_12BIT,
+ DECODE_FORMAT_UNCOMPRESSED_12_BIT,
+ 12,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SBGGR14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGBRG14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SGRBG14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+ {
+ MEDIA_BUS_FMT_SRGGB14_1X14,
+ DATA_TYPE_RAW_14BIT,
+ DECODE_FORMAT_UNCOMPRESSED_14_BIT,
+ 14,
+ 1,
+ },
+};
+
+const struct csid_formats csid_formats_4_1 = {
+ .nformats = ARRAY_SIZE(formats_4_1),
+ .formats = formats_4_1
+};
+
+const struct csid_formats csid_formats_4_7 = {
+ .nformats = ARRAY_SIZE(formats_4_7),
+ .formats = formats_4_7
+};
+
+const struct csid_formats csid_formats_gen2 = {
+ .nformats = ARRAY_SIZE(formats_gen2),
+ .formats = formats_gen2
+};
+
u32 csid_find_code(u32 *codes, unsigned int ncodes,
unsigned int match_format_idx, u32 match_code)
{
@@ -65,9 +509,9 @@ u32 csid_find_code(u32 *codes, unsigned int ncodes,
return codes[0];
}

-const struct csid_format *csid_get_fmt_entry(const struct csid_format *formats,
- unsigned int nformats,
- u32 code)
+const struct csid_format_info *csid_get_fmt_entry(const struct csid_format_info *formats,
+ unsigned int nformats,
+ u32 code)
{
unsigned int i;

@@ -87,12 +531,12 @@ const struct csid_format *csid_get_fmt_entry(const struct csid_format *formats,
static int csid_set_clock_rates(struct csid_device *csid)
{
struct device *dev = csid->camss->dev;
- const struct csid_format *fmt;
+ const struct csid_format_info *fmt;
s64 link_freq;
int i, j;
int ret;

- fmt = csid_get_fmt_entry(csid->formats, csid->nformats,
+ fmt = csid_get_fmt_entry(csid->res->formats->formats, csid->res->formats->nformats,
csid->fmt[MSM_CSIPHY_PAD_SINK].code);
link_freq = camss_get_link_freq(&csid->subdev.entity, fmt->bpp,
csid->phy.lane_cnt);
@@ -301,12 +745,12 @@ static void csid_try_format(struct csid_device *csid,
case MSM_CSID_PAD_SINK:
/* Set format on sink pad */

- for (i = 0; i < csid->nformats; i++)
- if (fmt->code == csid->formats[i].code)
+ for (i = 0; i < csid->res->formats->nformats; i++)
+ if (fmt->code == csid->res->formats->formats[i].code)
break;

/* If not found, use UYVY as default */
- if (i >= csid->nformats)
+ if (i >= csid->res->formats->nformats)
fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;

fmt->width = clamp_t(u32, fmt->width, 1, 8191);
@@ -330,12 +774,12 @@ static void csid_try_format(struct csid_device *csid,
/* Test generator is enabled, set format on source */
/* pad to allow test generator usage */

- for (i = 0; i < csid->nformats; i++)
- if (csid->formats[i].code == fmt->code)
+ for (i = 0; i < csid->res->formats->nformats; i++)
+ if (csid->res->formats->formats[i].code == fmt->code)
break;

/* If not found, use UYVY as default */
- if (i >= csid->nformats)
+ if (i >= csid->res->formats->nformats)
fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;

fmt->width = clamp_t(u32, fmt->width, 1, 8191);
@@ -363,10 +807,10 @@ static int csid_enum_mbus_code(struct v4l2_subdev *sd,
struct csid_device *csid = v4l2_get_subdevdata(sd);

if (code->pad == MSM_CSID_PAD_SINK) {
- if (code->index >= csid->nformats)
+ if (code->index >= csid->res->formats->nformats)
return -EINVAL;

- code->code = csid->formats[code->index].code;
+ code->code = csid->res->formats->formats[code->index].code;
} else {
if (csid->testgen_mode->cur.val == 0) {
struct v4l2_mbus_framefmt *sink_fmt;
@@ -380,10 +824,10 @@ static int csid_enum_mbus_code(struct v4l2_subdev *sd,
if (!code->code)
return -EINVAL;
} else {
- if (code->index >= csid->nformats)
+ if (code->index >= csid->res->formats->nformats)
return -EINVAL;

- code->code = csid->formats[code->index].code;
+ code->code = csid->res->formats->formats[code->index].code;
}
}

diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h
index 8d2971aa9ef8..0e385d17c250 100644
--- a/drivers/media/platform/qcom/camss/camss-csid.h
+++ b/drivers/media/platform/qcom/camss/camss-csid.h
@@ -67,7 +67,7 @@ enum csid_testgen_mode {
CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN2 = 9, /* excluding disabled */
};

-struct csid_format {
+struct csid_format_info {
u32 code;
u8 data_type;
u8 decode_format;
@@ -75,6 +75,11 @@ struct csid_format {
u8 spp; /* bus samples per pixel */
};

+struct csid_formats {
+ unsigned int nformats;
+ const struct csid_format_info *formats;
+};
+
struct csid_testgen_config {
enum csid_testgen_mode mode;
const char * const*modes;
@@ -152,6 +157,7 @@ struct csid_hw_ops {
struct csid_subdev_resources {
bool is_lite;
const struct csid_hw_ops *hw_ops;
+ const struct csid_formats *formats;
};

struct csid_device {
@@ -172,8 +178,6 @@ struct csid_device {
struct v4l2_mbus_framefmt fmt[MSM_CSID_PADS_NUM];
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *testgen_mode;
- const struct csid_format *formats;
- unsigned int nformats;
const struct csid_subdev_resources *res;
};

@@ -193,16 +197,16 @@ u32 csid_find_code(u32 *codes, unsigned int ncode,
unsigned int match_format_idx, u32 match_code);

/*
- * csid_get_fmt_entry - Find csid_format entry with matching format code
- * @formats: Array of format csid_format entries
+ * csid_get_fmt_entry - Find csid_format_info entry with matching format code
+ * @formats: Array of format csid_format_info entries
* @nformats: Length of @nformats array
* @code: Desired format code
*
* Return formats[0] on failure to find code
*/
-const struct csid_format *csid_get_fmt_entry(const struct csid_format *formats,
- unsigned int nformats,
- u32 code);
+const struct csid_format_info *csid_get_fmt_entry(const struct csid_format_info *formats,
+ unsigned int nformats,
+ u32 code);

int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid,
const struct camss_subdev_resources *res, u8 id);
@@ -216,6 +220,10 @@ void msm_csid_get_csid_id(struct media_entity *entity, u8 *id);

extern const char * const csid_testgen_modes[];

+extern const struct csid_formats csid_formats_4_1;
+extern const struct csid_formats csid_formats_4_7;
+extern const struct csid_formats csid_formats_gen2;
+
extern const struct csid_hw_ops csid_ops_4_1;
extern const struct csid_hw_ops csid_ops_4_7;
extern const struct csid_hw_ops csid_ops_gen2;
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 9777f714d5e9..fcf87baf548a 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -84,7 +84,8 @@ static const struct camss_subdev_resources csid_res_8x16[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_1
+ .hw_ops = &csid_ops_4_1,
+ .formats = &csid_formats_4_1
}
},

@@ -105,7 +106,8 @@ static const struct camss_subdev_resources csid_res_8x16[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_1
+ .hw_ops = &csid_ops_4_1,
+ .formats = &csid_formats_4_1
}
},
};
@@ -218,7 +220,8 @@ static const struct camss_subdev_resources csid_res_8x96[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -239,7 +242,8 @@ static const struct camss_subdev_resources csid_res_8x96[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -260,7 +264,8 @@ static const struct camss_subdev_resources csid_res_8x96[] = {
.interrupt = { "csid2" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -281,7 +286,8 @@ static const struct camss_subdev_resources csid_res_8x96[] = {
.interrupt = { "csid3" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
}
};
@@ -430,7 +436,8 @@ static const struct camss_subdev_resources csid_res_660[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -454,7 +461,8 @@ static const struct camss_subdev_resources csid_res_660[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -478,7 +486,8 @@ static const struct camss_subdev_resources csid_res_660[] = {
.interrupt = { "csid2" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
},

@@ -502,7 +511,8 @@ static const struct camss_subdev_resources csid_res_660[] = {
.interrupt = { "csid3" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_4_7
+ .hw_ops = &csid_ops_4_7,
+ .formats = &csid_formats_4_7
}
}
};
@@ -691,7 +701,8 @@ static const struct camss_subdev_resources csid_res_845[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
},

@@ -715,7 +726,8 @@ static const struct camss_subdev_resources csid_res_845[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
},

@@ -740,7 +752,8 @@ static const struct camss_subdev_resources csid_res_845[] = {
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
.is_lite = true,
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
}
};
@@ -925,7 +938,8 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
},
/* CSID1 */
@@ -941,7 +955,8 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
},
/* CSID2 */
@@ -957,7 +972,8 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
.is_lite = true,
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
},
/* CSID3 */
@@ -973,7 +989,8 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
.is_lite = true,
- .hw_ops = &csid_ops_gen2
+ .hw_ops = &csid_ops_gen2,
+ .formats = &csid_formats_gen2
}
}
};
--
2.17.1


2024-02-27 12:48:28

by Gjorgji Rosikopulos

[permalink] [raw]
Subject: [PATCH 6/9] media: qcom: camss: Designate lite subdevices in resources

From: Milen Mitkov <[email protected]>

VFE/CSID may have full-fledged or lite versions. Use a variable
in the subdev resources for differentiating between these,
instead of figuring it out by id.

Signed-off-by: Milen Mitkov <[email protected]>
Signed-off-by: Radoslav Tsvetkov <[email protected]>
---
drivers/media/platform/qcom/camss/camss-vfe.c | 1 +
drivers/media/platform/qcom/camss/camss.c | 16 +++++++++++-----
2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 4e0a8b2bb737..8d9be0a8e1bb 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -1491,6 +1491,7 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe,
return -EINVAL;

vfe->res = &res->vfe;
+
vfe->res->hw_ops->subdev_init(dev, vfe);

/* Power domain */
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index eea6f050db64..fc9940e883c5 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -713,6 +713,7 @@ static const struct camss_subdev_resources csid_res_845[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
+ .is_lite = false,
.hw_ops = &csid_ops_gen2,
.formats = &csid_formats_gen2
}
@@ -738,6 +739,7 @@ static const struct camss_subdev_resources csid_res_845[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
+ .is_lite = false,
.hw_ops = &csid_ops_gen2,
.formats = &csid_formats_gen2
}
@@ -792,7 +794,7 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
.line_num = 4,
- .has_pd = true,
+ .is_lite = false,
.hw_ops = &vfe_ops_170,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
@@ -820,7 +822,7 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
.line_num = 4,
- .has_pd = true,
+ .is_lite = false,
.hw_ops = &vfe_ops_170,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
@@ -846,8 +848,8 @@ static const struct camss_subdev_resources vfe_res_845[] = {
.interrupt = { "vfe_lite" },
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
- .is_lite = true,
.line_num = 4,
+ .is_lite = true,
.hw_ops = &vfe_ops_170,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
@@ -956,6 +958,7 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.interrupt = { "csid0" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
+ .is_lite = false,
.hw_ops = &csid_ops_gen2,
.formats = &csid_formats_gen2
}
@@ -973,6 +976,7 @@ static const struct camss_subdev_resources csid_res_8250[] = {
.interrupt = { "csid1" },
.type = CAMSS_SUBDEV_TYPE_CSID,
.csid = {
+ .is_lite = false,
.hw_ops = &csid_ops_gen2,
.formats = &csid_formats_gen2
}
@@ -1034,6 +1038,7 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
.line_num = 3,
+ .is_lite = false,
.has_pd = true,
.pd_name = "ife0",
.hw_ops = &vfe_ops_480,
@@ -1061,6 +1066,7 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
.line_num = 3,
+ .is_lite = false,
.has_pd = true,
.pd_name = "ife1",
.hw_ops = &vfe_ops_480,
@@ -1086,8 +1092,8 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.interrupt = { "vfe_lite0" },
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
- .is_lite = true,
.line_num = 4,
+ .is_lite = true,
.hw_ops = &vfe_ops_480,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
@@ -1111,8 +1117,8 @@ static const struct camss_subdev_resources vfe_res_8250[] = {
.interrupt = { "vfe_lite1" },
.type = CAMSS_SUBDEV_TYPE_VFE,
.vfe = {
- .is_lite = true,
.line_num = 4,
+ .is_lite = true,
.hw_ops = &vfe_ops_480,
.formats_rdi = &vfe_formats_rdi_845,
.formats_pix = &vfe_formats_pix_845
--
2.17.1


2024-03-11 16:29:19

by Bryan O'Donoghue

[permalink] [raw]
Subject: Re: [PATCH 0/9] Move camss version related defs in to resources

On 11/03/2024 16:22, Bryan O'Donoghue wrote:
> On 27/02/2024 12:24, Gjorgji Rosikopulos wrote:
>> The different resources required for different camss versions are
>> split in to two groups:
>
> Pardon me for not getting back to you on this earlier.
>
> Would appreciate if you could post this series rebased on sc8280xp
> patches which are @ v6 and ready for merge already.
>
> I will find time this week to test your patches on rb3, rb5 and x13s
> with the SoftISP patches on libcamera.
>
> ---
> bod
>

These patches

https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/sc8280xp-v6.8-rc4-camss?ref_type=heads

---
bod

2024-03-11 16:33:38

by Bryan O'Donoghue

[permalink] [raw]
Subject: Re: [PATCH 0/9] Move camss version related defs in to resources

On 27/02/2024 12:24, Gjorgji Rosikopulos wrote:
> The different resources required for different camss versions are
> split in to two groups:

Pardon me for not getting back to you on this earlier.

Would appreciate if you could post this series rebased on sc8280xp
patches which are @ v6 and ready for merge already.

I will find time this week to test your patches on rb3, rb5 and x13s
with the SoftISP patches on libcamera.

---
bod


2024-03-12 11:57:58

by Gjorgji Rosikopulos

[permalink] [raw]
Subject: Re: [PATCH 0/9] Move camss version related defs in to resources

Hi Bryan,

On 3/11/2024 6:23 PM, Bryan O'Donoghue wrote:
> On 11/03/2024 16:22, Bryan O'Donoghue wrote:
>> On 27/02/2024 12:24, Gjorgji Rosikopulos wrote:
>>> The different resources required for different camss versions are
>>> split in to two groups:
>>
>> Pardon me for not getting back to you on this earlier.
>>
>> Would appreciate if you could post this series rebased on sc8280xp
>> patches which are @ v6 and ready for merge already.
>>
>> I will find time this week to test your patches on rb3, rb5 and x13s
>> with the SoftISP patches on libcamera.
>>
>> ---
>> bod
>>
>
> These patches
>
> https://git.codelinaro.org/bryan.odonoghue/kernel/-/tree/sc8280xp-v6.8-rc4-camss?ref_type=heads

Thanks i will re-base and post the patches on top of sc8280xp.

~Gjorgji