QCA808x does not currently fill in the possible_interfaces.
This leads to Phylink not being aware that it supports 2500Base-X as well
so in cases where it is connected to a DSA switch like MV88E6393 it will
limit that port to phy-mode set in the DTS.
That means that if SGMII is used you are limited to 1G only while if
2500Base-X was set you are limited to 2.5G only.
Populating the possible_interfaces fixes this.
Changes in v2:
* Get rid of the if/else by Russels suggestion in the helper
Robert Marko (2):
net: phy: qcom: qca808x: add helper for checking for 1G only model
net: phy: qcom: qca808x: fill in possible_interfaces
drivers/net/phy/qcom/qca808x.c | 29 ++++++++++++++++++++++++-----
1 file changed, 24 insertions(+), 5 deletions(-)
--
2.44.0
There are 2 versions of QCA808x, one 2.5G capable and one 1G capable.
Currently, this matter only in the .get_features call however, it will
be required for filling supported interface modes so lets add a helper
that can be reused.
Signed-off-by: Robert Marko <[email protected]>
---
Changes in v2:
* Get rid of the if/else by Russels suggestion
drivers/net/phy/qcom/qca808x.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c
index 2acf852fb4de..a4c61a8e07c3 100644
--- a/drivers/net/phy/qcom/qca808x.c
+++ b/drivers/net/phy/qcom/qca808x.c
@@ -156,6 +156,17 @@ static bool qca808x_has_fast_retrain_or_slave_seed(struct phy_device *phydev)
return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
}
+static bool qca808x_is_1g_only(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
+ if (ret < 0)
+ return true;
+
+ return !!(QCA808X_PHY_CHIP_TYPE_1G & ret);
+}
+
static int qca808x_probe(struct phy_device *phydev)
{
struct device *dev = &phydev->mdio.dev;
@@ -350,11 +361,7 @@ static int qca808x_get_features(struct phy_device *phydev)
* existed in the bit0 of MMD1.21, we need to remove it manually if
* it is the qca8081 1G chip according to the bit0 of MMD7.0x901d.
*/
- ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
- if (ret < 0)
- return ret;
-
- if (QCA808X_PHY_CHIP_TYPE_1G & ret)
+ if (qca808x_is_1g_only(phydev))
linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
return 0;
--
2.44.0
Hello:
This series was applied to netdev/net-next.git (main)
by David S. Miller <[email protected]>:
On Wed, 28 Feb 2024 18:24:08 +0100 you wrote:
> QCA808x does not currently fill in the possible_interfaces.
>
> This leads to Phylink not being aware that it supports 2500Base-X as well
> so in cases where it is connected to a DSA switch like MV88E6393 it will
> limit that port to phy-mode set in the DTS.
>
> That means that if SGMII is used you are limited to 1G only while if
> 2500Base-X was set you are limited to 2.5G only.
>
> [...]
Here is the summary with links:
- [net-next,v2,1/2] net: phy: qcom: qca808x: add helper for checking for 1G only model
https://git.kernel.org/netdev/net-next/c/f058b2dd70b1
- [net-next,v2,2/2] net: phy: qcom: qca808x: fill in possible_interfaces
https://git.kernel.org/netdev/net-next/c/cb28f7029606
You are awesome, thank you!
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