This should be considered a hack. The proper solution would be
extracting write_reg logic to a separate regmap driver. Leaving only
"write BIT(2) to address 0x6" to the PHY driver.
A proper fix should be implemented later.
Signed-off-by: Yang Xiwen <[email protected]>
---
Changes in v5:
- commit msg: bulk->array. (Philipp)
- use devm_reset_control_array_exclusive() instead. (Philipp)
- Link to v4: https://lore.kernel.org/r/[email protected]
Changes in v4:
- remove reference to histb-clock.h
- remove fallback compatible as it has no use.
- remove phy_type (belongs to host controller)
- fix bot error (Rob Herring)
- split YAML convertion into two commits, the other add mv100 compatible (Krzysztof Kozlowski)
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- address a few binding issue mistakenly missing in v2 (Krzysztof Kozlowski)
- add msg about hi3798mv100 being added to compatible list
- remove minItems for compatible
- remove | for reg:
- fix existing dts (hi3798cv200.dtsi) due to binding change.
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- rewrite commit msg to show why hisilicon,hi3798mv100-usb2-phy is added during YAML convertion.
- split required: to multiple line
- add allOf to wrap if:
- remove perictrl wrapper and the second phy in the example
- tested the binding both for mv200 and cv200 dts. fix some silly errors.
- remove Pengcheng Li from To:
Above all are suggested by Krzysztof
- use reset_control_array_* APIs to ensure all resets are controlled
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Yang Xiwen (5):
phy: hisilicon: hisi-inno-phy: enable clocks for every ports
dt-bindings: phy: hisi-inno-usb2: convert to YAML
dt-bindings: phy: hisilicon,inno-usb2-phy: add support for Hi3798MV100 INNO PHY
dt-bindings: phy: hisi-inno-usb2: add compatible of hisilicon,hi3798mv200-usb2-phy
phy: hisilicon: hisi-inno-phy: add support for Hi3798MV200 INNO PHY
.../bindings/phy/hisilicon,inno-usb2-phy.yaml | 119 +++++++++++++++++++++
.../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 71 ------------
drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 70 +++++++-----
3 files changed, 162 insertions(+), 98 deletions(-)
---
base-commit: 8d3dea210042f54b952b481838c1e7dfc4ec751d
change-id: 20240216-inno-phy-a2d872f6b74b
Best regards,
--
Yang Xiwen <[email protected]>
On 05/03/2024 14:32, Yang Xiwen via B4 Relay wrote:
> This should be considered a hack. The proper solution would be
> extracting write_reg logic to a separate regmap driver. Leaving only
> "write BIT(2) to address 0x6" to the PHY driver.
>
> A proper fix should be implemented later.
>
> Signed-off-by: Yang Xiwen <[email protected]>
> ---
> Changes in v5:
> - commit msg: bulk->array. (Philipp)
> - use devm_reset_control_array_exclusive() instead. (Philipp)
> - Link to v4: https://lore.kernel.org/r/[email protected]
One patchset per 24h. Allow people to actually review your code, before
posting new version.
Best regards,
Krzysztof