This series adds QoS support for QNOC type device which can be found on
SC7280 platform. It adds support for programming priority,
priority forward disable and urgency forwarding. This helps in
priortizing the traffic originating from different interconnect masters
at NOC(Network On Chip).
Changes in v3:
- Skip QoS programming incase regmap failse and continue with probe.
- Defined all the qos structures as const.
- Fixed compilation issue occurring with arm-linux-gnueabi- toolchain.
- Removed enable_qos_deps() and disable_qos_deps() as no explicit
voting is needed for BCM before sync_state.
Odelu Kukatla (4):
interconnect: qcom: icc-rpmh: Add QoS configuration support
interconnect: qcom: sc7280: enable QoS programming
dt-bindings: interconnect: add clock property to enable QOS on SC7280
arm64: dts: qcom: sc7280: Add clocks for QOS configuration
.../interconnect/qcom,sc7280-rpmh.yaml | 49 +++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +
drivers/interconnect/qcom/icc-rpmh.c | 105 ++++++
drivers/interconnect/qcom/icc-rpmh.h | 32 ++
drivers/interconnect/qcom/sc7280.c | 332 ++++++++++++++++++
5 files changed, 521 insertions(+)
--
2.17.1
Added clock property to enable clocks required for accessing
qos registers.
Signed-off-by: Odelu Kukatla <[email protected]>
---
.../interconnect/qcom,sc7280-rpmh.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
index b135597d9489..758a6e924037 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
@@ -53,10 +53,50 @@ allOf:
required:
- reg
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre1-noc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: aggre UFS PHY AXI clock
+ - description: aggre USB3 PRIM AXI clock
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre2-noc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: RPMH CC IPA clock
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre1-noc
+ - qcom,sc7280-aggre2-noc
+ then:
+ required:
+ - clocks
+ else:
+ properties:
+ clocks: false
+
unevaluatedProperties: false
examples:
- |
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
interconnect {
compatible = "qcom,sc7280-clk-virt";
#interconnect-cells = <2>;
@@ -69,3 +109,12 @@ examples:
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
+
+ interconnect@16e0000 {
+ reg = <0x016e0000 0x1c080>;
+ compatible = "qcom,sc7280-aggre1-noc";
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
+ };
--
2.17.1
Add handles for required clocks to be enabled for configuring
QoS on sc7280.
Signed-off-by: Odelu Kukatla <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 7e7f0f0fb41b..e1d8fb6afae8 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2129,6 +2129,8 @@
reg = <0 0x016e0000 0 0x1c080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
};
aggre2_noc: interconnect@1700000 {
@@ -2136,6 +2138,7 @@
compatible = "qcom,sc7280-aggre2-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&rpmhcc RPMH_IPA_CLK>;
};
mmss_noc: interconnect@1740000 {
--
2.17.1
On 06/03/2024 08:30, Odelu Kukatla wrote:
> Added clock property to enable clocks required for accessing
> qos registers.
>
> Signed-off-by: Odelu Kukatla <[email protected]>
> ---
> .../interconnect/qcom,sc7280-rpmh.yaml | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
> index b135597d9489..758a6e924037 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
> @@ -53,10 +53,50 @@ allOf:
> required:
> - reg
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,sc7280-aggre1-noc
> + then:
> + properties:
> + clocks:
All properties must be defined in top-level.
> + items:
> + - description: aggre UFS PHY AXI clock
> + - description: aggre USB3 PRIM AXI clock
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,sc7280-aggre2-noc
> + then:
> + properties:
> + clocks:
> + items:
> + - description: RPMH CC IPA clock
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,sc7280-aggre1-noc
> + - qcom,sc7280-aggre2-noc
> + then:
> + required:
> + - clocks
That's an ABI break without reason. This is a stable and already used
platform, so clear NAK.
Best regards,
Krzysztof
On 3/6/24 08:30, Odelu Kukatla wrote:
> Add handles for required clocks to be enabled for configuring
> QoS on sc7280.
>
> Signed-off-by: Odelu Kukatla <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 7e7f0f0fb41b..e1d8fb6afae8 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2129,6 +2129,8 @@
> reg = <0 0x016e0000 0 0x1c080>;
> #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
Please align this with the previous <
Konrad
On 3/6/2024 1:56 PM, Krzysztof Kozlowski wrote:
> On 06/03/2024 08:30, Odelu Kukatla wrote:
>> Added clock property to enable clocks required for accessing
>> qos registers.
>>
>> Signed-off-by: Odelu Kukatla <[email protected]>
>> ---
>> .../interconnect/qcom,sc7280-rpmh.yaml | 49 +++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
>> index b135597d9489..758a6e924037 100644
>> --- a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
>> +++ b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
>> @@ -53,10 +53,50 @@ allOf:
>> required:
>> - reg
>>
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,sc7280-aggre1-noc
>> + then:
>> + properties:
>> + clocks:
>
> All properties must be defined in top-level.
>
I will address this in v4, "clocks" property could be optional.
>> + items:
>> + - description: aggre UFS PHY AXI clock
>> + - description: aggre USB3 PRIM AXI clock
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,sc7280-aggre2-noc
>> + then:
>> + properties:
>> + clocks:
>> + items:
>> + - description: RPMH CC IPA clock
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,sc7280-aggre1-noc
>> + - qcom,sc7280-aggre2-noc
>> + then:
>> + required:
>> + - clocks
>
> That's an ABI break without reason. This is a stable and already used
> platform, so clear NAK.
>
> Best regards,
> Krzysztof
>
Thanks,
Odelu
On 3/12/2024 4:05 PM, Konrad Dybcio wrote:
>
>
> On 3/6/24 08:30, Odelu Kukatla wrote:
>> Add handles for required clocks to be enabled for configuring
>> QoS on sc7280.
>>
>> Signed-off-by: Odelu Kukatla <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 7e7f0f0fb41b..e1d8fb6afae8 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2129,6 +2129,8 @@
>> reg = <0 0x016e0000 0 0x1c080>;
>> #interconnect-cells = <2>;
>> qcom,bcm-voters = <&apps_bcm_voter>;
>> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
>> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
>
> Please align this with the previous <
>
I will fix it in v4.
> Konrad
Thanks,
Odelu