The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
driver and Cadence HDP-TX PHY(HDMI/DP) driver for Freescale i.MX8MQ.
The patch set compose of DRM bridge drivers and PHY driver.
Both of them need by patch #1 and #2 to pass build.
DRM bridges driver patches:
#1: drm: bridge: Cadence: Creat mhdp helper driver
#2: phy: Add HDMI configuration options
#3: dt-bindings: display: bridge: Add Cadence MHDP8501
#4: drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver
PHY driver patches:
#1: drm: bridge: Cadence: Creat mhdp helper driver
#2: phy: Add HDMI configuration options
#5: dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY
#6: phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for i.MX8MQ
i.MX8M/TQMa8Mx DT patches:
#7: Add DT nodes for DCSS/HDMI pipeline
#8: Enable HDMI for TQMa8Mx/MBa8Mx
Sandor: Please test this series with DP output.
Thanks and best regards,
Alexander
v14->v15:
Patch #6 + #7:
- Merged PHY driver into a single combo PHY driver
Patch #7 + #8:
- Add DT patches for a running HDMI setup
v13->v14:
Patch #4:
- Rebase to next-20240219, replace get_edid function by edid_read
function as commits d807ad80d811b ("drm/bridge: add ->edid_read
hook and drm_bridge_edid_read()") and 27b8f91c08d99 ("drm/bridge:
remove ->get_edid callback") had change the API.
v12->v13:
Patch #4:
- Explicitly include linux/platform_device.h for cdns-mhdp8501-core.c
- Fix build warning
- Order bit bpc and color_space in descending shit.
Patch #7:
- Fix build warning
v11->v12:
Patch #1:
- Move status initialize out of mbox_mutex.
- Reorder API functions in alphabetical.
- Add notes for malibox access functions.
- Add year 2024 to copyright.
Patch #4:
- Replace DRM_INFO with dev_info or dev_warn.
- Replace DRM_ERROR with dev_err.
- Return ret when cdns_mhdp_dpcd_read failed in function cdns_dp_aux_transferi().
- Remove unused parmeter in function cdns_dp_get_msa_misc
and use two separate variables for color space and bpc.
- Add year 2024 to copyright.
Patch #6:
- Return error code to replace -1 for function wait_for_ack().
- Set cdns_phy->power_up = false in phy_power_down function.
- Remove "RATE_8_1 = 810000", it is not used in driver.
- Add year 2024 to copyright.
Patch #7:
- Adjust clk disable order.
- Return error code to replace -1 for function wait_for_ack().
- Use bool for variable pclk_in.
- Add year 2024 to copyright.
v10->v11:
- rewrite cdns_mhdp_set_firmware_active() in mhdp8546 core driver,
use cdns_mhdp_mailbox_send() to replace cdns_mhdp_mailbox_write()
same as the other mailbox access functions.
- use static for cdns_mhdp_mailbox_write() and cdns_mhdp_mailbox_read()
and remove them from EXPORT_SYMBOL_GPL().
- remove MODULE_ALIAS() from mhdp8501 driver.
v9->v10:
- Create mhdp helper driver to replace macro functions,
move all mhdp mailbox access functions and common functions
into the helper driver.
Patch #1:drm: bridge: Cadence: Creat mhdp helper driver
it is totaly different with v9.
v8->v9:
- Remove compatible string "cdns,mhdp8501" that had removed
from dt-bindings file in v8.
- Add Dmitry's R-b tag to patch #2
- Add Krzysztof's R-b tag to patch #3
v7->v8:
MHDP8501 HDMI/DP:
- Correct DT node name to "display-bridge".
- Remove "cdns,mhdp8501" from mhdp8501 dt-binding doc.
HDMI/DP PHY:
- Introduced functions `wait_for_ack` and `wait_for_ack_clear` to handle
waiting with acknowledgment bits set and cleared respectively.
- Use FIELD_PRE() to set bitfields for both HDMI and DP PHY.
v6->v7:
MHDP8501 HDMI/DP:
- Combine HDMI and DP driver into one mhdp8501 driver.
Use the connector type to load the corresponding functions.
- Remove connector init functions.
- Add <linux/hdmi.h> in phy_hdmi.h to reuse 'enum hdmi_colorspace'.
HDMI/DP PHY:
- Lowercase hex values
- Fix parameters indent issue on some functions
- Replace 'udelay' with 'usleep_range'
v5->v6:
HDMI/DP bridge driver
- 8501 is the part number of Cadence MHDP on i.MX8MQ.
Use MHDP8501 to name hdmi/dp drivers and files.
- Add compatible "fsl,imx8mq-mhdp8501-dp" for i.MX8MQ DP driver
- Add compatible "fsl,imx8mq-mhdp8501-hdmi" for i.MX8MQ HDMI driver
- Combine HDMI and DP dt-bindings into one file cdns,mhdp8501.yaml
- Fix HDMI scrambling is not enable issue when driver working in 4Kp60
mode.
- Add HDMI/DP PHY API mailbox protect.
HDMI/DP PHY driver:
- Rename DP and HDMI PHY files and move to folder phy/freescale/
- Remove properties num_lanes and link_rate from DP PHY driver.
- Combine HDMI and DP dt-bindings into one file fsl,imx8mq-dp-hdmi-phy.yaml
- Update compatible string to "fsl,imx8mq-dp-phy".
- Update compatible string to "fsl,imx8mq-hdmi-phy".
v4->v5:
- Drop "clk" suffix in clock name.
- Add output port property in the example of hdmi/dp.
v3->v4:
dt-bindings:
- Correct dt-bindings coding style and address review comments.
- Add apb_clk description.
- Add output port for HDMI/DP connector
PHY:
- Alphabetically sorted in Kconfig and Makefile for DP and HDMI PHY
- Remove unused registers define from HDMI and DP PHY drivers.
- More description in phy_hdmi.h.
- Add apb_clk to HDMI and DP phy driver.
HDMI/DP:
- Use get_unaligned_le32() to replace hardcode type conversion
in HDMI AVI infoframe data fill function.
- Add mailbox mutex lock in HDMI/DP driver for phy functions
to reslove race conditions between HDMI/DP and PHY drivers.
- Add apb_clk to both HDMI and DP driver.
- Rename some function names and add prefix with "cdns_hdmi/cdns_dp".
- Remove bpc 12 and 16 optional that not supported.
v2->v3:
Address comments for dt-bindings files.
- Correct dts-bindings file names
Rename phy-cadence-hdptx-dp.yaml to cdns,mhdp-imx8mq-dp.yaml
Rename phy-cadence-hdptx-hdmi.yaml to cdns,mhdp-imx8mq-hdmi.yaml
- Drop redundant words and descriptions.
- Correct hdmi/dp node name.
v2 is a completely different version compared to v1.
Previous v1 can be available here [1].
v1->v2:
- Reuse Cadence mailbox access functions from mhdp8546 instead of
rockchip DP.
- Mailbox access functions be convert to marco functions
that will be referenced by HDP-TX PHY(HDMI/DP) driver too.
- Plain bridge instead of component driver.
- Standalone Cadence HDP-TX PHY(HDMI/DP) driver.
- Audio driver are removed from the patch set, it will be add in another
patch set later.
[1] https://patchwork.kernel.org/project/linux-rockchip/cover/[email protected]/
Alexander Stein (2):
arm64: dts: imx8mq: Add DCSS + HDMI/DP display pipeline
arm64: dts: imx8mq: tqma8mq-mba8mx: Enable HDMI support
Sandor Yu (6):
drm: bridge: Cadence: Create mhdp helper driver
phy: Add HDMI configuration options
dt-bindings: display: bridge: Add Cadence MHDP8501
drm: bridge: Cadence: Add MHDP8501 DP/HDMI driver
dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY
phy: freescale: Add DisplayPort/HDMI Combo-PHY driver for i.MX8MQ
.../display/bridge/cdns,mhdp8501.yaml | 104 ++
.../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 51 +
.../dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 20 +
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 68 +
arch/arm64/boot/dts/freescale/mba8mx.dtsi | 11 +
drivers/gpu/drm/bridge/cadence/Kconfig | 20 +
drivers/gpu/drm/bridge/cadence/Makefile | 3 +
.../gpu/drm/bridge/cadence/cdns-mhdp-helper.c | 304 ++++
.../drm/bridge/cadence/cdns-mhdp8501-core.c | 328 ++++
.../drm/bridge/cadence/cdns-mhdp8501-core.h | 365 +++++
.../gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c | 700 ++++++++
.../drm/bridge/cadence/cdns-mhdp8501-hdmi.c | 680 ++++++++
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 403 +----
.../drm/bridge/cadence/cdns-mhdp8546-core.h | 44 +-
drivers/phy/freescale/Kconfig | 10 +
drivers/phy/freescale/Makefile | 1 +
drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c | 1402 +++++++++++++++++
include/drm/bridge/cdns-mhdp-helper.h | 97 ++
include/linux/phy/phy-hdmi.h | 24 +
include/linux/phy/phy.h | 7 +-
20 files changed, 4267 insertions(+), 375 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml
create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml
create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp-helper.c
create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.c
create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-core.h
create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-dp.c
create mode 100644 drivers/gpu/drm/bridge/cadence/cdns-mhdp8501-hdmi.c
create mode 100644 drivers/phy/freescale/phy-fsl-imx8mq-hdptx.c
create mode 100644 include/drm/bridge/cdns-mhdp-helper.h
create mode 100644 include/linux/phy/phy-hdmi.h
--
2.34.1
Add HDMI connector and connect it to MHDP output. Enable peripherals
for HDMI output.
Signed-off-by: Alexander Stein <[email protected]>
---
.../dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 20 +++++++++++++++++++
arch/arm64/boot/dts/freescale/mba8mx.dtsi | 11 ++++++++++
2 files changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
index 0165f3a259853..406c8229097cb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts
@@ -53,6 +53,10 @@ &btn2 {
gpios = <&gpio3 17 GPIO_ACTIVE_LOW>;
};
+&dcss {
+ status = "okay";
+};
+
&gpio_leds {
led3 {
label = "led3";
@@ -60,6 +64,14 @@ led3 {
};
};
+&hdmi_connector {
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&mhdp_out>;
+ };
+ };
+};
+
&i2c1 {
expander2: gpio@25 {
compatible = "nxp,pca9555";
@@ -91,6 +103,14 @@ &led2 {
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
};
+&mhdp {
+ status = "okay";
+};
+
+&mhdp_out {
+ remote-endpoint = <&hdmi_connector_in>;
+};
+
/* PCIe slot on X36 */
&pcie0 {
reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi
index 427467df42bfa..9fe262a41b398 100644
--- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi
+++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi
@@ -89,6 +89,17 @@ gpio_delays: gpio-delays {
gpio-line-names = "LVDS_BRIDGE_EN_1V8";
};
+ hdmi_connector: connector {
+ compatible = "hdmi-connector";
+ label = "X11";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ };
+ };
+ };
+
panel: panel-lvds {
/*
* Display is not fixed, so compatible has to be added from
--
2.34.1