The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU
frequencies up to 1.5GHz, so add this frequency.
Signed-off-by: Chukun Pan <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 7fdb119083a2..064b5706a289 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -140,6 +140,13 @@ opp-1440000000 {
clock-latency-ns = <200000>;
};
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <937500>;
+ opp-supported-hw = <0x2>;
+ clock-latency-ns = <200000>;
+ };
+
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <987500>;
--
2.25.1
On Wed, 6 Mar 2024 at 16:04, Chukun Pan <[email protected]> wrote:
>
> The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU
> frequencies up to 1.5GHz, so add this frequency.
After this patch non-PMIC IPQ6000 boardss are broken until patch3 is
applied. Please change the order of these patches.
>
> Signed-off-by: Chukun Pan <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 7fdb119083a2..064b5706a289 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -140,6 +140,13 @@ opp-1440000000 {
> clock-latency-ns = <200000>;
> };
>
> + opp-1512000000 {
> + opp-hz = /bits/ 64 <1512000000>;
> + opp-microvolt = <937500>;
> + opp-supported-hw = <0x2>;
> + clock-latency-ns = <200000>;
> + };
> +
> opp-1608000000 {
> opp-hz = /bits/ 64 <1608000000>;
> opp-microvolt = <987500>;
> --
> 2.25.1
>
>
--
With best wishes
Dmitry
Hi, Dmitry
> After this patch non-PMIC IPQ6000 boardss are broken until patch3 is
> applied. Please change the order of these patches.
This is not the case, please see `opp-supported-hw = <0x2>;`.
Also: https://github.com/torvalds/linux/blob/master/drivers/cpufreq/qcom-cpufreq-nvmem.c#L334
This 1.5GHz Frequency only takes effect when the fuse value is `2'b1`.
I have tested this patch on both fused 1.2GHz and 1.5GHz devices.
Thanks,
Chukun
--
2.25.1
On 3/6/24 15:03, Chukun Pan wrote:
> The IPQ6005 and some IPQ6000 SoCs (with PMIC) have CPU
> frequencies up to 1.5GHz, so add this frequency.
>
> Signed-off-by: Chukun Pan <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
On Wed, 6 Mar 2024 at 17:40, Chukun Pan <[email protected]> wrote:
>
> Hi, Dmitry
> > After this patch non-PMIC IPQ6000 boardss are broken until patch3 is
> > applied. Please change the order of these patches.
>
> This is not the case, please see `opp-supported-hw = <0x2>;`.
> Also: https://github.com/torvalds/linux/blob/master/drivers/cpufreq/qcom-cpufreq-nvmem.c#L334
> This 1.5GHz Frequency only takes effect when the fuse value is `2'b1`.
> I have tested this patch on both fused 1.2GHz and 1.5GHz devices.
Then the commit message should be changed, because you are enabling
1.5 GHz only for non-IPQ6000 SoCs. This patch has no effect on
IPQ6000.
--
With best wishes
Dmitry
Hi, Dmitry
> Then the commit message should be changed, because you are enabling
> 1.5 GHz only for non-IPQ6000 SoCs. This patch has no effect on
> IPQ6000.
As I said in another reply, there are some ipq6000 SoCs that will be
recognized by the driver as ipq6018 and fused 1.5GHz.
Thanks,
Chukun
--
2.25.1