This is a new driver for the Analog Devices AD7944/AD7985/AD7986 family
of ADCs. These are fairly simple chips (e.g. no configuration registers)
but do have some unusual SPI configurations. The initial driver is only
supporting the normal (4-wire) SPI mode.
This work is done on behalf of Analog Devices, Inc., hence the
MAINTAINERS are @analog.com folks.
---
Changes in v5:
- DT bindings:
- fixed typo
- picked up Rob's reviewed-by
- Driver:
- Dropped "nanoseconds" from comments.
- Renamed "t" to "timing_spec"
- Replaced "&spi->dev" with "dev"
- Fixed logic on optional "ref" regulator
- Added comment explaining why "cnv" gpio is required
- Simplified always_turbo assignment
- Link to v4: https://lore.kernel.org/r/[email protected]
Changes in v4:
- Fixed broken DT patch due to misplaced changelog
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- Removed 'multi' value from adi,spi-mode property in DT bindings
- Modified driver for above change
- Fixed spelling of 'conventional'
- Added '#daisy-chained-devices' to DT bindings
- Added comments explaining that '3-wire' mode is not related to
spi-3wire/SPI_3WIRE
- Replaced _sign with _diff in chip info struct to properly handle
pseudo-differential vs. true differential chips
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Added limit to spi-max-frequency for chain mode in DT bindings
- Added spi-cpol property to DT bindings
- Renamed '3-wire' mode to 'single' mode (to avoid confusion with spi-3wire)
- Renamed '4-wire' mode to 'multi' mode
- Dropped adi,reference property - now using only ref-supply and
refin-supply to determine the reference voltage source
- Fixed spelling of TURBO
- Renamed t_cnv to t_conv to match datasheet name and fixed comment
- Fixed wrong timestamp pushed to buffer
- Fixed scaling for chips with signed data
- Make use of sysfs_match_string() function
- Link to v1: https://lore.kernel.org/r/[email protected]
---
David Lechner (2):
dt-bindings: iio: adc: add ad7944 ADCs
iio: adc: ad7944: add driver for AD7944/AD7985/AD7986
.../devicetree/bindings/iio/adc/adi,ad7944.yaml | 213 +++++++++++
MAINTAINERS | 9 +
drivers/iio/adc/Kconfig | 10 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/ad7944.c | 416 +++++++++++++++++++++
5 files changed, 649 insertions(+)
---
base-commit: 74744b27ba8cb8c265263aa0ff0693350a8cbc19
change-id: 20240206-ad7944-mainline-17c968aa0967
This adds a new binding for the Analog Devices, Inc. AD7944, AD7985, and
AD7986 ADCs.
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: David Lechner <[email protected]>
---
v5 changes:
- fixed typo
- picked up Rob's reviewed-by
v4 changes:
- Fixed broken patch due to misplaced changelog
v3 changes:
- Removed default 'multi' value from adi,spi-mode property. This simplifies
things a bit by not having to check for two possible conditions (absence of
property or explicit default value). Now, only absence of property is valid to
indicate the default mode. Constraints that depend on this property are
updated accordingly.
- Fixed spelling of 'conventional'.
- Expanded description to call out potential confusion of '3-wire' mode being
unrelated to the standard spi-3wire property.
- Added standard '#daisy-chained-devices' property for chain mode.
- Relaxed requirement of cnv-gpios since it was determined that an active high
CS could actually be used in chain mode.
---
.../devicetree/bindings/iio/adc/adi,ad7944.yaml | 213 +++++++++++++++++++++
MAINTAINERS | 8 +
2 files changed, 221 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
new file mode 100644
index 000000000000..d17d184842d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
@@ -0,0 +1,213 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,ad7944.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices PulSAR LFCSP Analog to Digital Converters
+
+maintainers:
+ - Michael Hennerich <[email protected]>
+ - Nuno Sá <[email protected]>
+
+description: |
+ A family of pin-compatible single channel differential analog to digital
+ converters with SPI support in a LFCSP package.
+
+ * https://www.analog.com/en/products/ad7944.html
+ * https://www.analog.com/en/products/ad7985.html
+ * https://www.analog.com/en/products/ad7986.html
+
+$ref: /schemas/spi/spi-peripheral-props.yaml#
+
+properties:
+ compatible:
+ enum:
+ - adi,ad7944
+ - adi,ad7985
+ - adi,ad7986
+
+ reg:
+ maxItems: 1
+
+ spi-max-frequency:
+ maximum: 111111111
+
+ spi-cpol: true
+ spi-cpha: true
+
+ adi,spi-mode:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ single, chain ]
+ description: |
+ This property indicates the SPI wiring configuration.
+
+ When this property is omitted, it is assumed that the device is using what
+ the datasheet calls "4-wire mode". This is the conventional SPI mode used
+ when there are multiple devices on the same bus. In this mode, the CNV
+ line is used to initiate the conversion and the SDI line is connected to
+ CS on the SPI controller.
+
+ When this property is present, it indicates that the device is using one
+ of the following alternative wiring configurations:
+
+ * single: The datasheet calls this "3-wire mode". (NOTE: The datasheet's
+ definition of 3-wire mode is NOT at all related to the standard
+ spi-3wire property!) This mode is often used when the ADC is the only
+ device on the bus. In this mode, SDI is tied to VIO, and the CNV line
+ can be connected to the CS line of the SPI controller or to a GPIO, in
+ which case the CS line of the controller is unused.
+ * chain: The datasheet calls this "chain mode". This mode is used to save
+ on wiring when multiple ADCs are used. In this mode, the SDI line of
+ one chip is tied to the SDO of the next chip in the chain and the SDI of
+ the last chip in the chain is tied to GND. Only the first chip in the
+ chain is connected to the SPI bus. The CNV line of all chips are tied
+ together. The CS line of the SPI controller can be used as the CNV line
+ only if it is active high.
+
+ '#daisy-chained-devices': true
+
+ avdd-supply:
+ description: A 2.5V supply that powers the analog circuitry.
+
+ dvdd-supply:
+ description: A 2.5V supply that powers the digital circuitry.
+
+ vio-supply:
+ description:
+ A 1.8V to 2.7V supply for the digital inputs and outputs.
+
+ bvdd-supply:
+ description:
+ A voltage supply for the buffered power. When using an external reference
+ without an internal buffer (PDREF high, REFIN low), this should be
+ connected to the same supply as ref-supply. Otherwise, when using an
+ internal reference or an external reference with an internal buffer, this
+ is connected to a 5V supply.
+
+ ref-supply:
+ description:
+ Voltage regulator for the external reference voltage (REF). This property
+ is omitted when using an internal reference.
+
+ refin-supply:
+ description:
+ Voltage regulator for the reference buffer input (REFIN). When using an
+ external buffer with internal reference, this should be connected to a
+ 1.2V external reference voltage supply. Otherwise, this property is
+ omitted.
+
+ cnv-gpios:
+ description:
+ The Convert Input (CNV). This input has multiple functions. It initiates
+ the conversions and selects the SPI mode of the device (chain or CS). In
+ 'single' mode, this property is omitted if the CNV pin is connected to the
+ CS line of the SPI controller.
+ maxItems: 1
+
+ turbo-gpios:
+ description:
+ GPIO connected to the TURBO line. If omitted, it is assumed that the TURBO
+ line is hard-wired and the state is determined by the adi,always-turbo
+ property.
+ maxItems: 1
+
+ adi,always-turbo:
+ type: boolean
+ description:
+ When present, this property indicates that the TURBO line is hard-wired
+ and the state is always high. If neither this property nor turbo-gpios is
+ present, the TURBO line is assumed to be hard-wired and the state is
+ always low.
+
+ interrupts:
+ description:
+ The SDO pin can also function as a busy indicator. This node should be
+ connected to an interrupt that is triggered when the SDO line goes low
+ while the SDI line is high and the CNV line is low ('single' mode) or the
+ SDI line is low and the CNV line is high ('multi' mode); or when the SDO
+ line goes high while the SDI and CNV lines are high (chain mode),
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - avdd-supply
+ - dvdd-supply
+ - vio-supply
+ - bvdd-supply
+
+allOf:
+ # ref-supply and refin-supply are mutually exclusive (neither is also valid)
+ - if:
+ required:
+ - ref-supply
+ then:
+ properties:
+ refin-supply: false
+ - if:
+ required:
+ - refin-supply
+ then:
+ properties:
+ ref-supply: false
+ # in '4-wire' mode, cnv-gpios is required, for other modes it is optional
+ - if:
+ not:
+ required:
+ - adi,spi-mode
+ then:
+ required:
+ - cnv-gpios
+ # chain mode has lower SCLK max rate and doesn't work when TURBO is enabled
+ - if:
+ required:
+ - adi,spi-mode
+ properties:
+ adi,spi-mode:
+ const: chain
+ then:
+ properties:
+ spi-max-frequency:
+ maximum: 90909090
+ adi,always-turbo: false
+ required:
+ - '#daisy-chained-devices'
+ else:
+ properties:
+ '#daisy-chained-devices': false
+ # turbo-gpios and adi,always-turbo are mutually exclusive
+ - if:
+ required:
+ - turbo-gpios
+ then:
+ properties:
+ adi,always-turbo: false
+ - if:
+ required:
+ - adi,always-turbo
+ then:
+ properties:
+ turbo-gpios: false
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ adc@0 {
+ compatible = "adi,ad7944";
+ reg = <0>;
+ spi-cpha;
+ spi-max-frequency = <111111111>;
+ avdd-supply = <&supply_2_5V>;
+ dvdd-supply = <&supply_2_5V>;
+ vio-supply = <&supply_1_8V>;
+ bvdd-supply = <&supply_5V>;
+ cnv-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ turbo-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 2662ec49b297..35f27504632d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -441,6 +441,14 @@ W: http://wiki.analog.com/AD7879
W: https://ez.analog.com/linux-software-drivers
F: drivers/input/touchscreen/ad7879.c
+AD7944 ADC DRIVER (AD7944/AD7985/AD7986)
+M: Michael Hennerich <[email protected]>
+M: Nuno Sá <[email protected]>
+R: David Lechner <[email protected]>
+S: Supported
+W: https://ez.analog.com/linux-software-drivers
+F: Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
+
ADAFRUIT MINI I2C GAMEPAD
M: Anshul Dalal <[email protected]>
L: [email protected]
--
2.43.2
This adds a driver for the Analog Devices Inc. AD7944, AD7985, and
AD7986 ADCs. These are a family of pin-compatible ADCs that can sample
at rates up to 2.5 MSPS.
The initial driver adds support for sampling at lower rates using the
usual IIO triggered buffer and can handle all 3 possible reference
voltage configurations.
Signed-off-by: David Lechner <[email protected]>
---
v5 changes:
- Dropped "nanoseconds" from comments.
- Renamed "t" to "timing_spec"
- Replaced "&spi->dev" with "dev"
- Fixed logic on optional "ref" regulator
- Added comment explaining why "cnv" gpio is required
- Simplified always_turbo assignment
v4 changes: none
v3 changes:
- Replaced _sign with _diff in chip info struct to properly handle
pseudo-differential vs. true differential chips. Pseudo-differential chips
now just have a voltage0 channel instead of voltage0-voltage1.
- Fixed not resetting the CNV gpio on error return.
- Simplified check of adi,spi-mode property now that "multi" is no longer a
valid option.
---
MAINTAINERS | 1 +
drivers/iio/adc/Kconfig | 10 ++
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/ad7944.c | 416 +++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 428 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 35f27504632d..7b1a6f2d0c9c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -448,6 +448,7 @@ R: David Lechner <[email protected]>
S: Supported
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
+F: drivers/iio/adc/ad7944.c
ADAFRUIT MINI I2C GAMEPAD
M: Anshul Dalal <[email protected]>
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 0d9282fa67f5..555ac74889f3 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -264,6 +264,16 @@ config AD7923
To compile this driver as a module, choose M here: the
module will be called ad7923.
+config AD7944
+ tristate "Analog Devices AD7944 and similar ADCs driver"
+ depends on SPI
+ help
+ Say yes here to build support for Analog Devices
+ AD7944, AD7985, AD7986 ADCs.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ad7944
+
config AD7949
tristate "Analog Devices AD7949 and similar ADCs driver"
depends on SPI
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index b3c434722364..a0d69b452cca 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_AD7780) += ad7780.o
obj-$(CONFIG_AD7791) += ad7791.o
obj-$(CONFIG_AD7793) += ad7793.o
obj-$(CONFIG_AD7887) += ad7887.o
+obj-$(CONFIG_AD7944) += ad7944.o
obj-$(CONFIG_AD7949) += ad7949.o
obj-$(CONFIG_AD799X) += ad799x.o
obj-$(CONFIG_AD9467) += ad9467.o
diff --git a/drivers/iio/adc/ad7944.c b/drivers/iio/adc/ad7944.c
new file mode 100644
index 000000000000..adb007cdd287
--- /dev/null
+++ b/drivers/iio/adc/ad7944.c
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Analog Devices AD7944/85/86 PulSAR ADC family driver.
+ *
+ * Copyright 2024 Analog Devices, Inc.
+ * Copyright 2024 BayLibre, SAS
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/property.h>
+#include <linux/regulator/consumer.h>
+#include <linux/spi/spi.h>
+#include <linux/string_helpers.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/triggered_buffer.h>
+
+#define AD7944_INTERNAL_REF_MV 4096
+
+struct ad7944_timing_spec {
+ /* Normal mode max conversion time (t_{CONV}). */
+ unsigned int conv_ns;
+ /* TURBO mode max conversion time (t_{CONV}). */
+ unsigned int turbo_conv_ns;
+};
+
+struct ad7944_adc {
+ struct spi_device *spi;
+ /* Chip-specific timing specifications. */
+ const struct ad7944_timing_spec *timing_spec;
+ /* GPIO connected to CNV pin. */
+ struct gpio_desc *cnv;
+ /* Optional GPIO to enable turbo mode. */
+ struct gpio_desc *turbo;
+ /* Indicates TURBO is hard-wired to be always enabled. */
+ bool always_turbo;
+ /* Reference voltage (millivolts). */
+ unsigned int ref_mv;
+
+ /*
+ * DMA (thus cache coherency maintenance) requires the
+ * transfer buffers to live in their own cache lines.
+ */
+ struct {
+ union {
+ u16 u16;
+ u32 u32;
+ } raw;
+ u64 timestamp __aligned(8);
+ } sample __aligned(IIO_DMA_MINALIGN);
+};
+
+static const struct ad7944_timing_spec ad7944_timing_spec = {
+ .conv_ns = 420,
+ .turbo_conv_ns = 320,
+};
+
+static const struct ad7944_timing_spec ad7986_timing_spec = {
+ .conv_ns = 500,
+ .turbo_conv_ns = 400,
+};
+
+struct ad7944_chip_info {
+ const char *name;
+ const struct ad7944_timing_spec *timing_spec;
+ const struct iio_chan_spec channels[2];
+};
+
+/*
+ * AD7944_DEFINE_CHIP_INFO - Define a chip info structure for a specific chip
+ * @_name: The name of the chip
+ * @_ts: The timing specification for the chip
+ * @_bits: The number of bits in the conversion result
+ * @_diff: Whether the chip is true differential or not
+ */
+#define AD7944_DEFINE_CHIP_INFO(_name, _ts, _bits, _diff) \
+static const struct ad7944_chip_info _name##_chip_info = { \
+ .name = #_name, \
+ .timing_spec = &_ts##_timing_spec, \
+ .channels = { \
+ { \
+ .type = IIO_VOLTAGE, \
+ .indexed = 1, \
+ .differential = _diff, \
+ .channel = 0, \
+ .channel2 = _diff ? 1 : 0, \
+ .scan_index = 0, \
+ .scan_type.sign = _diff ? 's' : 'u', \
+ .scan_type.realbits = _bits, \
+ .scan_type.storagebits = _bits > 16 ? 32 : 16, \
+ .scan_type.endianness = IIO_CPU, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
+ | BIT(IIO_CHAN_INFO_SCALE), \
+ }, \
+ IIO_CHAN_SOFT_TIMESTAMP(1), \
+ }, \
+}
+
+/* pseudo-differential with ground sense */
+AD7944_DEFINE_CHIP_INFO(ad7944, ad7944, 14, 0);
+AD7944_DEFINE_CHIP_INFO(ad7985, ad7944, 16, 0);
+/* fully differential */
+AD7944_DEFINE_CHIP_INFO(ad7986, ad7986, 18, 1);
+
+/*
+ * ad7944_4wire_mode_conversion - Perform a 4-wire mode conversion and acquisition
+ * @adc: The ADC device structure
+ * @chan: The channel specification
+ * Return: 0 on success, a negative error code on failure
+ *
+ * Upon successful return adc->sample.raw will contain the conversion result.
+ */
+static int ad7944_4wire_mode_conversion(struct ad7944_adc *adc,
+ const struct iio_chan_spec *chan)
+{
+ unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec->turbo_conv_ns
+ : adc->timing_spec->conv_ns;
+ struct spi_transfer xfers[] = {
+ {
+ /*
+ * NB: can get better performance from some SPI
+ * controllers if we use the same bits_per_word
+ * in every transfer.
+ */
+ .bits_per_word = chan->scan_type.realbits,
+ /*
+ * CS has to be high for full conversion time to avoid
+ * triggering the busy indication.
+ */
+ .cs_off = 1,
+ .delay = {
+ .value = t_conv_ns,
+ .unit = SPI_DELAY_UNIT_NSECS,
+ },
+
+ },
+ {
+ .rx_buf = &adc->sample.raw,
+ .len = BITS_TO_BYTES(chan->scan_type.storagebits),
+ .bits_per_word = chan->scan_type.realbits,
+ },
+ };
+ int ret;
+
+ /*
+ * In 4-wire mode, the CNV line is held high for the entire conversion
+ * and acquisition process.
+ */
+ gpiod_set_value_cansleep(adc->cnv, 1);
+ ret = spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers));
+ gpiod_set_value_cansleep(adc->cnv, 0);
+
+ return ret;
+}
+
+static int ad7944_single_conversion(struct ad7944_adc *adc,
+ const struct iio_chan_spec *chan,
+ int *val)
+{
+ int ret;
+
+ ret = ad7944_4wire_mode_conversion(adc, chan);
+ if (ret)
+ return ret;
+
+ if (chan->scan_type.storagebits > 16)
+ *val = adc->sample.raw.u32;
+ else
+ *val = adc->sample.raw.u16;
+
+ if (chan->scan_type.sign == 's')
+ *val = sign_extend32(*val, chan->scan_type.realbits - 1);
+
+ return IIO_VAL_INT;
+}
+
+static int ad7944_read_raw(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ int *val, int *val2, long info)
+{
+ struct ad7944_adc *adc = iio_priv(indio_dev);
+ int ret;
+
+ switch (info) {
+ case IIO_CHAN_INFO_RAW:
+ ret = iio_device_claim_direct_mode(indio_dev);
+ if (ret)
+ return ret;
+
+ ret = ad7944_single_conversion(adc, chan, val);
+ iio_device_release_direct_mode(indio_dev);
+ return ret;
+
+ case IIO_CHAN_INFO_SCALE:
+ switch (chan->type) {
+ case IIO_VOLTAGE:
+ *val = adc->ref_mv;
+
+ if (chan->scan_type.sign == 's')
+ *val2 = chan->scan_type.realbits - 1;
+ else
+ *val2 = chan->scan_type.realbits;
+
+ return IIO_VAL_FRACTIONAL_LOG2;
+ default:
+ return -EINVAL;
+ }
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct iio_info ad7944_iio_info = {
+ .read_raw = &ad7944_read_raw,
+};
+
+static irqreturn_t ad7944_trigger_handler(int irq, void *p)
+{
+ struct iio_poll_func *pf = p;
+ struct iio_dev *indio_dev = pf->indio_dev;
+ struct ad7944_adc *adc = iio_priv(indio_dev);
+ int ret;
+
+ ret = ad7944_4wire_mode_conversion(adc, &indio_dev->channels[0]);
+ if (ret)
+ goto out;
+
+ iio_push_to_buffers_with_timestamp(indio_dev, &adc->sample.raw,
+ pf->timestamp);
+
+out:
+ iio_trigger_notify_done(indio_dev->trig);
+
+ return IRQ_HANDLED;
+}
+
+static const char * const ad7944_power_supplies[] = {
+ "avdd", "dvdd", "bvdd", "vio"
+};
+
+static void ad7944_ref_disable(void *ref)
+{
+ regulator_disable(ref);
+}
+
+static int ad7944_probe(struct spi_device *spi)
+{
+ const struct ad7944_chip_info *chip_info;
+ struct device *dev = &spi->dev;
+ struct iio_dev *indio_dev;
+ struct ad7944_adc *adc;
+ bool have_refin = false;
+ struct regulator *ref;
+ int ret;
+
+ /*
+ * driver currently only supports the conventional "4-wire" mode and
+ * not other special wiring configurations.
+ */
+ if (device_property_present(dev, "adi,spi-mode"))
+ return dev_err_probe(dev, -EINVAL,
+ "adi,spi-mode is not currently supported\n");
+
+ indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ adc = iio_priv(indio_dev);
+ adc->spi = spi;
+
+ chip_info = spi_get_device_match_data(spi);
+ if (!chip_info)
+ return dev_err_probe(dev, -EINVAL, "no chip info\n");
+
+ adc->timing_spec = chip_info->timing_spec;
+
+ /*
+ * Some chips use unusual word sizes, so check now instead of waiting
+ * for the first xfer.
+ */
+ if (!spi_is_bpw_supported(spi, chip_info->channels[0].scan_type.realbits))
+ return dev_err_probe(dev, -EINVAL,
+ "SPI host does not support %d bits per word\n",
+ chip_info->channels[0].scan_type.realbits);
+
+ ret = devm_regulator_bulk_get_enable(dev,
+ ARRAY_SIZE(ad7944_power_supplies),
+ ad7944_power_supplies);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to get and enable supplies\n");
+
+ /*
+ * Sort out what is being used for the reference voltage. Options are:
+ * - internal reference: neither REF or REFIN is connected
+ * - internal reference with external buffer: REF not connected, REFIN
+ * is connected
+ * - external reference: REF is connected, REFIN is not connected
+ */
+
+ ref = devm_regulator_get_optional(dev, "ref");
+ if (IS_ERR(ref)) {
+ if (PTR_ERR(ref) != -ENODEV)
+ return dev_err_probe(dev, PTR_ERR(ref),
+ "failed to get REF supply\n");
+
+ ref = NULL;
+ }
+
+ ret = devm_regulator_get_enable_optional(dev, "refin");
+ if (ret == 0)
+ have_refin = true;
+ else if (ret != -ENODEV)
+ return dev_err_probe(dev, ret,
+ "failed to get and enable REFIN supply\n");
+
+ if (have_refin && ref)
+ return dev_err_probe(dev, -EINVAL,
+ "cannot have both refin and ref supplies\n");
+
+ if (ref) {
+ ret = regulator_enable(ref);
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "failed to enable REF supply\n");
+
+ ret = devm_add_action_or_reset(dev, ad7944_ref_disable, ref);
+ if (ret)
+ return ret;
+
+ ret = regulator_get_voltage(ref);
+ if (ret < 0)
+ return dev_err_probe(dev, ret,
+ "failed to get REF voltage\n");
+
+ /* external reference */
+ adc->ref_mv = ret / 1000;
+ } else {
+ /* internal reference */
+ adc->ref_mv = AD7944_INTERNAL_REF_MV;
+ }
+
+ /*
+ * CNV gpio is required in 4-wire mode which is the only currently
+ * supported mode.
+ */
+ adc->cnv = devm_gpiod_get(dev, "cnv", GPIOD_OUT_LOW);
+ if (IS_ERR(adc->cnv))
+ return dev_err_probe(dev, PTR_ERR(adc->cnv),
+ "failed to get CNV GPIO\n");
+
+ adc->turbo = devm_gpiod_get_optional(dev, "turbo", GPIOD_OUT_LOW);
+ if (IS_ERR(adc->turbo))
+ return dev_err_probe(dev, PTR_ERR(adc->turbo),
+ "failed to get TURBO GPIO\n");
+
+ adc->always_turbo = device_property_present(dev, "adi,always-turbo");
+
+ if (adc->turbo && adc->always_turbo)
+ return dev_err_probe(dev, -EINVAL,
+ "cannot have both turbo-gpios and adi,always-turbo\n");
+
+ indio_dev->name = chip_info->name;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+ indio_dev->info = &ad7944_iio_info;
+ indio_dev->channels = chip_info->channels;
+ indio_dev->num_channels = ARRAY_SIZE(chip_info->channels);
+
+ ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
+ iio_pollfunc_store_time,
+ ad7944_trigger_handler, NULL);
+ if (ret)
+ return ret;
+
+ return devm_iio_device_register(dev, indio_dev);
+}
+
+static const struct of_device_id ad7944_of_match[] = {
+ { .compatible = "adi,ad7944", .data = &ad7944_chip_info },
+ { .compatible = "adi,ad7985", .data = &ad7985_chip_info },
+ { .compatible = "adi,ad7986", .data = &ad7986_chip_info },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ad7944_of_match);
+
+static const struct spi_device_id ad7944_spi_id[] = {
+ { "ad7944", (kernel_ulong_t)&ad7944_chip_info },
+ { "ad7985", (kernel_ulong_t)&ad7985_chip_info },
+ { "ad7986", (kernel_ulong_t)&ad7986_chip_info },
+ { }
+
+};
+MODULE_DEVICE_TABLE(spi, ad7944_spi_id);
+
+static struct spi_driver ad7944_driver = {
+ .driver = {
+ .name = "ad7944",
+ .of_match_table = ad7944_of_match,
+ },
+ .probe = ad7944_probe,
+ .id_table = ad7944_spi_id,
+};
+module_spi_driver(ad7944_driver);
+
+MODULE_AUTHOR("David Lechner <[email protected]>");
+MODULE_DESCRIPTION("Analog Devices AD7944 PulSAR ADC family driver");
+MODULE_LICENSE("GPL");
--
2.43.2
On Mon, 2024-03-04 at 13:48 -0600, David Lechner wrote:
> This adds a driver for the Analog Devices Inc. AD7944, AD7985, and
> AD7986 ADCs. These are a family of pin-compatible ADCs that can sample
> at rates up to 2.5 MSPS.
>
> The initial driver adds support for sampling at lower rates using the
> usual IIO triggered buffer and can handle all 3 possible reference
> voltage configurations.
>
> Signed-off-by: David Lechner <[email protected]>
> ---
LGTM:
Reviewed-by: Nuno Sa <[email protected]>
> v5 changes:
> - Dropped "nanoseconds" from comments.
> - Renamed "t" to "timing_spec"
> - Replaced "&spi->dev" with "dev"
> - Fixed logic on optional "ref" regulator
> - Added comment explaining why "cnv" gpio is required
> - Simplified always_turbo assignment
>
> v4 changes: none
>
> v3 changes:
> - Replaced _sign with _diff in chip info struct to properly handle
> pseudo-differential vs. true differential chips. Pseudo-differential chips
> now just have a voltage0 channel instead of voltage0-voltage1.
> - Fixed not resetting the CNV gpio on error return.
> - Simplified check of adi,spi-mode property now that "multi" is no longer a
> valid option.
> ---
> MAINTAINERS | 1 +
> drivers/iio/adc/Kconfig | 10 ++
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/ad7944.c | 416
> +++++++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 428 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 35f27504632d..7b1a6f2d0c9c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -448,6 +448,7 @@ R: David Lechner <[email protected]>
> S: Supported
> W: https://ez.analog.com/linux-software-drivers
> F: Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
> +F: drivers/iio/adc/ad7944.c
>
> ADAFRUIT MINI I2C GAMEPAD
> M: Anshul Dalal <[email protected]>
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 0d9282fa67f5..555ac74889f3 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -264,6 +264,16 @@ config AD7923
> To compile this driver as a module, choose M here: the
> module will be called ad7923.
>
> +config AD7944
> + tristate "Analog Devices AD7944 and similar ADCs driver"
> + depends on SPI
> + help
> + Say yes here to build support for Analog Devices
> + AD7944, AD7985, AD7986 ADCs.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called ad7944
> +
> config AD7949
> tristate "Analog Devices AD7949 and similar ADCs driver"
> depends on SPI
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index b3c434722364..a0d69b452cca 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -28,6 +28,7 @@ obj-$(CONFIG_AD7780) += ad7780.o
> obj-$(CONFIG_AD7791) += ad7791.o
> obj-$(CONFIG_AD7793) += ad7793.o
> obj-$(CONFIG_AD7887) += ad7887.o
> +obj-$(CONFIG_AD7944) += ad7944.o
> obj-$(CONFIG_AD7949) += ad7949.o
> obj-$(CONFIG_AD799X) += ad799x.o
> obj-$(CONFIG_AD9467) += ad9467.o
> diff --git a/drivers/iio/adc/ad7944.c b/drivers/iio/adc/ad7944.c
> new file mode 100644
> index 000000000000..adb007cdd287
> --- /dev/null
> +++ b/drivers/iio/adc/ad7944.c
> @@ -0,0 +1,416 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Analog Devices AD7944/85/86 PulSAR ADC family driver.
> + *
> + * Copyright 2024 Analog Devices, Inc.
> + * Copyright 2024 BayLibre, SAS
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/bitops.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/module.h>
> +#include <linux/property.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/spi/spi.h>
> +#include <linux/string_helpers.h>
> +
> +#include <linux/iio/iio.h>
> +#include <linux/iio/sysfs.h>
> +#include <linux/iio/trigger_consumer.h>
> +#include <linux/iio/triggered_buffer.h>
> +
> +#define AD7944_INTERNAL_REF_MV 4096
> +
> +struct ad7944_timing_spec {
> + /* Normal mode max conversion time (t_{CONV}). */
> + unsigned int conv_ns;
> + /* TURBO mode max conversion time (t_{CONV}). */
> + unsigned int turbo_conv_ns;
> +};
> +
> +struct ad7944_adc {
> + struct spi_device *spi;
> + /* Chip-specific timing specifications. */
> + const struct ad7944_timing_spec *timing_spec;
> + /* GPIO connected to CNV pin. */
> + struct gpio_desc *cnv;
> + /* Optional GPIO to enable turbo mode. */
> + struct gpio_desc *turbo;
> + /* Indicates TURBO is hard-wired to be always enabled. */
> + bool always_turbo;
> + /* Reference voltage (millivolts). */
> + unsigned int ref_mv;
> +
> + /*
> + * DMA (thus cache coherency maintenance) requires the
> + * transfer buffers to live in their own cache lines.
> + */
> + struct {
> + union {
> + u16 u16;
> + u32 u32;
> + } raw;
> + u64 timestamp __aligned(8);
> + } sample __aligned(IIO_DMA_MINALIGN);
> +};
> +
> +static const struct ad7944_timing_spec ad7944_timing_spec = {
> + .conv_ns = 420,
> + .turbo_conv_ns = 320,
> +};
> +
> +static const struct ad7944_timing_spec ad7986_timing_spec = {
> + .conv_ns = 500,
> + .turbo_conv_ns = 400,
> +};
> +
> +struct ad7944_chip_info {
> + const char *name;
> + const struct ad7944_timing_spec *timing_spec;
> + const struct iio_chan_spec channels[2];
> +};
> +
> +/*
> + * AD7944_DEFINE_CHIP_INFO - Define a chip info structure for a specific chip
> + * @_name: The name of the chip
> + * @_ts: The timing specification for the chip
> + * @_bits: The number of bits in the conversion result
> + * @_diff: Whether the chip is true differential or not
> + */
> +#define AD7944_DEFINE_CHIP_INFO(_name, _ts, _bits, _diff) \
> +static const struct ad7944_chip_info _name##_chip_info = { \
> + .name =
> #_name, \
> + .timing_spec = &_ts##_timing_spec, \
> + .channels = { \
> + { \
> + .type = IIO_VOLTAGE, \
> + .indexed = 1, \
> + .differential = _diff, \
> + .channel = 0, \
> + .channel2 = _diff ? 1 : 0, \
> + .scan_index = 0, \
> + .scan_type.sign = _diff ? 's' : 'u', \
> + .scan_type.realbits = _bits, \
> + .scan_type.storagebits = _bits > 16 ? 32 : 16, \
> + .scan_type.endianness = IIO_CPU, \
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
> + | BIT(IIO_CHAN_INFO_SCALE), \
> + }, \
> + IIO_CHAN_SOFT_TIMESTAMP(1), \
> + }, \
> +}
> +
> +/* pseudo-differential with ground sense */
> +AD7944_DEFINE_CHIP_INFO(ad7944, ad7944, 14, 0);
> +AD7944_DEFINE_CHIP_INFO(ad7985, ad7944, 16, 0);
> +/* fully differential */
> +AD7944_DEFINE_CHIP_INFO(ad7986, ad7986, 18, 1);
> +
> +/*
> + * ad7944_4wire_mode_conversion - Perform a 4-wire mode conversion and
> acquisition
> + * @adc: The ADC device structure
> + * @chan: The channel specification
> + * Return: 0 on success, a negative error code on failure
> + *
> + * Upon successful return adc->sample.raw will contain the conversion result.
> + */
> +static int ad7944_4wire_mode_conversion(struct ad7944_adc *adc,
> + const struct iio_chan_spec *chan)
> +{
> + unsigned int t_conv_ns = adc->always_turbo ? adc->timing_spec-
> >turbo_conv_ns
> + : adc->timing_spec-
> >conv_ns;
> + struct spi_transfer xfers[] = {
> + {
> + /*
> + * NB: can get better performance from some SPI
> + * controllers if we use the same bits_per_word
> + * in every transfer.
> + */
> + .bits_per_word = chan->scan_type.realbits,
> + /*
> + * CS has to be high for full conversion time to
> avoid
> + * triggering the busy indication.
> + */
> + .cs_off = 1,
> + .delay = {
> + .value = t_conv_ns,
> + .unit = SPI_DELAY_UNIT_NSECS,
> + },
> +
> + },
> + {
> + .rx_buf = &adc->sample.raw,
> + .len = BITS_TO_BYTES(chan->scan_type.storagebits),
> + .bits_per_word = chan->scan_type.realbits,
> + },
> + };
> + int ret;
> +
> + /*
> + * In 4-wire mode, the CNV line is held high for the entire
> conversion
> + * and acquisition process.
> + */
> + gpiod_set_value_cansleep(adc->cnv, 1);
> + ret = spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers));
> + gpiod_set_value_cansleep(adc->cnv, 0);
> +
> + return ret;
> +}
> +
> +static int ad7944_single_conversion(struct ad7944_adc *adc,
> + const struct iio_chan_spec *chan,
> + int *val)
> +{
> + int ret;
> +
> + ret = ad7944_4wire_mode_conversion(adc, chan);
> + if (ret)
> + return ret;
> +
> + if (chan->scan_type.storagebits > 16)
> + *val = adc->sample.raw.u32;
> + else
> + *val = adc->sample.raw.u16;
> +
> + if (chan->scan_type.sign == 's')
> + *val = sign_extend32(*val, chan->scan_type.realbits - 1);
> +
> + return IIO_VAL_INT;
> +}
> +
> +static int ad7944_read_raw(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + int *val, int *val2, long info)
> +{
> + struct ad7944_adc *adc = iio_priv(indio_dev);
> + int ret;
> +
> + switch (info) {
> + case IIO_CHAN_INFO_RAW:
> + ret = iio_device_claim_direct_mode(indio_dev);
> + if (ret)
> + return ret;
> +
> + ret = ad7944_single_conversion(adc, chan, val);
> + iio_device_release_direct_mode(indio_dev);
> + return ret;
> +
> + case IIO_CHAN_INFO_SCALE:
> + switch (chan->type) {
> + case IIO_VOLTAGE:
> + *val = adc->ref_mv;
> +
> + if (chan->scan_type.sign == 's')
> + *val2 = chan->scan_type.realbits - 1;
> + else
> + *val2 = chan->scan_type.realbits;
> +
> + return IIO_VAL_FRACTIONAL_LOG2;
> + default:
> + return -EINVAL;
> + }
> +
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static const struct iio_info ad7944_iio_info = {
> + .read_raw = &ad7944_read_raw,
> +};
> +
> +static irqreturn_t ad7944_trigger_handler(int irq, void *p)
> +{
> + struct iio_poll_func *pf = p;
> + struct iio_dev *indio_dev = pf->indio_dev;
> + struct ad7944_adc *adc = iio_priv(indio_dev);
> + int ret;
> +
> + ret = ad7944_4wire_mode_conversion(adc, &indio_dev->channels[0]);
> + if (ret)
> + goto out;
> +
> + iio_push_to_buffers_with_timestamp(indio_dev, &adc->sample.raw,
> + pf->timestamp);
> +
> +out:
> + iio_trigger_notify_done(indio_dev->trig);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static const char * const ad7944_power_supplies[] = {
> + "avdd", "dvdd", "bvdd", "vio"
> +};
> +
> +static void ad7944_ref_disable(void *ref)
> +{
> + regulator_disable(ref);
> +}
> +
> +static int ad7944_probe(struct spi_device *spi)
> +{
> + const struct ad7944_chip_info *chip_info;
> + struct device *dev = &spi->dev;
> + struct iio_dev *indio_dev;
> + struct ad7944_adc *adc;
> + bool have_refin = false;
> + struct regulator *ref;
> + int ret;
> +
> + /*
> + * driver currently only supports the conventional "4-wire" mode and
> + * not other special wiring configurations.
> + */
> + if (device_property_present(dev, "adi,spi-mode"))
> + return dev_err_probe(dev, -EINVAL,
> + "adi,spi-mode is not currently
> supported\n");
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + adc = iio_priv(indio_dev);
> + adc->spi = spi;
> +
> + chip_info = spi_get_device_match_data(spi);
> + if (!chip_info)
> + return dev_err_probe(dev, -EINVAL, "no chip info\n");
> +
> + adc->timing_spec = chip_info->timing_spec;
> +
> + /*
> + * Some chips use unusual word sizes, so check now instead of waiting
> + * for the first xfer.
> + */
> + if (!spi_is_bpw_supported(spi, chip_info-
> >channels[0].scan_type.realbits))
> + return dev_err_probe(dev, -EINVAL,
> + "SPI host does not support %d bits per
> word\n",
> + chip_info->channels[0].scan_type.realbits);
> +
> + ret = devm_regulator_bulk_get_enable(dev,
> +
> ARRAY_SIZE(ad7944_power_supplies),
> + ad7944_power_supplies);
> + if (ret)
> + return dev_err_probe(dev, ret,
> + "failed to get and enable supplies\n");
> +
> + /*
> + * Sort out what is being used for the reference voltage. Options
> are:
> + * - internal reference: neither REF or REFIN is connected
> + * - internal reference with external buffer: REF not connected,
> REFIN
> + * is connected
> + * - external reference: REF is connected, REFIN is not connected
> + */
> +
> + ref = devm_regulator_get_optional(dev, "ref");
> + if (IS_ERR(ref)) {
> + if (PTR_ERR(ref) != -ENODEV)
> + return dev_err_probe(dev, PTR_ERR(ref),
> + "failed to get REF supply\n");
> +
> + ref = NULL;
> + }
> +
> + ret = devm_regulator_get_enable_optional(dev, "refin");
> + if (ret == 0)
> + have_refin = true;
> + else if (ret != -ENODEV)
> + return dev_err_probe(dev, ret,
> + "failed to get and enable REFIN
> supply\n");
> +
> + if (have_refin && ref)
> + return dev_err_probe(dev, -EINVAL,
> + "cannot have both refin and ref
> supplies\n");
> +
> + if (ref) {
> + ret = regulator_enable(ref);
> + if (ret)
> + return dev_err_probe(dev, ret,
> + "failed to enable REF
> supply\n");
> +
> + ret = devm_add_action_or_reset(dev, ad7944_ref_disable, ref);
> + if (ret)
> + return ret;
> +
> + ret = regulator_get_voltage(ref);
> + if (ret < 0)
> + return dev_err_probe(dev, ret,
> + "failed to get REF voltage\n");
> +
> + /* external reference */
> + adc->ref_mv = ret / 1000;
> + } else {
> + /* internal reference */
> + adc->ref_mv = AD7944_INTERNAL_REF_MV;
> + }
> +
> + /*
> + * CNV gpio is required in 4-wire mode which is the only currently
> + * supported mode.
> + */
> + adc->cnv = devm_gpiod_get(dev, "cnv", GPIOD_OUT_LOW);
> + if (IS_ERR(adc->cnv))
> + return dev_err_probe(dev, PTR_ERR(adc->cnv),
> + "failed to get CNV GPIO\n");
> +
> + adc->turbo = devm_gpiod_get_optional(dev, "turbo", GPIOD_OUT_LOW);
> + if (IS_ERR(adc->turbo))
> + return dev_err_probe(dev, PTR_ERR(adc->turbo),
> + "failed to get TURBO GPIO\n");
> +
> + adc->always_turbo = device_property_present(dev, "adi,always-turbo");
> +
> + if (adc->turbo && adc->always_turbo)
> + return dev_err_probe(dev, -EINVAL,
> + "cannot have both turbo-gpios and adi,always-
> turbo\n");
> +
> + indio_dev->name = chip_info->name;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &ad7944_iio_info;
> + indio_dev->channels = chip_info->channels;
> + indio_dev->num_channels = ARRAY_SIZE(chip_info->channels);
> +
> + ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
> + iio_pollfunc_store_time,
> + ad7944_trigger_handler, NULL);
> + if (ret)
> + return ret;
> +
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +
> +static const struct of_device_id ad7944_of_match[] = {
> + { .compatible = "adi,ad7944", .data = &ad7944_chip_info },
> + { .compatible = "adi,ad7985", .data = &ad7985_chip_info },
> + { .compatible = "adi,ad7986", .data = &ad7986_chip_info },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, ad7944_of_match);
> +
> +static const struct spi_device_id ad7944_spi_id[] = {
> + { "ad7944", (kernel_ulong_t)&ad7944_chip_info },
> + { "ad7985", (kernel_ulong_t)&ad7985_chip_info },
> + { "ad7986", (kernel_ulong_t)&ad7986_chip_info },
> + { }
> +
> +};
> +MODULE_DEVICE_TABLE(spi, ad7944_spi_id);
> +
> +static struct spi_driver ad7944_driver = {
> + .driver = {
> + .name = "ad7944",
> + .of_match_table = ad7944_of_match,
> + },
> + .probe = ad7944_probe,
> + .id_table = ad7944_spi_id,
> +};
> +module_spi_driver(ad7944_driver);
> +
> +MODULE_AUTHOR("David Lechner <[email protected]>");
> +MODULE_DESCRIPTION("Analog Devices AD7944 PulSAR ADC family driver");
> +MODULE_LICENSE("GPL");
>
On Mon, 4 Mar 2024 13:48:45 -0600
David Lechner <[email protected]> wrote:
> This is a new driver for the Analog Devices AD7944/AD7985/AD7986 family
> of ADCs. These are fairly simple chips (e.g. no configuration registers)
> but do have some unusual SPI configurations. The initial driver is only
> supporting the normal (4-wire) SPI mode.
>
> This work is done on behalf of Analog Devices, Inc., hence the
> MAINTAINERS are @analog.com folks.
Series applied to the togreg-normal branch of iio.git and pushed out
for 0-day to get a head start. This is now 6.10 material given timing.
I'll be rebasing my tree after rc1 at which point I'll fall back to my normal
togreg branch naming.
Thanks,
Jonathan