2024-03-21 16:57:28

by Mikhail Kobuk

[permalink] [raw]
Subject: [PATCH 2/2] phy: marvell: a3700-comphy: Fix hardcoded array size

Replace hardcoded 'gbe_phy_init' array size by explicit one.

Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation")
Signed-off-by: Mikhail Kobuk <[email protected]>
---
drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
index 41162d7228c9..15bf10710de0 100644
--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
+++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
@@ -603,7 +603,7 @@ static void comphy_gbe_phy_init(struct mvebu_a3700_comphy_lane *lane,
u16 val;

fix_idx = 0;
- for (addr = 0; addr < 512; addr++) {
+ for (addr = 0; addr < ARRAY_SIZE(gbe_phy_init); addr++) {
/*
* All PHY register values are defined in full for 3.125Gbps
* SERDES speed. The values required for 1.25 Gbps are almost
--
2.44.0



2024-03-22 07:27:05

by Miquel Raynal

[permalink] [raw]
Subject: Re: [PATCH 2/2] phy: marvell: a3700-comphy: Fix hardcoded array size

Hi Mikhail,

[email protected] wrote on Thu, 21 Mar 2024 19:47:31 +0300:

> Replace hardcoded 'gbe_phy_init' array size by explicit one.
>
> Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation")
> Signed-off-by: Mikhail Kobuk <[email protected]>
> ---
> drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
> index 41162d7228c9..15bf10710de0 100644
> --- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
> +++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
> @@ -603,7 +603,7 @@ static void comphy_gbe_phy_init(struct mvebu_a3700_comphy_lane *lane,
> u16 val;
>
> fix_idx = 0;
> - for (addr = 0; addr < 512; addr++) {
> + for (addr = 0; addr < ARRAY_SIZE(gbe_phy_init); addr++) {
> /*
> * All PHY register values are defined in full for 3.125Gbps
> * SERDES speed. The values required for 1.25 Gbps are almost

512 is also used where gbe_phy_init is defined, so maybe it would be
worthe defining this size once and then use the definition in both
places.

Thanks, Miquèl