The Octeontx2 MAC block (CGX) has separate data paths (SMU and GMP) for
different speeds, allowing for efficient data transfer.
The previous patch which added pause frame configuration has a bug due
to which pause frame feature is not working in GMP mode.
This patch fixes the issue by configurating appropriate registers.
Fixes: f7e086e754fe ("octeontx2-af: Pause frame configuration at cgx")
Signed-off-by: Hariprasad Kelam <[email protected]>
---
drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index 3c0f55b3e48e..b86f3224f0b7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -808,6 +808,11 @@ static int cgx_lmac_enadis_pause_frm(void *cgxd, int lmac_id,
if (!is_lmac_valid(cgx, lmac_id))
return -ENODEV;
+ cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);
+ cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;
+ cfg |= rx_pause ? CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK : 0x0;
+ cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
+
cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);
cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;
cfg |= rx_pause ? CGX_SMUX_RX_FRM_CTL_CTL_BCK : 0x0;
--
2.17.1
On Tue, Mar 26, 2024 at 10:57:20AM +0530, Hariprasad Kelam wrote:
> The Octeontx2 MAC block (CGX) has separate data paths (SMU and GMP) for
> different speeds, allowing for efficient data transfer.
>
> The previous patch which added pause frame configuration has a bug due
> to which pause frame feature is not working in GMP mode.
>
> This patch fixes the issue by configurating appropriate registers.
>
> Fixes: f7e086e754fe ("octeontx2-af: Pause frame configuration at cgx")
> Signed-off-by: Hariprasad Kelam <[email protected]>
nit: For consistency with git history,
octeontx2-af should be all lowercase in the subject
Reviewed-by: Simon Horman <[email protected]>
Hello:
This patch was applied to netdev/net.git (main)
by Paolo Abeni <[email protected]>:
On Tue, 26 Mar 2024 10:57:20 +0530 you wrote:
> The Octeontx2 MAC block (CGX) has separate data paths (SMU and GMP) for
> different speeds, allowing for efficient data transfer.
>
> The previous patch which added pause frame configuration has a bug due
> to which pause frame feature is not working in GMP mode.
>
> This patch fixes the issue by configurating appropriate registers.
>
> [...]
Here is the summary with links:
- [net] Octeontx2-af: fix pause frame configuration in GMP mode
https://git.kernel.org/netdev/net/c/40d4b4807cad
You are awesome, thank you!
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