The register offset array defined locally for the
CLK_ALPHA_PLL_TYPE_STROMER_PLUS is the same as the
entry defined for CLK_ALPHA_PLL_TYPE_STROMER in the
'clk_alpha_pll_regs' array.
To avoid code duplication, remove the local definition
and use the global one instead.
No functional changes.
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
---
Changes in v4:
- no changes
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- rebase on top of v6.9-rc1
- add Reviewed-by tag from Konrad
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- add Reviewed-by tag from Dmitry
- Link to v1: https://lore.kernel.org/r/[email protected]
Depends on the following patches:
- "clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure"
Link: https://lore.kernel.org/r/[email protected]
- "clk: qcom: clk-alpha-pll: Stromer register cleanup"
Link: https://lore.kernel.org/r/[email protected]
---
drivers/clk/qcom/apss-ipq-pll.c | 24 ++++++------------------
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index dfffec2f06ae..ed3e6405f99c 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -24,17 +24,6 @@ static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
[PLL_OFF_TEST_CTL] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x34,
},
- [CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
- [PLL_OFF_L_VAL] = 0x08,
- [PLL_OFF_ALPHA_VAL] = 0x10,
- [PLL_OFF_ALPHA_VAL_U] = 0x14,
- [PLL_OFF_USER_CTL] = 0x18,
- [PLL_OFF_USER_CTL_U] = 0x1c,
- [PLL_OFF_CONFIG_CTL] = 0x20,
- [PLL_OFF_STATUS] = 0x28,
- [PLL_OFF_TEST_CTL] = 0x30,
- [PLL_OFF_TEST_CTL_U] = 0x34,
- },
};
static struct clk_alpha_pll ipq_pll_huayra = {
@@ -57,12 +46,7 @@ static struct clk_alpha_pll ipq_pll_huayra = {
static struct clk_alpha_pll ipq_pll_stromer = {
.offset = 0x0,
- /*
- * Reuse CLK_ALPHA_PLL_TYPE_STROMER_PLUS register offsets.
- * Although this is a bit confusing, but the offset values
- * are correct nevertheless.
- */
- .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS],
+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER],
.flags = SUPPORTS_DYNAMIC_UPDATE,
.clkr = {
.enable_reg = 0x0,
@@ -80,7 +64,11 @@ static struct clk_alpha_pll ipq_pll_stromer = {
static struct clk_alpha_pll ipq_pll_stromer_plus = {
.offset = 0x0,
- .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_STROMER_PLUS],
+ /*
+ * The register offsets of the Stromer Plus PLL used in IPQ5332
+ * are the same as the Stromer PLL's offsets.
+ */
+ .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER],
.flags = SUPPORTS_DYNAMIC_UPDATE,
.clkr = {
.enable_reg = 0x0,
--
2.44.0