2024-01-27 04:26:15

by Jacob Pan

[permalink] [raw]
Subject: [PATCH 05/15] x86/irq: Reserve a per CPU IDT vector for posted MSIs

When posted MSI is enabled, all device MSIs are multiplexed into a single
notification vector. MSI handlers will be de-multiplexed at run-time by
system software without IDT delivery.

Signed-off-by: Jacob Pan <[email protected]>
---
arch/x86/include/asm/irq_vectors.h | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 3a19904c2db6..08329bef5b1d 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -99,9 +99,16 @@

#define LOCAL_TIMER_VECTOR 0xec

+/*
+ * Posted interrupt notification vector for all device MSIs delivered to
+ * the host kernel.
+ */
+#define POSTED_MSI_NOTIFICATION_VECTOR 0xeb
#define NR_VECTORS 256

-#ifdef CONFIG_X86_LOCAL_APIC
+#ifdef X86_POSTED_MSI
+#define FIRST_SYSTEM_VECTOR POSTED_MSI_NOTIFICATION_VECTOR
+#elif defined(CONFIG_X86_LOCAL_APIC)
#define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR
#else
#define FIRST_SYSTEM_VECTOR NR_VECTORS
--
2.25.1



2024-04-04 13:39:55

by Robert Hoo

[permalink] [raw]
Subject: Re: [PATCH 05/15] x86/irq: Reserve a per CPU IDT vector for posted MSIs

On 1/27/2024 7:42 AM, Jacob Pan wrote:
> When posted MSI is enabled, all device MSIs are multiplexed into a single
> notification vector. MSI handlers will be de-multiplexed at run-time by
> system software without IDT delivery.
>
> Signed-off-by: Jacob Pan <[email protected]>
> ---
> arch/x86/include/asm/irq_vectors.h | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
> index 3a19904c2db6..08329bef5b1d 100644
> --- a/arch/x86/include/asm/irq_vectors.h
> +++ b/arch/x86/include/asm/irq_vectors.h
> @@ -99,9 +99,16 @@
>
> #define LOCAL_TIMER_VECTOR 0xec
>
> +/*
> + * Posted interrupt notification vector for all device MSIs delivered to
> + * the host kernel.
> + */
> +#define POSTED_MSI_NOTIFICATION_VECTOR 0xeb
> #define NR_VECTORS 256
>
> -#ifdef CONFIG_X86_LOCAL_APIC
> +#ifdef X86_POSTED_MSI

X86_POSTED_MSI --> CONFIG_X86_POSTED_MSI?

> +#define FIRST_SYSTEM_VECTOR POSTED_MSI_NOTIFICATION_VECTOR
> +#elif defined(CONFIG_X86_LOCAL_APIC)
> #define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR
> #else
> #define FIRST_SYSTEM_VECTOR NR_VECTORS


2024-04-04 17:13:23

by Jacob Pan

[permalink] [raw]
Subject: Re: [PATCH 05/15] x86/irq: Reserve a per CPU IDT vector for posted MSIs

Hi Robert,

On Thu, 4 Apr 2024 21:38:34 +0800, Robert Hoo <[email protected]>
wrote:

> On 1/27/2024 7:42 AM, Jacob Pan wrote:
> > When posted MSI is enabled, all device MSIs are multiplexed into a
> > single notification vector. MSI handlers will be de-multiplexed at
> > run-time by system software without IDT delivery.
> >
> > Signed-off-by: Jacob Pan <[email protected]>
> > ---
> > arch/x86/include/asm/irq_vectors.h | 9 ++++++++-
> > 1 file changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/include/asm/irq_vectors.h
> > b/arch/x86/include/asm/irq_vectors.h index 3a19904c2db6..08329bef5b1d
> > 100644 --- a/arch/x86/include/asm/irq_vectors.h
> > +++ b/arch/x86/include/asm/irq_vectors.h
> > @@ -99,9 +99,16 @@
> >
> > #define LOCAL_TIMER_VECTOR 0xec
> >
> > +/*
> > + * Posted interrupt notification vector for all device MSIs delivered
> > to
> > + * the host kernel.
> > + */
> > +#define POSTED_MSI_NOTIFICATION_VECTOR 0xeb
> > #define NR_VECTORS 256
> >
> > -#ifdef CONFIG_X86_LOCAL_APIC
> > +#ifdef X86_POSTED_MSI
>
> X86_POSTED_MSI --> CONFIG_X86_POSTED_MSI?
Indeed, thanks for catching that!

> > +#define FIRST_SYSTEM_VECTOR
> > POSTED_MSI_NOTIFICATION_VECTOR +#elif defined(CONFIG_X86_LOCAL_APIC)
> > #define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR
> > #else
> > #define FIRST_SYSTEM_VECTOR NR_VECTORS
>


Thanks,

Jacob