Changes in v2:
- Rebased over next-20240409 (because of merge issue for patch 1)
- Added ufs: prefix to patch 1
- Added forgotten ufs-rx-symbol clock to the binding
This series performs some fixes and cleanups for the MediaTek UFSHCI
controller driver.
In particular, while adding the MT8195 compatible to the mediatek,ufs
binding, I noticed that it was allowing just one clock, completely
ignoring the optional ones, including the crypt-xxx clocks, all of
the optional regulators, and other properties.
Between all the other properties, two are completely useless, as they
are there just to activate features that, on SoCs that don't support
these, won't anyway be activated because of missing clocks or missing
regulators, or missing other properties;
as for the other vendor-specific properties, like ufs-disable-ah8,
ufs-broken-vcc, ufs-pmc-via-fastauto, since the current merge window
is closing, I didn't do extensive research so I've left them in place
but didn't add them to the devicetree binding yet.
The plan is to check those later and eventually give them a removal
treatment, or add them to the bindings in a part two series.
For now, at least, this is already a big improvement.
P.S.: The only SoC having UFSHCI upstream is MT8183, which only has
just one clock, and *nothing else* uses properties, clocks, etc that
were renamed in this cleanup.
Cheers!
AngeloGioacchino Del Regno (8):
scsi: ufs: ufs-mediatek: Remove useless mediatek,ufs-support-va09 property
scsi: ufs: ufs-mediatek: Fix property name for crypt boost voltage
scsi: ufs: ufs-mediatek: Remove useless mediatek,ufs-boost-crypt
property
scsi: ufs: ufs-mediatek: Avoid underscores in crypt clock names
dt-bindings: ufs: mediatek,ufs: Document MT8192 compatible with MT8183
dt-bindings: ufs: mediatek,ufs: Document MT8195 compatible
dt-bindings: ufs: mediatek,ufs: Document additional clocks
dt-bindings: ufs: mediatek,ufs: Document optional dvfsrc/va09
regulators
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 29 +++++-
drivers/ufs/host/ufs-mediatek.c | 91 +++++++++++--------
2 files changed, 80 insertions(+), 40 deletions(-)
--
2.44.0
Rename "boost-crypt-vcore-min" to "mediatek,boost-crypt-microvolt":
this is a vendor specific property and needs the "mediatek," prefix,
moreover, this is not defining a minimum voltage per-se;
Even if technically a call to regulator_set_voltage() does indeed
internally set a VMIN for a regulator, the API also supports other
calls to set VMIN-VMAX constraints, so this "vcore-min"->"microvolt"
rename is performed in order to avoid confusion, other than adding
the "microvolt" suffix to it (as this does take microvolts!).
Fixes: 590b0d2372fe ("scsi: ufs-mediatek: Support performance mode for inline encryption engine")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index e4643ac49033..688d85909ad6 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -595,9 +595,9 @@ static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
goto disable_caps;
}
- if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min",
+ if (of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt",
&volt)) {
- dev_info(dev, "failed to get boost-crypt-vcore-min");
+ dev_info(dev, "failed to get mediatek,boost-crypt-microvolt");
goto disable_caps;
}
--
2.44.0
There is no need to have a property that activates the inline crypto
boost feature, as this needs many things: a regulator, three clocks,
and the mediatek,boost-crypt-microvolt property to be set.
If any one of these is missing, the feature won't be activated,
hence, it is useless to have yet one more property to enable that.
While at it, also address another two issues:
1. Give back the return value to the caller and make sure to fail
probing if we get an -EPROBE_DEFER or -ENOMEM; and
2. Free the ufs_mtk_crypt_cfg structure allocated in the crypto
boost function if said functionality could not be enabled because
it's not supported, as that'd be only wasted memory.
Last but not least, move the devm_kzalloc() call for ufs_mtk_crypt_cfg
to after getting the dvfsrc-vcore regulator and the boost microvolt
property, as if those fail there's no reason to even allocate that.
Fixes: ac8c2459091c ("scsi: ufs-mediatek: Decouple features from platform bindings")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 55 ++++++++++++++++++---------------
1 file changed, 30 insertions(+), 25 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 688d85909ad6..47f16e6720f4 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -575,51 +575,55 @@ static int ufs_mtk_init_host_clk(struct ufs_hba *hba, const char *name,
return ret;
}
-static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
+static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct ufs_mtk_crypt_cfg *cfg;
struct device *dev = hba->dev;
struct regulator *reg;
u32 volt;
-
- host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)),
- GFP_KERNEL);
- if (!host->crypt)
- goto disable_caps;
+ int ret;
reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
if (IS_ERR(reg)) {
- dev_info(dev, "failed to get dvfsrc-vcore: %ld",
- PTR_ERR(reg));
- goto disable_caps;
+ ret = PTR_ERR(reg);
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ return 0;
}
- if (of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt",
- &volt)) {
+ ret = of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt", &volt);
+ if (ret) {
dev_info(dev, "failed to get mediatek,boost-crypt-microvolt");
- goto disable_caps;
+ return 0;
}
+ host->crypt = devm_kzalloc(dev, sizeof(*host->crypt), GFP_KERNEL);
+ if (!host->crypt)
+ return -ENOMEM;
+
cfg = host->crypt;
- if (ufs_mtk_init_host_clk(hba, "crypt_mux",
- &cfg->clk_crypt_mux))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_mux", &cfg->clk_crypt_mux);
+ if (ret)
+ goto out;
- if (ufs_mtk_init_host_clk(hba, "crypt_lp",
- &cfg->clk_crypt_lp))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_lp", &cfg->clk_crypt_lp);
+ if (ret)
+ goto out;
- if (ufs_mtk_init_host_clk(hba, "crypt_perf",
- &cfg->clk_crypt_perf))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_perf", &cfg->clk_crypt_perf);
+ if (ret)
+ goto out;
cfg->reg_vcore = reg;
cfg->vcore_volt = volt;
host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
-disable_caps:
- return;
+out:
+ if (ret)
+ devm_kfree(dev, host->crypt);
+ return 0;
}
static int ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
@@ -648,8 +652,9 @@ static int ufs_mtk_init_host_caps(struct ufs_hba *hba)
struct device_node *np = hba->dev->of_node;
int ret;
- if (of_property_read_bool(np, "mediatek,ufs-boost-crypt"))
- ufs_mtk_init_boost_crypt(hba);
+ ret = ufs_mtk_init_boost_crypt(hba);
+ if (ret)
+ return ret;
ret = ufs_mtk_init_va09_pwr_ctrl(hba);
if (ret)
--
2.44.0
Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
some of these clocks are optional and used only for scaling purposes
to save power, or to improve performance in the case of the crypt
clocks.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index e2c276da3f2c..21b038db100c 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -26,11 +26,23 @@ properties:
- const: mediatek,mt8183-ufshci
clocks:
- maxItems: 1
+ minItems: 1
clock-names:
+ minItems: 1
items:
- const: ufs
+ - const: ufs-aes
+ - const: ufs-tick
+ - const: unipro-sys
+ - const: unipro-tick
+ - const: ufs-sap
+ - const: ufs-tx-symbol
+ - const: ufs-rx-symbol
+ - const: ufs-mem
+ - const: crypt-mux
+ - const: crypt-lp
+ - const: crypt-perf
phys:
maxItems: 1
--
2.44.0
Change all of crypt_{mux,lp,perf} clock names to crypt-{mux,lp-perf}:
retaining compatibility with the old names is ignored as there is no
user of this driver declaring any of those clocks, and the binding
also doesn't allow these ones at all.
Fixes: 590b0d2372fe ("scsi: ufs-mediatek: Support performance mode for inline encryption engine")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 47f16e6720f4..5db6d27f75af 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -604,15 +604,15 @@ static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
return -ENOMEM;
cfg = host->crypt;
- ret = ufs_mtk_init_host_clk(hba, "crypt_mux", &cfg->clk_crypt_mux);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-mux", &cfg->clk_crypt_mux);
if (ret)
goto out;
- ret = ufs_mtk_init_host_clk(hba, "crypt_lp", &cfg->clk_crypt_lp);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-lp", &cfg->clk_crypt_lp);
if (ret)
goto out;
- ret = ufs_mtk_init_host_clk(hba, "crypt_perf", &cfg->clk_crypt_perf);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-perf", &cfg->clk_crypt_perf);
if (ret)
goto out;
--
2.44.0
On Thu, Apr 11, 2024 at 01:42:59PM +0200, AngeloGioacchino Del Regno wrote:
> Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
I appreciate being told they're on all, rather than it being unsaid and
having to ask.
> some of these clocks are optional and used only for scaling purposes
> to save power, or to improve performance in the case of the crypt
> clocks.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> index e2c276da3f2c..21b038db100c 100644
> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> @@ -26,11 +26,23 @@ properties:
> - const: mediatek,mt8183-ufshci
>
> clocks:
> - maxItems: 1
> + minItems: 1
Could you add an itemised list to the clocks property please?
>
> clock-names:
> + minItems: 1
> items:
> - const: ufs
> + - const: ufs-aes
> + - const: ufs-tick
> + - const: unipro-sys
> + - const: unipro-tick
> + - const: ufs-sap
> + - const: ufs-tx-symbol
> + - const: ufs-rx-symbol
> + - const: ufs-mem
> + - const: crypt-mux
> + - const: crypt-lp
> + - const: crypt-perf
>
> phys:
> maxItems: 1
> --
> 2.44.0
>
Il 11/04/24 17:10, Conor Dooley ha scritto:
> On Thu, Apr 11, 2024 at 01:42:59PM +0200, AngeloGioacchino Del Regno wrote:
>> Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
>
> I appreciate being told they're on all, rather than it being unsaid and
> having to ask.
>
You're welcome :-)
>> some of these clocks are optional and used only for scaling purposes
>> to save power, or to improve performance in the case of the crypt
>> clocks.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
>> ---
>> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 14 +++++++++++++-
>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>> index e2c276da3f2c..21b038db100c 100644
>> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>> @@ -26,11 +26,23 @@ properties:
>> - const: mediatek,mt8183-ufshci
>>
>> clocks:
>> - maxItems: 1
>> + minItems: 1
>
> Could you add an itemised list to the clocks property please?
>
Not really... Honestly, I'm not confident that the description will be 100%
correct for all of them... can we do that at a later time, when I will be
really that much confident in writing down a proper description for each
of them?
The only thing that I'm really sure of is exactly what I wrote in this commit,
nothing less, nothing more... for now :')
Cheers,
Angelo
>>
>> clock-names:
>> + minItems: 1
>> items:
>> - const: ufs
>> + - const: ufs-aes
>
>
>> + - const: ufs-tick
>> + - const: unipro-sys
>> + - const: unipro-tick
>> + - const: ufs-sap
>> + - const: ufs-tx-symbol
>> + - const: ufs-rx-symbol
>> + - const: ufs-mem
>> + - const: crypt-mux
>> + - const: crypt-lp
>> + - const: crypt-perf
>>
>> phys:
>> maxItems: 1
>> --
>> 2.44.0
>>
On Thu, Apr 11, 2024 at 05:14:34PM +0200, AngeloGioacchino Del Regno wrote:
> Il 11/04/24 17:10, Conor Dooley ha scritto:
> > On Thu, Apr 11, 2024 at 01:42:59PM +0200, AngeloGioacchino Del Regno wrote:
> > > Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
> >
> > I appreciate being told they're on all, rather than it being unsaid and
> > having to ask.
> >
>
> You're welcome :-)
>
> > > some of these clocks are optional and used only for scaling purposes
> > > to save power, or to improve performance in the case of the crypt
> > > clocks.
> > >
> > > Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> > > ---
> > > .../devicetree/bindings/ufs/mediatek,ufs.yaml | 14 +++++++++++++-
> > > 1 file changed, 13 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > index e2c276da3f2c..21b038db100c 100644
> > > --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > @@ -26,11 +26,23 @@ properties:
> > > - const: mediatek,mt8183-ufshci
> > > clocks:
> > > - maxItems: 1
> > > + minItems: 1
> >
> > Could you add an itemised list to the clocks property please?
> >
>
> Not really... Honestly, I'm not confident that the description will be 100%
> correct for all of them... can we do that at a later time, when I will be
> really that much confident in writing down a proper description for each
> of them?
>
> The only thing that I'm really sure of is exactly what I wrote in this commit,
> nothing less, nothing more... for now :')
fwiw, my motivation here was a better explanation for what "ufs" means
as a clock. When the block has some "ufs" clock and a "axi" clock it's
kinda clear what they do, but with 7 ufs clocks now, it's not really
clear what the bare "ufs" one actually does.
If you can't provide an itemised list, please set maxitems.
> > > clock-names:
> > > + minItems: 1
> > > items:
> > > - const: ufs
> > > + - const: ufs-aes
> >
> >
> > > + - const: ufs-tick
> > > + - const: unipro-sys
> > > + - const: unipro-tick
> > > + - const: ufs-sap
> > > + - const: ufs-tx-symbol
> > > + - const: ufs-rx-symbol
> > > + - const: ufs-mem
> > > + - const: crypt-mux
> > > + - const: crypt-lp
> > > + - const: crypt-perf
> > > phys:
> > > maxItems: 1
> > > --
> > > 2.44.0
> > >
>
Il 11/04/24 17:18, Conor Dooley ha scritto:
> On Thu, Apr 11, 2024 at 05:14:34PM +0200, AngeloGioacchino Del Regno wrote:
>> Il 11/04/24 17:10, Conor Dooley ha scritto:
>>> On Thu, Apr 11, 2024 at 01:42:59PM +0200, AngeloGioacchino Del Regno wrote:
>>>> Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
>>>
>>> I appreciate being told they're on all, rather than it being unsaid and
>>> having to ask.
>>>
>>
>> You're welcome :-)
>>
>>>> some of these clocks are optional and used only for scaling purposes
>>>> to save power, or to improve performance in the case of the crypt
>>>> clocks.
>>>>
>>>> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
>>>> ---
>>>> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 14 +++++++++++++-
>>>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>>>> index e2c276da3f2c..21b038db100c 100644
>>>> --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>>>> +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
>>>> @@ -26,11 +26,23 @@ properties:
>>>> - const: mediatek,mt8183-ufshci
>>>> clocks:
>>>> - maxItems: 1
>>>> + minItems: 1
>>>
>>> Could you add an itemised list to the clocks property please?
>>>
>>
>> Not really... Honestly, I'm not confident that the description will be 100%
>> correct for all of them... can we do that at a later time, when I will be
>> really that much confident in writing down a proper description for each
>> of them?
>>
>> The only thing that I'm really sure of is exactly what I wrote in this commit,
>> nothing less, nothing more... for now :')
>
> fwiw, my motivation here was a better explanation for what "ufs" means
> as a clock. When the block has some "ufs" clock and a "axi" clock it's
> kinda clear what they do, but with 7 ufs clocks now, it's not really
> clear what the bare "ufs" one actually does.
>
> If you can't provide an itemised list, please set maxitems.
>
Not exactly right now, as I said. I will set maxItems instead.
By the way, "ufs" == "core", I didn't want to rename that one to avoid
breaking changes, of course.
>>>> clock-names:
>>>> + minItems: 1
>>>> items:
>>>> - const: ufs
>>>> + - const: ufs-aes
>>>
>>>
>>>> + - const: ufs-tick
>>>> + - const: unipro-sys
>>>> + - const: unipro-tick
>>>> + - const: ufs-sap
>>>> + - const: ufs-tx-symbol
>>>> + - const: ufs-rx-symbol
>>>> + - const: ufs-mem
>>>> + - const: crypt-mux
>>>> + - const: crypt-lp
>>>> + - const: crypt-perf
>>>> phys:
>>>> maxItems: 1
>>>> --
>>>> 2.44.0
>>>>
>>