2024-04-12 08:04:25

by Wei Fu

Subject: [PATCH 5/5] riscv: dts: thead: Add XuanTie TH1520 RTC device node

From: Wei Fu <[email protected]>

Add nodes for the XuanTie TH1520 RTC device node on the XuanTie TH1520 Soc.

Signed-off-by: Wei Fu <[email protected]>
---
arch/riscv/boot/dts/thead/th1520.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index cd6bc89a240c..62e588dbc942 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -463,6 +463,17 @@ timer7: timer@ffffc3303c {
status = "disabled";
};

+ rtc: rtc@fffff40000 {
+ compatible = "snps,dw-apb-rtc";
+ reg = <0xff 0xfff40000 0x0 0x1000>;
+ interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc_32k>;
+ clock-names = "osc_32k";
+ wakeup-source;
+ prescaler = <0x8000>;
+ status = "okay";
+ };
+
gpio@fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
--
2.44.0

2024-04-12 08:22:51

by Alexandre Belloni

Subject: Re: [PATCH 5/5] riscv: dts: thead: Add XuanTie TH1520 RTC device node

On 12/04/2024 16:01:47+0800, [email protected] wrote:
> From: Wei Fu <[email protected]>
>
> Add nodes for the XuanTie TH1520 RTC device node on the XuanTie TH1520 Soc.
>
> Signed-off-by: Wei Fu <[email protected]>
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index cd6bc89a240c..62e588dbc942 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -463,6 +463,17 @@ timer7: timer@ffffc3303c {
> status = "disabled";
> };
>
> + rtc: rtc@fffff40000 {
> + compatible = "snps,dw-apb-rtc";
> + reg = <0xff 0xfff40000 0x0 0x1000>;
> + interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc_32k>;
> + clock-names = "osc_32k";
> + wakeup-source;

The wakeup-source and interrupts properties are mutually exclusive.

> + prescaler = <0x8000>;
> + status = "okay";
> + };
> +
> gpio@fffff41000 {
> compatible = "snps,dw-apb-gpio";
> reg = <0xff 0xfff41000 0x0 0x1000>;
> --
> 2.44.0
>

--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

2024-04-12 09:21:45

by Krzysztof Kozlowski

Subject: Re: [PATCH 5/5] riscv: dts: thead: Add XuanTie TH1520 RTC device node

On 12/04/2024 10:01, [email protected] wrote:
> From: Wei Fu <[email protected]>
>
> Add nodes for the XuanTie TH1520 RTC device node on the XuanTie TH1520 Soc.
>
> Signed-off-by: Wei Fu <[email protected]>
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index cd6bc89a240c..62e588dbc942 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -463,6 +463,17 @@ timer7: timer@ffffc3303c {
> status = "disabled";
> };
>
> + rtc: rtc@fffff40000 {
> + compatible = "snps,dw-apb-rtc";

Please run scripts/checkpatch.pl and fix reported warnings. Then please
run `scripts/checkpatch.pl --strict` and (probably) fix more warnings.
Some warnings can be ignored, especially from --strict run, but the code
here looks like it needs a fix. Feel free to get in touch if the warning
is not clear.

> + reg = <0xff 0xfff40000 0x0 0x1000>;
> + interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc_32k>;
> + clock-names = "osc_32k";
> + wakeup-source;
> + prescaler = <0x8000>;

What is 0x8000? Why is it in hex if this divides the clock? Clock is in
Hz and we all operate on decimal units.

> + status = "okay";

Drop, please don't upstream directly downstream code.

> + };
> +
> gpio@fffff41000 {
> compatible = "snps,dw-apb-gpio";
> reg = <0xff 0xfff41000 0x0 0x1000>;

Best regards,
Krzysztof