2024-02-26 07:27:00

by Daniel J Blueman

Subject: [PATCH] x86: Trust initial offset in architectural TSC-adjust MSRs

When the BIOS configures the architectural TSC-adjust MSRs on secondary
sockets to correct a constant inter-chassis offset, after Linux brings
the cores online, the TSC sync check later resets the core-local MSR to
0, triggering HPET fallback and leading to performance loss.

Fix this by unconditionally using the initial adjust values read from the
MSRs. Trusting the initial offsets in this architectural mechanism is a
better approach than special-casing workarounds for specific platforms.

Signed-off-by: Daniel J Blueman <[email protected]>

---
arch/x86/kernel/tsc_sync.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 1123ef3ccf90..cd64b25154d7 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -188,17 +188,10 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu)
return false;

rdmsrl(MSR_IA32_TSC_ADJUST, bootval);
- cur->bootval = bootval;
+ cur->adjusted = cur->bootval = bootval;
cur->nextcheck = jiffies + HZ;
cur->warned = false;

- /*
- * If a non-zero TSC value for socket 0 may be valid then the default
- * adjusted value cannot assumed to be zero either.
- */
- if (tsc_async_resets)
- cur->adjusted = bootval;
-
/*
* Check whether this CPU is the first in a package to come up. In
* this case do not check the boot value against another package
--
2.40.1

2024-04-15 10:27:04

by Peter Zijlstra

Subject: Re: [PATCH] x86: Trust initial offset in architectural TSC-adjust MSRs

On Mon, Feb 26, 2024 at 03:25:33PM +0800, Daniel J Blueman wrote:
> When the BIOS configures the architectural TSC-adjust MSRs on secondary
> sockets to correct a constant inter-chassis offset, after Linux brings
> the cores online, the TSC sync check later resets the core-local MSR to
> 0, triggering HPET fallback and leading to performance loss.
>
> Fix this by unconditionally using the initial adjust values read from the
> MSRs. Trusting the initial offsets in this architectural mechanism is a
> better approach than special-casing workarounds for specific platforms.

Given the amount of BIOS fail in general, I'm thinking the number of
machines that have multi-chassis and get this right are far less than
the 'small' systems that get this wrong.