2024-04-16 22:17:57

by Judith Mendez

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Subject: [PATCH v2 0/6] MMC updates for TI K3 platforms

This patch series includes MMC updates for various TI K3 platforms.

It includes support for enabling UHS/SDR104 bus modes.

For AM62ax, add missing UHS support.

For AM65x, fix ITAP delay and OTAP delay and clkbuf-sel properties
in SDHCI nodes.

Lastly, change TPS6593x PMIC driver to built-in since booting SD
with UHS modes have a dependency on the driver.

Changes since v1:
- Drop patches that remove HS400 mode support
- Add patch 6/6

Link to v1:
https://lore.kernel.org/linux-devicetree/[email protected]/

Bhavya Kapoor (1):
arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode

Dasnavis Sabiya (1):
arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode

Judith Mendez (3):
arm64: dts: ti: k3-am65-main: Update sdhci properties
arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes
arm64: defconfig: Set CONFIG_MFD_TPS6594_I2C=y

Vignesh Raghavendra (1):
arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards

arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 --
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 26 +++++++++-------------
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 --
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 --
arch/arm64/configs/defconfig | 2 +-
6 files changed, 33 insertions(+), 22 deletions(-)


base-commit: 534ad093bb80f19c20b251a89f09ce1a0e3d4f2d
--
2.43.2



2024-04-16 22:18:02

by Judith Mendez

[permalink] [raw]
Subject: [PATCH v2 4/6] arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode

From: Bhavya Kapoor <[email protected]>

According to TRM for J721S2, SDR104 speed mode is supported by the SoC
but its capabilities were masked in device tree. Remove sdhci-caps-mask
to enable support for SDR104 speed mode for SD card in J721S2 SoC.

[+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM
- https://www.ti.com/lit/zip/spruj28

Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
Signed-off-by: Bhavya Kapoor <[email protected]>
Signed-off-by: Vignesh Raghavendra <[email protected]>
---
Changes since v1:
- no change
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 3cb06a7e4117f..9ed6949b40e9d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -768,8 +768,6 @@ main_sdhci1: mmc@4fb0000 {
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
dma-coherent;
- /* Masking support for SDR104 capability */
- sdhci-caps-mask = <0x00000003 0x00000000>;
status = "disabled";
};

--
2.43.2


2024-04-16 22:18:06

by Judith Mendez

[permalink] [raw]
Subject: [PATCH v2 2/6] arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes

On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD.
Remove the properties that are not applicable for each device.

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <[email protected]>
---
Changes since v1:
- no change
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 9 ---------
1 file changed, 9 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 0803a8b9bfe84..127f581a56bc6 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -439,12 +439,6 @@ sdhci0: mmc@4f80000 {
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
- ti,otap-del-sel-sd-hs = <0x0>;
- ti,otap-del-sel-sdr12 = <0x0>;
- ti,otap-del-sel-sdr25 = <0x0>;
- ti,otap-del-sel-sdr50 = <0x8>;
- ti,otap-del-sel-sdr104 = <0x7>;
- ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
ti,itap-del-sel-ddr52 = <0x0>;
@@ -462,15 +456,12 @@ sdhci1: mmc@4fa0000 {
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
- ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
ti,otap-del-sel-sdr12 = <0xf>;
ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
- ti,otap-del-sel-ddr52 = <0x4>;
- ti,otap-del-sel-hs200 = <0x7>;
ti,itap-del-sel-legacy = <0xa>;
ti,itap-del-sel-sd-hs = <0x1>;
ti,itap-del-sel-sdr12 = <0xa>;
--
2.43.2


2024-04-16 22:18:24

by Judith Mendez

[permalink] [raw]
Subject: [PATCH v2 1/6] arm64: dts: ti: k3-am65-main: Update sdhci properties

Update otap-del-sel properties as per datasheet [0].

Add missing clkbuf-sel and itap-del-sel values also as per
datasheet [0].

Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties
so the sdhci nodes could be more uniform across platforms.

[0] https://www.ti.com/lit/ds/symlink/am6548.pdf

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <[email protected]>
---
Changes since v1:
- no change
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 670557c89f756..0803a8b9bfe84 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -435,6 +435,8 @@ sdhci0: mmc@4f80000 {
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
@@ -445,8 +447,7 @@ sdhci0: mmc@4f80000 {
ti,otap-del-sel-ddr50 = <0x5>;
ti,otap-del-sel-ddr52 = <0x5>;
ti,otap-del-sel-hs200 = <0x5>;
- ti,otap-del-sel-hs400 = <0x0>;
- ti,trm-icp = <0x8>;
+ ti,itap-del-sel-ddr52 = <0x0>;
dma-coherent;
status = "disabled";
};
@@ -458,18 +459,22 @@ sdhci1: mmc@4fa0000 {
clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
clock-names = "clk_ahb", "clk_xin";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ ti,clkbuf-sel = <0x7>;
+ ti,trm-icp = <0x8>;
ti,otap-del-sel-legacy = <0x0>;
ti,otap-del-sel-mmc-hs = <0x0>;
ti,otap-del-sel-sd-hs = <0x0>;
- ti,otap-del-sel-sdr12 = <0x0>;
- ti,otap-del-sel-sdr25 = <0x0>;
+ ti,otap-del-sel-sdr12 = <0xf>;
+ ti,otap-del-sel-sdr25 = <0xf>;
ti,otap-del-sel-sdr50 = <0x8>;
ti,otap-del-sel-sdr104 = <0x7>;
ti,otap-del-sel-ddr50 = <0x4>;
ti,otap-del-sel-ddr52 = <0x4>;
ti,otap-del-sel-hs200 = <0x7>;
- ti,clkbuf-sel = <0x7>;
- ti,trm-icp = <0x8>;
+ ti,itap-del-sel-legacy = <0xa>;
+ ti,itap-del-sel-sd-hs = <0x1>;
+ ti,itap-del-sel-sdr12 = <0xa>;
+ ti,itap-del-sel-sdr25 = <0x1>;
dma-coherent;
status = "disabled";
};
--
2.43.2