Considering there are already 8 GP counters and 4 fixed counters on
latest Intel processors, like Sapphire Rapids. The original cnt[] array
length 10 is definitely not enough to cover all supported PMU counters on
these new processors even through currently KVM only supports 3 fixed
counters at most. This would cause out of bound memory access and may trigger
false alarm on PMU counter validation
It's probably more and more GP and fixed counters are introduced in the
future and then directly extends the cnt[] array length to 48 once and
for all. Base on the layout of IA32_PERF_GLOBAL_CTRL and
IA32_PERF_GLOBAL_STATUS, 48 looks enough in near feature.
Reviewed-by: Jim Mattson <[email protected]>
Signed-off-by: Dapeng Mi <[email protected]>
---
x86/pmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/x86/pmu.c b/x86/pmu.c
index 5fd7439a0eba..494af4012e84 100644
--- a/x86/pmu.c
+++ b/x86/pmu.c
@@ -253,7 +253,7 @@ static void check_fixed_counters(void)
static void check_counters_many(void)
{
- pmu_counter_t cnt[10];
+ pmu_counter_t cnt[48];
int i, n;
for (i = 0, n = 0; n < pmu.nr_gp_counters; i++) {
--
2.34.1