TI's J784S4 SoC supports SGMII mode with CPSW9G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the
extra_modes member of the "j784s4_cpswxg_pdata" SoC data.
Reviewed-by: Roger Quadros <[email protected]>
Signed-off-by: Chintan Vankar <[email protected]>
---
This patch is based on net-next tagged v6.9-rc4.
Link to v1:
https://lore.kernel.org/all/[email protected]/
Changes from v1 to v2:
- Removed RFC from subject prefix as suggested by Roger.
- Collected Reviewed-by tag from Roger Quadros.
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
index 2939a21ca74f..766abb571267 100644
--- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
@@ -2904,7 +2904,8 @@ static const struct am65_cpsw_pdata j784s4_cpswxg_pdata = {
.quirks = 0,
.ale_dev_id = "am64-cpswxg",
.fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
- .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_USXGMII),
+ .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
+ BIT(PHY_INTERFACE_MODE_USXGMII),
};
static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
--
2.34.1
Hello:
This patch was applied to netdev/net-next.git (main)
by Jakub Kicinski <[email protected]>:
On Mon, 22 Apr 2024 18:15:15 +0530 you wrote:
> TI's J784S4 SoC supports SGMII mode with CPSW9G instance of the CPSW
> Ethernet Switch. Thus, enable it by adding SGMII mode to the
> extra_modes member of the "j784s4_cpswxg_pdata" SoC data.
>
> Reviewed-by: Roger Quadros <[email protected]>
> Signed-off-by: Chintan Vankar <[email protected]>
>
> [...]
Here is the summary with links:
- [net-next,v2] net: ethernet: ti: am65-cpsw-nuss: Enable SGMII mode for J784S4 CPSW9G
https://git.kernel.org/netdev/net-next/c/5bd8ebe4693c
You are awesome, thank you!
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