This patch series enables the HSI2 (high speed interfaces) for gs101:
- HSI2 feeds PCIe and UFS
The parts added here have been verified to work OK without the
clk_ignore_unused kernel command line option.
Signed-off-by: André Draszik <[email protected]>
---
Changes in v3:
- Drop HSI0-related changes as already applied
- s/ufs_embd/ufs and s/mmc_card/mmc (Tudor, Krzysztof)
- collect tags
- drop my own R-b tag, due to SoB
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- My v1 just contained HSI0, but due due to changing similar areas in the
code, I've also added Peter's HSI2 clock patches from
https://lore.kernel.org/all/[email protected]
to this series so as to preempt any merge conflicts. Namely:
* hsi2 bindings
* hsi2 DT
* hsi2 cmu clock driver
- drop patch 'dt-bindings: clock: google,gs101-clock: add HSI0 clock
management unit' as already applied
- cometic updates to patch 4: 'clk: samsung: gs101: add support for
cmu_hsi0' (macro name, a whitespace, subject line)
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Peter Griffin (3):
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
clk: samsung: gs101: add support for cmu_hsi2
.../bindings/clock/google,gs101-clock.yaml | 26 ++
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 +
drivers/clk/samsung/clk-gs101.c | 507 +++++++++++++++++++++
include/dt-bindings/clock/google,gs101.h | 62 +++
4 files changed, 607 insertions(+)
---
base-commit: b0a2c79c6f3590b74742cbbc76687014d47972d8
change-id: 20240423-hsi0-gs101-aa778361bfaa
Best regards,
--
André Draszik <[email protected]>
From: Peter Griffin <[email protected]>
Enable the cmu_hsi2 clock management unit. It feeds some of
the high speed interfaces such as PCIe and UFS.
Signed-off-by: Peter Griffin <[email protected]>
Reviewed-by: Tudor Ambarus <[email protected]>
Signed-off-by: André Draszik <[email protected]>
---
v3:
* s/ufs_embd/ufs
* s/mmc_card/mmc
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 9755a0bb70a1..a0305555c4fd 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1267,6 +1267,18 @@ pinctrl_hsi1: pinctrl@11840000 {
interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
};
+ cmu_hsi2: clock-controller@14400000 {
+ compatible = "google,gs101-cmu-hsi2";
+ reg = <0x14400000 0x4000>;
+ #clock-cells = <1>;
+ clocks = <&ext_24_5m>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
+ <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
+ clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
+ };
+
pinctrl_hsi2: pinctrl@14440000 {
compatible = "google,gs101-pinctrl";
reg = <0x14440000 0x00001000>;
--
2.44.0.769.g3c40516874-goog
On Mon, 29 Apr 2024 14:02:18 +0100, André Draszik wrote:
> Enable the cmu_hsi2 clock management unit. It feeds some of
> the high speed interfaces such as PCIe and UFS.
>
>
Applied, thanks!
[2/3] arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
https://git.kernel.org/krzk/linux/c/86124c76683e31033180f1d31e7543863ce6d850
Best regards,
--
Krzysztof Kozlowski <[email protected]>