Hi Rafal,
Here is a counter proposal to your patch series:
https://lore.kernel.org/all/[email protected]/
which is a little bit smaller in terms of lines changed. Note that with
either my patches or yours, we still have the following warnings show
up:
arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts:133.15-145.4:
Warning (pci_device_reg): /axi@18000000/pcie@18012000/bridge@0,0,0: PCI
unit address format error, expected "0,0"
arch/arm/boot/dts/broadcom/bcm4709-netgear-r8000.dts:152.15-191.4:
Warning (pci_device_reg): /axi@18000000/pcie@18013000/bridge@1,0,0: PCI
unit address format error, expected "0,0"
Thanks!
Florian Fainelli (1):
ARM: dts: BCM5301X: Relocate PCIe nodes to top-level
Rafał Miłecki (1):
ARM: dts: BCM5301X: Describe PCIe controllers fully
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 97 +++++++++++++++-----------
1 file changed, 58 insertions(+), 39 deletions(-)
--
2.34.1
From: Rafał Miłecki <[email protected]>
This fixes:
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18012000:
'device_type' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18012000:
'ranges' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18013000:
'device_type' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18013000:
'ranges' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18014000:
'device_type' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dtb: pcie@18014000:
'ranges' is a required property
from schema $id: http://devicetree.org/schemas/pci/pci-bus.yaml#
Cc: Arınç ÜNAL <[email protected]>
Signed-off-by: Rafał Miłecki <[email protected]>
[florian: Make it apply to the relocated PCIe node(s)]
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 24 +++++++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
index 8f69da8d18c2..b6fc4e4bba8d 100644
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -474,22 +474,40 @@ usb3_dmp: syscon@18105000 {
};
pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>;
-
+ ranges = <0x82000000 0 0x08000000 0x08000000 0 0x08000000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ #interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
};
pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;
-
+ ranges = <0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ #interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
};
pcie2: pcie@18014000 {
+ compatible = "brcm,iproc-pcie";
reg = <0x18014000 0x1000>;
-
+ ranges = <0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x00 0xff>;
+ device_type = "pci";
+ #interrupt-cells = <1>;
#address-cells = <3>;
#size-cells = <2>;
};
--
2.34.1
In order to have the PCIe node(s) gain a "ranges" property which is
meaningful, move them out of the axi@18000000 bus node towards the
top-level.
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 79 +++++++++++++-------------
1 file changed, 40 insertions(+), 39 deletions(-)
diff --git a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
index d0d5f7e52a91..8f69da8d18c2 100644
--- a/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm-ns.dtsi
@@ -121,28 +121,28 @@ axi@18000000 {
<0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 0 */
- <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
- <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 1 */
- <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
/* PCIe Controller 2 */
- <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
- <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <0x18014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
/* USB 2.0 Controller */
<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
@@ -181,27 +181,6 @@ chipcommon: chipcommon@0 {
#interrupt-cells = <2>;
};
- pcie0: pcie@12000 {
- reg = <0x00012000 0x1000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- };
-
- pcie1: pcie@13000 {
- reg = <0x00013000 0x1000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- };
-
- pcie2: pcie@14000 {
- reg = <0x00014000 0x1000>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- };
-
usb2: usb2@21000 {
reg = <0x00021000 0x1000>;
@@ -494,6 +473,28 @@ usb3_dmp: syscon@18105000 {
reg = <0x18105000 0x1000>;
};
+ pcie0: pcie@18012000 {
+ reg = <0x18012000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ };
+
+ pcie1: pcie@18013000 {
+ reg = <0x18013000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ };
+
+ pcie2: pcie@18014000 {
+ reg = <0x18014000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ };
+
+
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
--
2.34.1