To address the performance drop issue, an optimization has been
implemented. The incorrect highest performance value previously set by the
low-level power firmware for AMD CPUs with Family ID 0x19 and Model ID
ranging from 0x70 to 0x7F series has been identified as the cause.
To resolve this, a check has been implemented to accurately determine the
CPU family and model ID. The correct highest performance value is now set
and the performance drop caused by the incorrect highest performance value
are eliminated.
Before the fix, the highest frequency was set to 4200MHz, now it is set
to 4971MHz which is correct.
CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ
0 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
1 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
2 0 0 1 1:1:1:0 yes 4971.0000 400.0000 4865.8140
3 0 0 1 1:1:1:0 yes 4971.0000 400.0000 400.0000
v1->v2:
* add test by flag from Gaha Bana
Fixes: f3a052391822 ("cpufreq: amd-pstate: Enable amd-pstate preferred core support")
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218759
Signed-off-by: Perry Yuan <[email protected]>
Co-developed-by: Mario Limonciello <[email protected]>
Signed-off-by: Mario Limonciello <[email protected]>
Tested-by: Gaha Bana <[email protected]>
---
drivers/cpufreq/amd-pstate.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 2db095867d03..6a342b0c0140 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -50,7 +50,8 @@
#define AMD_PSTATE_TRANSITION_LATENCY 20000
#define AMD_PSTATE_TRANSITION_DELAY 1000
-#define AMD_PSTATE_PREFCORE_THRESHOLD 166
+#define CPPC_HIGHEST_PERF_PERFORMANCE 196
+#define CPPC_HIGHEST_PERF_DEFAULT 166
/*
* TODO: We need more time to fine tune processors with shared memory solution
@@ -326,6 +327,21 @@ static inline int amd_pstate_enable(bool enable)
return static_call(amd_pstate_enable)(enable);
}
+static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata)
+{
+ struct cpuinfo_x86 *c = &cpu_data(0);
+
+ /*
+ * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,
+ * the highest performance level is set to 196.
+ * https://bugzilla.kernel.org/show_bug.cgi?id=218759
+ */
+ if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <= 0x7f))
+ return CPPC_HIGHEST_PERF_PERFORMANCE;
+
+ return CPPC_HIGHEST_PERF_DEFAULT;
+}
+
static int pstate_init_perf(struct amd_cpudata *cpudata)
{
u64 cap1;
@@ -342,7 +358,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
* the default max perf.
*/
if (cpudata->hw_prefcore)
- highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
+ highest_perf = amd_pstate_highest_perf_set(cpudata);
else
highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
@@ -366,7 +382,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
return ret;
if (cpudata->hw_prefcore)
- highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
+ highest_perf = amd_pstate_highest_perf_set(cpudata);
else
highest_perf = cppc_perf.highest_perf;
--
2.34.1
On Wed, May 8, 2024 at 7:47 AM Perry Yuan <[email protected]> wrote:
>
> To address the performance drop issue, an optimization has been
> implemented. The incorrect highest performance value previously set by the
> low-level power firmware for AMD CPUs with Family ID 0x19 and Model ID
> ranging from 0x70 to 0x7F series has been identified as the cause.
>
> To resolve this, a check has been implemented to accurately determine the
> CPU family and model ID. The correct highest performance value is now set
> and the performance drop caused by the incorrect highest performance value
> are eliminated.
>
> Before the fix, the highest frequency was set to 4200MHz, now it is set
> to 4971MHz which is correct.
>
> CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ MHZ
> 0 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
> 1 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
> 2 0 0 1 1:1:1:0 yes 4971.0000 400.0000 4865.8140
> 3 0 0 1 1:1:1:0 yes 4971.0000 400.0000 400.0000
>
> v1->v2:
> * add test by flag from Gaha Bana
This should go into the section below the tags.
And if you send a v2 of a patch, please indicate that this is a v2 in
the subject.
> Fixes: f3a052391822 ("cpufreq: amd-pstate: Enable amd-pstate preferred core support")
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218759
> Signed-off-by: Perry Yuan <[email protected]>
> Co-developed-by: Mario Limonciello <[email protected]>
> Signed-off-by: Mario Limonciello <[email protected]>
> Tested-by: Gaha Bana <[email protected]>
> ---
> drivers/cpufreq/amd-pstate.c | 22 +++++++++++++++++++---
> 1 file changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 2db095867d03..6a342b0c0140 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -50,7 +50,8 @@
>
> #define AMD_PSTATE_TRANSITION_LATENCY 20000
> #define AMD_PSTATE_TRANSITION_DELAY 1000
> -#define AMD_PSTATE_PREFCORE_THRESHOLD 166
> +#define CPPC_HIGHEST_PERF_PERFORMANCE 196
> +#define CPPC_HIGHEST_PERF_DEFAULT 166
>
> /*
> * TODO: We need more time to fine tune processors with shared memory solution
> @@ -326,6 +327,21 @@ static inline int amd_pstate_enable(bool enable)
> return static_call(amd_pstate_enable)(enable);
> }
>
> +static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata)
> +{
> + struct cpuinfo_x86 *c = &cpu_data(0);
> +
> + /*
> + * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,
> + * the highest performance level is set to 196.
> + * https://bugzilla.kernel.org/show_bug.cgi?id=218759
> + */
> + if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <= 0x7f))
> + return CPPC_HIGHEST_PERF_PERFORMANCE;
> +
> + return CPPC_HIGHEST_PERF_DEFAULT;
> +}
> +
> static int pstate_init_perf(struct amd_cpudata *cpudata)
> {
> u64 cap1;
> @@ -342,7 +358,7 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
> * the default max perf.
> */
> if (cpudata->hw_prefcore)
> - highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> + highest_perf = amd_pstate_highest_perf_set(cpudata);
> else
> highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
>
> @@ -366,7 +382,7 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
> return ret;
>
> if (cpudata->hw_prefcore)
> - highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> + highest_perf = amd_pstate_highest_perf_set(cpudata);
> else
> highest_perf = cppc_perf.highest_perf;
>
> --
Applied as 6.10 material, thanks!
[AMD Official Use Only - General]
Hi Rafael
> -----Original Message-----
> From: Rafael J. Wysocki <[email protected]>
> Sent: Wednesday, May 8, 2024 7:59 PM
> To: Yuan, Perry <[email protected]>
> Cc: [email protected]; Limonciello, Mario
> <[email protected]>; [email protected]; Huang, Ray
> <[email protected]>; Shenoy, Gautham Ranjal
> <[email protected]>; Petkov, Borislav
> <[email protected]>; Deucher, Alexander
> <[email protected]>; Huang, Shimmer
> <[email protected]>; Du, Xiaojian <[email protected]>; Meng,
> Li (Jassmine) <[email protected]>; [email protected]; linux-
> [email protected]
> Subject: Re: [PATCH] cpufreq: amd-pstate: fix the highest frequency issue
> which limit performance
>
> On Wed, May 8, 2024 at 7:47 AM Perry Yuan <[email protected]> wrote:
> >
> > To address the performance drop issue, an optimization has been
> > implemented. The incorrect highest performance value previously set by
> > the low-level power firmware for AMD CPUs with Family ID 0x19 and
> > Model ID ranging from 0x70 to 0x7F series has been identified as the cause.
> >
> > To resolve this, a check has been implemented to accurately determine
> > the CPU family and model ID. The correct highest performance value is
> > now set and the performance drop caused by the incorrect highest
> > performance value are eliminated.
> >
> > Before the fix, the highest frequency was set to 4200MHz, now it is
> > set to 4971MHz which is correct.
> >
> > CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ
> MHZ
> > 0 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
> > 1 0 0 0 0:0:0:0 yes 4971.0000 400.0000 400.0000
> > 2 0 0 1 1:1:1:0 yes 4971.0000 400.0000 4865.8140
> > 3 0 0 1 1:1:1:0 yes 4971.0000 400.0000 400.0000
> >
> > v1->v2:
> > * add test by flag from Gaha Bana
>
> This should go into the section below the tags.
>
> And if you send a v2 of a patch, please indicate that this is a v2 in the subject.
>
> > Fixes: f3a052391822 ("cpufreq: amd-pstate: Enable amd-pstate preferred
> > core support")
> > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218759
> > Signed-off-by: Perry Yuan <[email protected]>
> > Co-developed-by: Mario Limonciello <[email protected]>
> > Signed-off-by: Mario Limonciello <[email protected]>
> > Tested-by: Gaha Bana <[email protected]>
> > ---
> > drivers/cpufreq/amd-pstate.c | 22 +++++++++++++++++++---
> > 1 file changed, 19 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/cpufreq/amd-pstate.c
> > b/drivers/cpufreq/amd-pstate.c index 2db095867d03..6a342b0c0140
> 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -50,7 +50,8 @@
> >
> > #define AMD_PSTATE_TRANSITION_LATENCY 20000
> > #define AMD_PSTATE_TRANSITION_DELAY 1000
> > -#define AMD_PSTATE_PREFCORE_THRESHOLD 166
> > +#define CPPC_HIGHEST_PERF_PERFORMANCE 196
> > +#define CPPC_HIGHEST_PERF_DEFAULT 166
> >
> > /*
> > * TODO: We need more time to fine tune processors with shared memory
> > solution @@ -326,6 +327,21 @@ static inline int amd_pstate_enable(bool
> enable)
> > return static_call(amd_pstate_enable)(enable);
> > }
> >
> > +static u32 amd_pstate_highest_perf_set(struct amd_cpudata *cpudata) {
> > + struct cpuinfo_x86 *c = &cpu_data(0);
> > +
> > + /*
> > + * For AMD CPUs with Family ID 19H and Model ID range 0x70 to 0x7f,
> > + * the highest performance level is set to 196.
> > + * https://bugzilla.kernel.org/show_bug.cgi?id=218759
> > + */
> > + if (c->x86 == 0x19 && (c->x86_model >= 0x70 && c->x86_model <=
> 0x7f))
> > + return CPPC_HIGHEST_PERF_PERFORMANCE;
> > +
> > + return CPPC_HIGHEST_PERF_DEFAULT; }
> > +
> > static int pstate_init_perf(struct amd_cpudata *cpudata) {
> > u64 cap1;
> > @@ -342,7 +358,7 @@ static int pstate_init_perf(struct amd_cpudata
> *cpudata)
> > * the default max perf.
> > */
> > if (cpudata->hw_prefcore)
> > - highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> > + highest_perf = amd_pstate_highest_perf_set(cpudata);
> > else
> > highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
> >
> > @@ -366,7 +382,7 @@ static int cppc_init_perf(struct amd_cpudata
> *cpudata)
> > return ret;
> >
> > if (cpudata->hw_prefcore)
> > - highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> > + highest_perf = amd_pstate_highest_perf_set(cpudata);
> > else
> > highest_perf = cppc_perf.highest_perf;
> >
> > --
>
> Applied as 6.10 material, thanks!
Thank you, I forget to update the patch version.
Regards.
Perry