This is an updated version of something I wrote about 7 years ago.
Minimum support for R2D-plus and LANDISK.
I think R2D-1 will work if you add AX88796 to dts.
And board-specific functions and SCI's SPI functions are not supported.
You can get it working with qemu found here.
https://gitlab.com/yoshinori.sato/qemu/-/tree/landisk
v8 changes.
- rebase v6.10-rc1
- sh/Konfig: Keep compatibility for non-DT.
- renesas,sh7750-cpg.yaml: cleanup.
- smi,sm501.yaml: rewrite register definition.
- sm501.c: remove unneeded changes.
- renesas,sh7751-irl-ext.yaml: fix intetrupt-cells.
- renesas,sh7751-pci.yaml: remove duplicate.
- clk-divider.c: cleanup.
- clk-gate.c: cleanup.
- sh_tmu.c: cleanup.
- pci-sh7751.c: cleanup.
v7 changes.
- sh/kernel/setup.c: fix kernel parameter handling.
- clk-sh7750.c: cleanup.
- sh_tmu.c: cleanup.
- irq-renesas-sh7751.c: IPR definition move to code.
- irq-renesas-sh7751irl.c: update register definition.
- pci-sh7751.c: Register initialization fix.
- sm501 and sm501fb: Re-design Device Tree properties.
v6 changes.
- pci-sh7751: merge register define.
- pci-sh7751: use 'dma-ranges' property.
- pci-sh7751: rename general PCI properties.
- sm501 and sm501fb: Re-design Device Tree properties.
- sh/kernel/setup: cleanup command line setup.
- irq-sh7751.c: some cleanup.
v5 changes.
- pci-sh7751: revert header changes. and some fix in previuous driver.
- sh/kernel/iomap.c: Use SH io functions.
- sm501 and sm501fb: re-write DT support.
v4 changes.
- cpg-sh7750: use clk-divider and clk-gate.
- pci-sh7751: unified header files to old PCI driver.
- irq-renesas-sh7751: IPR registers direct mapping.
- irq-renesas-sh7751irl: useful register bit mapping.
- sm501 and sm501fb: re-write dt parser.
- j2_minus: fix build error.
- dt-binding schema: fix some errors.
- *.dts: cleanup.
v3 changes.
- Rewrite clk drivers.
- Added sh_tmu to OF support.
- Cleanup PCI stuff.
- Update sm501 and sm501fb OF support.
- Update devicetree and documents.
v2 changes.
- Rebasing v6,6-rc1
- re-write irqchip driver.
- Add binding documents.
- Cleanup review comment.
Yoshinori Sato (36):
sh: passing FDT address to kernel startup.
sh: Kconfig unified OF supported targets.
sh: Enable OF support for build and configuration.
dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y
sh: kernel/setup Update DT support.
sh: Fix COMMON_CLK support in CONFIG_OF=y.
clocksource: sh_tmu: CLOCKSOURCE support.
dt-binding: Add compatible SH7750 SoC
sh: Common PCI Framework driver support.
pci: pci-sh7751: Add SH7751 PCI driver
dt-bindings: pci: pci-sh7751: Add SH7751 PCI
dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.
clk: Compatible with narrow registers
clk: renesas: Add SH7750/7751 CPG Driver
irqchip: Add SH7751 INTC driver
dt-bindings: interrupt-controller: renesas,sh7751-intc: Add
json-schema
irqchip: SH7751 external interrupt encoder with enable gate.
dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add
json-schema
serial: sh-sci: fix SH4 OF support.
dt-bindings: serial: renesas,scif: Add scif-sh7751.
dt-bindings: display: smi,sm501: SMI SM501 binding json-schema
mfd: sm501: Convert platform_data to OF property
dt-binding: sh: cpus: Add SH CPUs json-schema
dt-bindings: vendor-prefixes: Add iodata
dt-bindings: ata: ata-generic: Add new targets
dt-bindings: soc: renesas: sh: Add SH7751 based target
sh: SH7751R SoC Internal peripheral definition dtsi.
sh: add RTS7751R2D Plus DTS
sh: Add IO DATA LANDISK dts
sh: Add IO DATA USL-5P dts
sh: j2_mimas_v2.dts update
sh: Add dtbs target support.
sh: RTS7751R2D Plus OF defconfig
sh: LANDISK OF defconfig
sh: j2_defconfig: update
.../devicetree/bindings/ata/ata-generic.yaml | 2 +
.../bindings/clock/renesas,sh7750-cpg.yaml | 107 ++++
.../bindings/display/smi,sm501.yaml | 443 ++++++++++++++++
.../renesas,sh7751-intc.yaml | 53 ++
.../renesas,sh7751-irl-ext.yaml | 57 +++
.../bindings/pci/renesas,sh7751-pci.yaml | 75 +++
.../bindings/serial/renesas,scif.yaml | 1 +
.../devicetree/bindings/sh/cpus.yaml | 63 +++
.../devicetree/bindings/soc/renesas/sh.yaml | 27 +
.../bindings/timer/renesas,tmu.yaml | 2 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/sh/Kconfig | 11 +-
arch/sh/boards/Kconfig | 23 +-
arch/sh/boards/of-generic.c | 28 +-
arch/sh/boot/compressed/head_32.S | 5 +-
arch/sh/boot/dts/Makefile | 5 +
arch/sh/boot/dts/j2_mimas_v2.dts | 2 +-
arch/sh/boot/dts/landisk.dts | 77 +++
arch/sh/boot/dts/rts7751r2dplus.dts | 172 +++++++
arch/sh/boot/dts/sh7751r.dtsi | 105 ++++
arch/sh/boot/dts/usl-5p.dts | 85 ++++
arch/sh/configs/j2_defconfig | 11 +-
arch/sh/configs/landisk-of_defconfig | 102 ++++
arch/sh/configs/rts7751r2dplus-of_defconfig | 77 +++
arch/sh/drivers/Makefile | 2 +
arch/sh/include/asm/io.h | 8 +
arch/sh/include/asm/irq.h | 10 +-
arch/sh/include/asm/pci.h | 4 +
arch/sh/kernel/cpu/Makefile | 6 +-
arch/sh/kernel/cpu/irq/imask.c | 17 +
arch/sh/kernel/cpu/sh4/Makefile | 3 +
arch/sh/kernel/iomap.c | 18 +
arch/sh/kernel/setup.c | 31 +-
arch/sh/kernel/time.c | 12 +
drivers/clk/clk-divider.c | 41 +-
drivers/clk/clk-gate.c | 49 +-
drivers/clk/renesas/Kconfig | 13 +-
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/clk-sh7750.c | 480 ++++++++++++++++++
drivers/clocksource/sh_tmu.c | 198 +++++---
drivers/irqchip/Kconfig | 15 +
drivers/irqchip/Makefile | 3 +
drivers/irqchip/irq-renesas-sh7751.c | 282 ++++++++++
drivers/irqchip/irq-renesas-sh7751irl.c | 221 ++++++++
drivers/mfd/sm501.c | 238 +++++++++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pci-sh7751.c | 335 ++++++++++++
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/sh-sci.c | 6 +-
drivers/video/fbdev/sm501fb.c | 87 ++++
include/dt-bindings/clock/sh7750-cpg.h | 26 +
.../renesas,sh7751-intc.h | 19 +
include/linux/clk-provider.h | 20 +-
include/linux/sh_intc.h | 7 +-
55 files changed, 3539 insertions(+), 160 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml
create mode 100644 Documentation/devicetree/bindings/display/smi,sm501.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml
create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml
create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml
create mode 100644 Documentation/devicetree/bindings/soc/renesas/sh.yaml
create mode 100644 arch/sh/boot/dts/landisk.dts
create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts
create mode 100644 arch/sh/boot/dts/sh7751r.dtsi
create mode 100644 arch/sh/boot/dts/usl-5p.dts
create mode 100644 arch/sh/configs/landisk-of_defconfig
create mode 100644 arch/sh/configs/rts7751r2dplus-of_defconfig
create mode 100644 drivers/clk/renesas/clk-sh7750.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751irl.c
create mode 100644 drivers/pci/controller/pci-sh7751.c
create mode 100644 include/dt-bindings/clock/sh7750-cpg.h
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
--
2.39.2
Targets that support OF should be treated as one board.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/Kconfig | 1 +
arch/sh/boards/Kconfig | 23 +++++++++++++----------
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5e6a3ead51fb..d6704c57f9dc 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -711,6 +711,7 @@ config ROMIMAGE_MMCIF
choice
prompt "Kernel command line"
default CMDLINE_OVERWRITE
+ depends on !OF || USE_BUILTIN_DTB
help
Setting this option allows the kernel command line arguments
to be set.
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 109bec4dad94..46387fd040ad 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -19,16 +19,9 @@ config SH_DEVICE_TREE
select TIMER_OF
select COMMON_CLK
select GENERIC_CALIBRATE_DELAY
-
-config SH_JCORE_SOC
- bool "J-Core SoC"
- select SH_DEVICE_TREE
- select CLKSRC_JCORE_PIT
- select JCORE_AIC
- depends on CPU_J2
- help
- Select this option to include drivers core components of the
- J-Core SoC, including interrupt controllers and timers.
+ select GENERIC_IRQ_CHIP
+ select SYS_SUPPORTS_PCI
+ select GENERIC_PCI_IOMAP if PCI
config SH_SOLUTION_ENGINE
bool "SolutionEngine"
@@ -293,6 +286,7 @@ config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
select HAVE_PCI
+ select SYS_SUPPORTS_PCI
help
I-O DATA DEVICE, INC. "LANDISK Series" support.
@@ -369,6 +363,15 @@ config SH_APSH4AD0A
help
Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
+config SH_OF_BOARD
+ bool "General Open Firmware boards"
+ select SH_DEVICE_TREE
+ select CLKSRC_JCORE_PIT if CPU_J2
+ select JCORE_AIC if CPU_J2
+ select HAVE_PCI if CPU_SUBTYPE_SH7751R
+ help
+ This board means general OF supported targets.
+
source "arch/sh/boards/mach-r2d/Kconfig"
source "arch/sh/boards/mach-highlander/Kconfig"
source "arch/sh/boards/mach-sdk7780/Kconfig"
--
2.39.2
Renesas RTS7751R2D Plus devicetree.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boot/dts/rts7751r2dplus.dts | 172 ++++++++++++++++++++++++++++
1 file changed, 172 insertions(+)
create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts
diff --git a/arch/sh/boot/dts/rts7751r2dplus.dts b/arch/sh/boot/dts/rts7751r2dplus.dts
new file mode 100644
index 000000000000..a67bd50cc80a
--- /dev/null
+++ b/arch/sh/boot/dts/rts7751r2dplus.dts
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Renesas RTS7751R2D Plus
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "sh7751r.dtsi"
+
+/ {
+ model = "Renesas RTS7715R2D Plus";
+ compatible = "renesas,rts7751r2d", "renesas,sh7751r";
+
+ aliases {
+ serial0 = &scif1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ r2dintc: interrupt-controller@a4000000 {
+ compatible = "renesas,sh7751-irl-ext";
+ reg = <0xa4000000 0x02>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ /*
+ * b15: 12 - TP
+ * b14: 9 - PCI INTA
+ * b13: 10 - PCI INTB
+ * b12: 3 - PCI INTC
+ * b11: 0 - PCI INTD
+ * b10: 4 - SM501
+ * b9: 1 - CF IDE
+ * b8: 2 - CF CD
+ * b7: 8 - SDCARD
+ * b6: 5 - KEY
+ * b5: 6 - RTC ALARM
+ * b4: 7 - RTC T
+ * b3: unassigned
+ * b2: unassigned
+ * b1: unassigned
+ * b0: 11 -EXT
+ */
+ renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>;
+ };
+
+ sm501: display@10000000 {
+ compatible = "smi,sm501";
+ reg = <0x10000000 0x03e00000
+ 0x13e00000 0x00200000>;
+ interrupt-parent = <&r2dintc>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ mode = "640x480-16@60";
+ smi,little-endian;
+ smi,devices = "usb-host", "uart0";
+ smi,swap-fb-endian;
+ #gpio-cells = <2>;
+ edid = [00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00
+ 00 00 01 04 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 f0 0a 80 fb 20 e0 25 10 32 60
+ 02 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 bd];
+
+ smi,misc-timing-ex = "16";
+ smi,misc-timing-xc = "internal-pll";
+ smi,misc-timing-usb-current = "disable";
+ smi,misc-control-pad = "24";
+ smi,misc-control-usbclk = "xtal";
+ smi,misc-control-sh = "active-low";
+
+ gpio {
+ pin-0 = "ioport";
+ pin-1 = "function";
+ };
+
+ crt {
+ smi,flags = "use-init-done",
+ "disable-at-exit",
+ "use-hwcursor",
+ "use-hwaccel";
+ };
+
+ panel {
+ bpp = <16>;
+ smi,flags = "use-init-done",
+ "disable-at-exit",
+ "use-hwcursor",
+ "use-hwaccel";
+ };
+ };
+
+ compact-flash@b4001000 {
+ compatible = "renesas,rts7751r2d-ata", "ata-generic";
+ reg = <0xb4001000 0x0e>, <0xb400080c 2>;
+ reg-shift = <1>;
+ interrupt-parent = <&r2dintc>;
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ flash@0 {
+ compatible = "cfi-flash";
+ reg = <0x00000000 0x02000000>;
+ device-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "U-Boot";
+ reg = <0x00000000 0x00040000>;
+ };
+
+ partition@1 {
+ label = "Environemt";
+ reg = <0x00040000 0x00040000>;
+ };
+
+ partition@2 {
+ label = "Kernel";
+ reg = <0x00080000 0x001c0000>;
+ };
+
+ partition@3 {
+ label = "Flash_FS";
+ reg = <0x00240000 0x00dc0000>;
+ };
+ };
+};
+
+&extal {
+ clock-frequency = <22222222>;
+};
+
+&cpg {
+ renesas,mode = <5>;
+};
+
+&scif1 {
+ status = "okay";
+};
+
+&pcic {
+ ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>,
+ <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>;
+ dma-ranges = <0x03000000 0 0xab000000 0xab000000 0 0x00000004>,
+ <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>,
+ <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>;
+ interrupt-map = <0x0000 0 0 1 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 2 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 3 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 4 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 1 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 2 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 3 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 4 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 1 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 2 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 3 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 4 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-map-mask = <0x1800 0 0 7>;
+ status = "okay";
+};
--
2.39.2
IO DATA DEVICE Inc. LANDISK HDL-U devicetree.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boot/dts/landisk.dts | 77 ++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)
create mode 100644 arch/sh/boot/dts/landisk.dts
diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
new file mode 100644
index 000000000000..1ac1f532947b
--- /dev/null
+++ b/arch/sh/boot/dts/landisk.dts
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the IO DATA DEVICE LANDISK
+ */
+
+/dts-v1/;
+
+#include "sh7751r.dtsi"
+
+/ {
+ model = "IO DATA Device LANDISK";
+ compatible = "iodata,landisk", "renesas,sh7751r";
+
+ aliases {
+ serial0 = &scif1;
+ };
+
+ chosen {
+ stdout-path = "serial0:9600n8";
+ };
+
+ memory@c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ julianintc: interrupt-controller@b0000005 {
+ compatible = "renesas,sh7751-irl-ext";
+ reg = <0xb0000005 0x01>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ /*
+ * b7: Not assigned
+ * b6: Power switch
+ * b5: Not assigned
+ * b4: Not assigned
+ * b3: PCI-INTD
+ * b2: PCI-INTC
+ * b1: PCI-INTB
+ * b0: PCI-INTA
+ */
+ renesas,enable-reg = <15 11 15 15 8 7 6 5>;
+ };
+};
+
+&extal {
+ clock-frequency = <22222222>;
+};
+
+&cpg {
+ renesas,mode = <5>;
+};
+
+&scif1 {
+ status = "okay";
+};
+
+&pcic {
+ ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>,
+ <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>;
+ dma-ranges = <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>,
+ <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>;
+ interrupt-map = <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 2 &julianintc 6 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 3 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 4 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 1 &julianintc 6 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 2 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 3 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 4 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 1 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 2 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 3 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 4 &julianintc 6 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-map-mask = <0x1800 0 0 7>;
+ status = "okay";
+};
--
2.39.2
IO DATA DEVICE Inc. USL-5P devicetree.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boot/dts/usl-5p.dts | 85 +++++++++++++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
create mode 100644 arch/sh/boot/dts/usl-5p.dts
diff --git a/arch/sh/boot/dts/usl-5p.dts b/arch/sh/boot/dts/usl-5p.dts
new file mode 100644
index 000000000000..bfbcb9e466bc
--- /dev/null
+++ b/arch/sh/boot/dts/usl-5p.dts
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the IO DATA DEVICE USL-5P
+ */
+
+/dts-v1/;
+
+#include "sh7751r.dtsi"
+
+/ {
+ model = "IO-DATA Device USL-5P";
+ compatible = "iodata,usl-5p", "renesas,sh7751r";
+
+ aliases {
+ serial0 = &scif1;
+ };
+
+ chosen {
+ stdout-path = "serial0:9600n8";
+ };
+
+ memory@c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ julianintc: interrupt-controller@b0000005 {
+ compatible = "renesas,sh7751-irl-ext";
+ reg = <0xb0000005 0x01>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ /*
+ * b7: Button
+ * b6: Power switch
+ * b5: Compact Flash
+ * b4: ATA
+ * b3: PCI-INTD
+ * b2: PCI-INTC
+ * b1: PCI-INTB
+ * b0: PCI-INTA
+ */
+ renesas,enable-reg = <12 11 10 9 8 7 6 5>;
+ };
+
+ compact-flash@b4000040 {
+ compatible = "iodata,usl-5p-ata", "ata-generic";
+ reg = <0xb4000040 0x0e>, <0xb400002c 2>;
+ reg-shift = <1>;
+ interrupt-parent = <&julianintc>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&extal {
+ clock-frequency = <22222222>;
+};
+
+&cpg {
+ renesas,mode = <5>;
+};
+
+&scif1 {
+ status = "okay";
+};
+
+&pcic {
+ ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>,
+ <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>;
+ dma-ranges = <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>,
+ <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>;
+ interrupt-map = <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 2 &julianintc 6 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 3 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x0000 0 0 4 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 1 &julianintc 6 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 2 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 3 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x0800 0 0 4 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 1 &julianintc 7 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 2 &julianintc 8 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 3 &julianintc 5 IRQ_TYPE_LEVEL_LOW>,
+ <0x1000 0 0 4 &julianintc 6 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-map-mask = <0x1800 0 0 7>;
+ status = "okay";
+};
--
2.39.2
Renesas SH7751 Internal interrupt controller driver.
Signed-off-by: Yoshinori Sato <[email protected]>
---
drivers/irqchip/Kconfig | 8 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-renesas-sh7751.c | 282 +++++++++++++++++++++++++++
3 files changed, 291 insertions(+)
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 14464716bacb..f45a229963d4 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -715,4 +715,12 @@ config SUNPLUS_SP7021_INTC
chained controller, routing all interrupt source in P-Chip to
the primary controller on C-Chip.
+config RENESAS_SH7751_INTC
+ bool "Renesas SH7751 Interrupt Controller"
+ depends on SH_DEVICE_TREE || COMPILE_TEST
+ select IRQ_DOMAIN_HIERARCHY
+ help
+ Support for the Renesas SH7751 On-chip interrupt controller.
+ And external interrupt encoder for some targets.
+
endmenu
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index d9dc3d99aaa8..7bde45f05a1e 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -124,3 +124,4 @@ obj-$(CONFIG_IRQ_IDT3243X) += irq-idt3243x.o
obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o
obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o
obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o
+obj-$(CONFIG_RENESAS_SH7751_INTC) += irq-renesas-sh7751.o
diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-renesas-sh7751.c
new file mode 100644
index 000000000000..91d6dc3ed04c
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-sh7751.c
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas SH7751 interrupt controller driver
+ *
+ * Copyright 2023 Yoshinori Sato <[email protected]>
+ */
+
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of.h>
+#include <linux/io.h>
+#include <dt-bindings/interrupt-controller/renesas,sh7751-intc.h>
+
+struct ipr {
+ u16 off;
+ u16 idx;
+};
+
+struct sh7751_intc_priv {
+ const struct ipr *iprmap;
+ void __iomem *base;
+ void __iomem *intpri00;
+ bool irlm;
+};
+
+enum {
+ R_ICR = 0x00,
+ R_IPR = 0x04,
+ R_INTPRI00 = 0x00,
+ R_INTREQ00 = 0x20,
+ R_INTMSK00 = 0x40,
+ R_INTMSKCLR00 = 0x60,
+};
+
+#define ICR_IRLM BIT(7)
+
+/*
+ * SH7751 IRQ mapping
+ * IRQ16 - 63: Group0 - IPRA to IPRD
+ * IRQ16 - 31: external IRL input (ICR.IRLM is 0)
+ * IRQ80 - 92: Group1 - INTPRI00
+ */
+#define IRQ_START 16
+#define MAX_IRL (IRQ_START + NR_IRL)
+#define GRP0_IRQ_END 63
+#define GRP1_IRQ_START 80
+#define IRQ_END 92
+
+#define NR_IPRMAP0 (GRP0_IRQ_END - IRQ_START + 1)
+#define NR_IPRMAP1 (IRQ_END - GRP1_IRQ_START)
+#define IPR_PRI_MASK 0x000f
+
+#define IPRA 0
+#define IPRB 4
+#define IPRC 8
+#define IPRD 12
+#define INTPRI00 256
+#define IPR_B12 12
+#define IPR_B8 8
+#define IPR_B4 4
+#define IPR_B0 0
+
+/* SH7751 EVT to IPR mapping table */
+static const struct ipr sh7751_iprmap[] = {
+ [evt2irq(0x240)] = {IPRD, IPR_B12}, /* IRL0 (ICR.IRLM=1) */
+ [evt2irq(0x2a0)] = {IPRD, IPR_B8}, /* IRL1 (ICR.IRLM=1) */
+ [evt2irq(0x300)] = {IPRD, IPR_B4}, /* IRL2 (ICR.IRLM=1) */
+ [evt2irq(0x360)] = {IPRD, IPR_B0}, /* IRL3 (ICR.IRLM=1) */
+ [evt2irq(0x400)] = {IPRA, IPR_B12}, /* TMU0 */
+ [evt2irq(0x420)] = {IPRA, IPR_B8}, /* TMU1 */
+ [evt2irq(0x440)] = {IPRA, IPR_B4}, /* TMU2 TNUI */
+ [evt2irq(0x460)] = {IPRA, IPR_B4}, /* TMU2 TICPI */
+ [evt2irq(0x480)] = {IPRA, IPR_B0}, /* RTC ATI */
+ [evt2irq(0x4a0)] = {IPRA, IPR_B0}, /* RTC PRI */
+ [evt2irq(0x4c0)] = {IPRA, IPR_B0}, /* RTC CUI */
+ [evt2irq(0x4e0)] = {IPRB, IPR_B4}, /* SCI ERI */
+ [evt2irq(0x500)] = {IPRB, IPR_B4}, /* SCI RXI */
+ [evt2irq(0x520)] = {IPRB, IPR_B4}, /* SCI TXI */
+ [evt2irq(0x540)] = {IPRB, IPR_B4}, /* SCI TEI */
+ [evt2irq(0x560)] = {IPRB, IPR_B12}, /* WDT */
+ [evt2irq(0x580)] = {IPRB, IPR_B8}, /* REF RCMI */
+ [evt2irq(0x5a0)] = {IPRB, IPR_B4}, /* REF ROVI */
+ [evt2irq(0x600)] = {IPRC, IPR_B0}, /* H-UDI */
+ [evt2irq(0x620)] = {IPRC, IPR_B12}, /* GPIO */
+ [evt2irq(0x640)] = {IPRC, IPR_B8}, /* DMAC DMTE0 */
+ [evt2irq(0x660)] = {IPRC, IPR_B8}, /* DMAC DMTE1 */
+ [evt2irq(0x680)] = {IPRC, IPR_B8}, /* DMAC DMTE2 */
+ [evt2irq(0x6a0)] = {IPRC, IPR_B8}, /* DMAC DMTE3 */
+ [evt2irq(0x6c0)] = {IPRC, IPR_B8}, /* DMAC DMAE */
+ [evt2irq(0x700)] = {IPRC, IPR_B4}, /* SCIF ERI */
+ [evt2irq(0x720)] = {IPRC, IPR_B4}, /* SCIF RXI */
+ [evt2irq(0x740)] = {IPRC, IPR_B4}, /* SCIF BRI */
+ [evt2irq(0x760)] = {IPRC, IPR_B4}, /* SCIF TXI */
+ [evt2irq(0x780)] = {IPRC, IPR_B8}, /* DMAC DMTE4 */
+ [evt2irq(0x7a0)] = {IPRC, IPR_B8}, /* DMAC DMTE5 */
+ [evt2irq(0x7c0)] = {IPRC, IPR_B8}, /* DMAC DMTE6 */
+ [evt2irq(0x7e0)] = {IPRC, IPR_B8}, /* DMAC DMTE7 */
+ [evt2irq(0xa00)] = {INTPRI00, IPR_B0}, /* PCIC PCISERR */
+ [evt2irq(0xa20)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA3 */
+ [evt2irq(0xa40)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA2 */
+ [evt2irq(0xa60)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA1 */
+ [evt2irq(0xa80)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA0 */
+ [evt2irq(0xaa0)] = {INTPRI00, IPR_B4}, /* PCIC PCIPWON */
+ [evt2irq(0xac0)] = {INTPRI00, IPR_B4}, /* PCIC PCIPWDWN */
+ [evt2irq(0xae0)] = {INTPRI00, IPR_B4}, /* PCIC PCIERR */
+ [evt2irq(0xb00)] = {INTPRI00, IPR_B8}, /* TMU3 */
+ [evt2irq(0xb80)] = {INTPRI00, IPR_B12}, /* TMU4 */
+};
+
+/*
+ * IPR registers have 4bit priority x 4 entry (16bits)
+ */
+static void update_ipr(struct sh7751_intc_priv *priv, unsigned int irq, u16 pri)
+{
+ const struct ipr *ipr = NULL;
+ void __iomem *ipr_base;
+ unsigned int offset;
+ u16 mask;
+
+ ipr = priv->iprmap + irq;
+ if (irq < GRP1_IRQ_START) {
+ /* Group0 */
+ ipr_base = priv->base + R_IPR;
+ offset = ipr->off;
+ } else {
+ /* Group1 */
+ ipr_base = priv->intpri00;
+ offset = ipr->off - INTPRI00;
+ }
+ mask = ~(IPR_PRI_MASK << ipr->idx);
+ pri = (pri & IPR_PRI_MASK) << ipr->idx;
+ mask &= __raw_readw(ipr_base + offset);
+ __raw_writew(mask | pri, ipr_base + offset);
+}
+
+static inline bool is_valid_irq(unsigned int irq)
+{
+ /* IRQ16 - 63 */
+ if (irq >= IRQ_START && irq < IRQ_START + NR_IPRMAP0)
+ return true;
+ /* IRQ80 - 92 */
+ if (irq >= GRP1_IRQ_START && irq <= IRQ_END)
+ return true;
+ return false;
+}
+
+static inline struct sh7751_intc_priv *irq_data_to_priv(struct irq_data *data)
+{
+ return data->domain->host_data;
+}
+
+/* Interrupt unmask priority is 1, mask priority is 0 */
+#define PRI_ENABLE 1
+#define PRI_DISABLE 0
+static void endisable_irq(struct irq_data *data, bool enable)
+{
+ struct sh7751_intc_priv *priv;
+ unsigned int irq;
+
+ priv = irq_data_to_priv(data);
+
+ irq = irqd_to_hwirq(data);
+ if (!is_valid_irq(irq)) {
+ /* IRQ out of range */
+ pr_warn_once("%s: IRQ %u is out of range\n", __FILE__, irq);
+ return;
+ }
+
+ if (irq <= MAX_IRL && !priv->irlm) {
+ /* IRL encoded external interrupt */
+ /* enable and disable from SR.IMASK */
+ update_sr_imask(irq - IRQ_START, enable);
+ } else {
+ /* Internal peripheral interrupt */
+ /* enable and disable from interrupt priority */
+ update_ipr(priv, irq, enable ? PRI_ENABLE : PRI_DISABLE);
+ }
+}
+
+static void sh7751_mask_irq(struct irq_data *data)
+{
+ endisable_irq(data, false);
+}
+
+static void sh7751_unmask_irq(struct irq_data *data)
+{
+ endisable_irq(data, true);
+}
+
+static const struct irq_chip sh7751_irq_chip = {
+ .name = "SH7751-INTC",
+ .irq_unmask = sh7751_unmask_irq,
+ .irq_mask = sh7751_mask_irq,
+};
+
+static int irq_sh7751_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &sh7751_irq_chip, handle_level_irq);
+ irq_get_irq_data(virq)->chip_data = h->host_data;
+ irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE);
+ return 0;
+}
+
+static int irq_sh7751_xlate(struct irq_domain *d, struct device_node *ctrlr,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type)
+{
+ if (WARN_ON(intsize < 1))
+ return -EINVAL;
+ *out_hwirq = evt2irq(intspec[0]);
+ *out_type = IRQ_TYPE_NONE;
+ return 0;
+}
+
+static const struct irq_domain_ops irq_ops = {
+ .map = irq_sh7751_map,
+ .xlate = irq_sh7751_xlate,
+};
+
+static int __init shintc_of_init(struct device_node *intc, struct device_node *parent,
+ const struct ipr *iprmap)
+{
+ struct sh7751_intc_priv *priv;
+ void __iomem *base, *base2;
+ struct irq_domain *domain;
+ u16 icr;
+ int ret;
+
+ priv = kzalloc(sizeof(struct sh7751_intc_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ base = of_iomap(intc, 0);
+ base2 = of_iomap(intc, 1);
+ if (!base || !base2) {
+ pr_err("%pOFP: Invalid register definition\n", intc);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ priv->base = base;
+ priv->intpri00 = base2;
+ priv->iprmap = iprmap;
+
+ if (of_property_read_bool(intc, "renesas,irlm")) {
+ priv->irlm = true;
+ icr = __raw_readw(priv->base + R_ICR);
+ icr |= ICR_IRLM;
+ __raw_writew(icr, priv->base + R_ICR);
+ }
+
+ domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, priv);
+ if (domain == NULL) {
+ pr_err("%pOFP: cannot initialize irq domain\n", intc);
+ ret = -ENOMEM;
+ goto error;
+ }
+
+ irq_set_default_host(domain);
+ pr_info("%pOFP: SH7751 Interrupt controller (%s external IRQ)",
+ intc, priv->irlm ? "4 lines" : "15 level");
+ return 0;
+
+error:
+ if (base)
+ iounmap(base);
+ if (base2)
+ iounmap(base);
+ kfree(priv);
+ return ret;
+}
+
+static int __init sh7751_intc_of_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ return shintc_of_init(intc, parent, sh7751_iprmap);
+}
+
+IRQCHIP_DECLARE(sh_7751_intc, "renesas,sh7751-intc", sh7751_intc_of_init);
--
2.39.2
I've changed some symbols related to DeviceTree,
so let's take care of those changes.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/configs/j2_defconfig | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/arch/sh/configs/j2_defconfig b/arch/sh/configs/j2_defconfig
index 2eb81ebe3888..cdc8ed244618 100644
--- a/arch/sh/configs/j2_defconfig
+++ b/arch/sh/configs/j2_defconfig
@@ -1,18 +1,15 @@
-CONFIG_SMP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_CPU_SUBTYPE_J2=y
CONFIG_MEMORY_START=0x10000000
-CONFIG_MEMORY_SIZE=0x04000000
CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_SH_DEVICE_TREE=y
-CONFIG_SH_JCORE_SOC=y
+CONFIG_SH_OF_BOARD=y
CONFIG_HZ_100=y
+CONFIG_SMP=y
CONFIG_CMDLINE_OVERWRITE=y
CONFIG_CMDLINE="console=ttyUL0 earlycon"
-CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_NET=y
CONFIG_PACKET=y
@@ -21,7 +18,6 @@ CONFIG_INET=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_NETDEVICES=y
-CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
CONFIG_I2C=y
@@ -30,8 +26,6 @@ CONFIG_SPI_JCORE=y
CONFIG_WATCHDOG=y
CONFIG_MMC=y
CONFIG_MMC_SPI=y
-CONFIG_CLKSRC_JCORE_PIT=y
-CONFIG_JCORE_AIC=y
CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
@@ -40,3 +34,4 @@ CONFIG_NLS_DEFAULT="utf8"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_UTF8=y
+CONFIG_INIT_STACK_NONE=y
--
2.39.2
IRQ, CLK and PCI will be migrated to a common driver framework.
So if OF, disable the SH specific drivers.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/Kconfig | 11 ++++++-----
arch/sh/drivers/Makefile | 2 ++
arch/sh/kernel/cpu/Makefile | 9 +++++++--
arch/sh/kernel/cpu/sh4/Makefile | 3 +++
4 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index d6704c57f9dc..91c7c72bc0db 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -66,10 +66,10 @@ config SUPERH
select MODULES_USE_ELF_RELA
select NEED_SG_DMA_LENGTH
select NO_DMA if !MMU && !DMA_COHERENT
- select NO_GENERIC_PCI_IOPORT_MAP if PCI
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
select OLD_SIGACTION
select OLD_SIGSUSPEND
- select PCI_DOMAINS if PCI
+ select PCI_DOMAINS if PCI && !SH_DEVICE_TREE
select PERF_EVENTS
select PERF_USE_VMALLOC
select RTC_LIB
@@ -154,7 +154,7 @@ menu "System type"
#
config CPU_SH2
bool
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
config CPU_SH2A
bool
@@ -180,7 +180,7 @@ config CPU_SH4
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
select CPU_HAS_FPU if !CPU_SH4AL_DSP
- select SH_INTC
+ select SH_INTC if !SH_DEVICE_TREE
select SYS_SUPPORTS_SH_TMU
config CPU_SH4A
@@ -523,6 +523,7 @@ config SH_PCLK_FREQ
config SH_CLK_CPG
def_bool y
+ depends on !COMMON_CLK
config SH_CLK_CPG_LEGACY
depends on SH_CLK_CPG
@@ -667,7 +668,7 @@ config BUILTIN_DTB_SOURCE
kernel.
config ZERO_PAGE_OFFSET
- hex
+ hex "Zero page offset"
default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
SH_7751_SOLUTION_ENGINE
default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index 8bd10b904bf9..83f609ca1eb4 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -5,6 +5,8 @@
obj-y += dma/ platform_early.o
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 46118236bf04..e00ebf134985 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_SH_ADC) += adc.o
+ifndef CONFIG_COMMON_CLK
+obj-y += clock.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-
-obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y += irq/
+endif
+obj-y += init.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 02e3ee16e15c..33da4c86feff 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
+ifndef CONFIG_SH_DEVICE_TREE
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A
clock-$(CONFIG_CPU_SH4) := clock-sh4.o
endif
+endif # CONFIG_SH_DEVICE_TREE
+
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
--
2.39.2
R4 is caller saved in SH ABI.
Save it so it doesn't get corrupted until it's needed for initialization.
Signed-off-by: Yoshinori Sato <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/sh/boot/compressed/head_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 7bb168133dbb..6be59851122e 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -15,7 +15,8 @@ startup:
/* Load initial status register */
mov.l init_sr, r1
ldc r1, sr
-
+ /* Save FDT address */
+ mov r4, r13
/* Move myself to proper location if necessary */
mova 1f, r0
mov.l 1f, r2
@@ -84,7 +85,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l kernel_start_addr, r0
jmp @r0
- nop
+ mov r13, r4
.align 2
bss_start_addr:
--
2.39.2
Renesas SH7751 Interrupt controller priority register define.
Signed-off-by: Yoshinori Sato <[email protected]>
---
.../renesas,sh7751-intc.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
new file mode 100644
index 000000000000..0543bd1b895e
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+ *
+ * SH3/4 INTC IPR register offsets (Address / bits)
+ */
+
+#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC
+#define __DT_BINDINGS_RENESAS_SH7751_INTC
+
+#define IPRA 0
+#define IPRB 4
+#define IPRC 8
+#define IPRD 12
+#define INTPRI00 256
+#define IPR_B12 12
+#define IPR_B8 8
+#define IPR_B4 4
+#define IPR_B0 0
+
+#endif
--
2.39.2
Added new ata-generic target.
- iodata,usl-5p-ata
- renesas,rts7751r2d-ata
Each boards have simple IDE Interface. Use ATA generic driver.
Signed-off-by: Yoshinori Sato <[email protected]>
---
Documentation/devicetree/bindings/ata/ata-generic.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/ata/ata-generic.yaml b/Documentation/devicetree/bindings/ata/ata-generic.yaml
index 0697927f3d7e..1025b3b351d0 100644
--- a/Documentation/devicetree/bindings/ata/ata-generic.yaml
+++ b/Documentation/devicetree/bindings/ata/ata-generic.yaml
@@ -18,6 +18,8 @@ properties:
- enum:
- arm,vexpress-cf
- fsl,mpc8349emitx-pata
+ - iodata,usl-5p-ata
+ - renesas,rts7751r2d-ata
- const: ata-generic
reg:
--
2.39.2
Initialize the clock and timer using the COMMON_CLK procedure.
sh's earlytimer mechanism doesn't work properly in OF,
so timer initialization is delayed.
If CONFIG_OF=y, perform the general timer initialization procedure.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boards/of-generic.c | 28 ++++------------------------
arch/sh/kernel/time.c | 12 ++++++++++++
2 files changed, 16 insertions(+), 24 deletions(-)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index cc88cb8908cc..64f80d2878b1 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -8,6 +8,7 @@
#include <linux/of.h>
#include <linux/of_clk.h>
#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
#include <linux/clocksource.h>
#include <linux/irqchip.h>
@@ -100,16 +101,7 @@ static void sh_of_smp_probe(void)
#endif
-static void noop(void)
-{
-}
-
-static int noopi(void)
-{
- return 0;
-}
-
-static void __init sh_of_mem_reserve(void)
+static void __init sh_of_mem_init(void)
{
early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem();
@@ -142,25 +134,13 @@ static void __init sh_of_init_irq(void)
irqchip_init();
}
-static int __init sh_of_clk_init(void)
-{
-#ifdef CONFIG_COMMON_CLK
- /* Disabled pending move to COMMON_CLK framework. */
- pr_info("SH generic board support: scanning for clk providers\n");
- of_clk_init(NULL);
-#endif
- return 0;
-}
-
static struct sh_machine_vector __initmv sh_of_generic_mv = {
.mv_setup = sh_of_setup,
.mv_name = "devicetree", /* replaced by DT root's model */
.mv_irq_demux = sh_of_irq_demux,
.mv_init_irq = sh_of_init_irq,
- .mv_clk_init = sh_of_clk_init,
- .mv_mode_pins = noopi,
- .mv_mem_init = noop,
- .mv_mem_reserve = sh_of_mem_reserve,
+ .mv_mode_pins = generic_mode_pins,
+ .mv_mem_init = sh_of_mem_init,
};
struct sh_clk_ops;
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 821a09cbd605..ce5b7c2f8628 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -19,7 +19,9 @@
#include <asm/clock.h>
#include <asm/rtc.h>
#include <asm/platform_early.h>
+#include <linux/of_clk.h>
+#ifndef CONFIG_SH_DEVICE_TREE
static void __init sh_late_time_init(void)
{
/*
@@ -43,3 +45,13 @@ void __init time_init(void)
late_time_init = sh_late_time_init;
}
+#else
+/* CONFIG_SH_DEVICE_TREE */
+void __init time_init(void)
+{
+ pr_info("SH generic board support: scanning for clk providers\n");
+
+ of_clk_init(NULL);
+ timer_probe();
+}
+#endif
--
2.39.2
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boot/dts/j2_mimas_v2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts
index faf884f53804..b6ee682c5737 100644
--- a/arch/sh/boot/dts/j2_mimas_v2.dts
+++ b/arch/sh/boot/dts/j2_mimas_v2.dts
@@ -16,7 +16,7 @@ cpus {
cpu@0 {
device_type = "cpu";
- compatible = "jcore,j2";
+ compatible = "jcore,j2", "renesas,sh2";
reg = <0>;
clock-frequency = <50000000>;
d-cache-size = <8192>;
--
2.39.2
SH7751R internal peripherals device tree.
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/sh/boot/dts/sh7751r.dtsi | 105 ++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
create mode 100644 arch/sh/boot/dts/sh7751r.dtsi
diff --git a/arch/sh/boot/dts/sh7751r.dtsi b/arch/sh/boot/dts/sh7751r.dtsi
new file mode 100644
index 000000000000..61b2af5bebde
--- /dev/null
+++ b/arch/sh/boot/dts/sh7751r.dtsi
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the SH7751R SoC
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/sh7750-cpg.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "renesas,sh4", "renesas,sh2";
+ device_type = "cpu";
+ reg = <0>;
+ clocks = <&cpg SH7750_CPG_ICK>;
+ clock-names = "ick";
+ icache-size = <16384>;
+ icache-line-size = <32>;
+ dcache-size = <32768>;
+ dcache-line-size = <32>;
+ };
+ };
+
+ extal: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ clock-output-names = "extal";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&shintc>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ cpg: clock-controller@ffc00000 {
+ #clock-cells = <1>;
+ #power-domain-cells = <0>;
+ compatible = "renesas,sh7751r-cpg";
+ clocks = <&extal>;
+ clock-names = "extal";
+ reg = <0xffc00000 20>, <0xfe0a0000 16>;
+ reg-names = "FRQCR", "CLKSTP00";
+ renesas,mode = <0>;
+ };
+
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <0xffd00000 20>, <0xfe080000 128>;
+ reg-names = "ICR", "INTPRI00";
+ };
+
+ /* sci0 is rarely used, so it is not defined here. */
+ scif1: serial@ffe80000 {
+ compatible = "renesas,scif-sh7751", "renesas,scif";
+ reg = <0xffe80000 0x100>;
+ interrupts = <0x700>,
+ <0x720>,
+ <0x760>,
+ <0x740>;
+ interrupt-names = "eri", "rxi", "txi", "bri";
+ clocks = <&cpg SH7750_MSTP_SCIF>;
+ clock-names = "fck";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ /* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */
+ tmu0: timer@ffd80000 {
+ compatible = "renesas,tmu-sh7750", "renesas,tmu";
+ reg = <0xffd80000 12>;
+ interrupts = <0x400>,
+ <0x420>,
+ <0x440>,
+ <0x460>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
+ clocks = <&cpg SH7750_MSTP_TMU012>;
+ clock-names = "fck";
+ power-domains = <&cpg>;
+ #renesas,channels = <3>;
+ };
+
+ pcic: pci@fe200000 {
+ compatible = "renesas,sh7751-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ bus-range = <0 0>;
+ reg = <0xfe200000 0x0400>,
+ <0xff800000 0x0100>;
+ status = "disabled";
+ };
+ };
+};
--
2.39.2
Hey,
On Wed, May 29, 2024 at 05:01:12PM +0900, Yoshinori Sato wrote:
> Added new ata-generic target.
> - iodata,usl-5p-ata
> - renesas,rts7751r2d-ata
>
> Each boards have simple IDE Interface. Use ATA generic driver.
>
> Signed-off-by: Yoshinori Sato <[email protected]>
Why do you keep dropping tags? Damien and I acked this back in v6 and
Krzysztof reminded you in v7:
https://lore.kernel.org/all/06fdb2cf7927681acf3099b826390ef75ba321af.1704788539.git.ysato@users.sourceforge.jp/
https://lore.kernel.org/all/53f85cc2e124d1c2e7394458b73293d797817d6d.1712207606.git.ysato@users.sourceforge.jp/
Dropping the tags just leads to wasted time re-reviewing patches that
already got approved. I don't see any valid reason to drop them on a
trivial patch like this :/ Please check back to previous revisions and
make sure that you picked up applicable tags.
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/ata/ata-generic.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/ata/ata-generic.yaml b/Documentation/devicetree/bindings/ata/ata-generic.yaml
> index 0697927f3d7e..1025b3b351d0 100644
> --- a/Documentation/devicetree/bindings/ata/ata-generic.yaml
> +++ b/Documentation/devicetree/bindings/ata/ata-generic.yaml
> @@ -18,6 +18,8 @@ properties:
> - enum:
> - arm,vexpress-cf
> - fsl,mpc8349emitx-pata
> + - iodata,usl-5p-ata
> + - renesas,rts7751r2d-ata
> - const: ata-generic
>
> reg:
> --
> 2.39.2
>
On Wed, May 29, 2024 at 05:00:46PM +0900, Yoshinori Sato wrote:
> This is an updated version of something I wrote about 7 years ago.
> Minimum support for R2D-plus and LANDISK.
> I think R2D-1 will work if you add AX88796 to dts.
> And board-specific functions and SCI's SPI functions are not supported.
I don't understand the point of this. It's marked "DO NOT MERGE", so
what do you want me to do? I've posted comments several times and
they've never been addressed, so I don't think there's any point in
looking at this again:
https://lore.kernel.org/r/20240404134652.GA1910402@bhelgaas
Bjorn