The SA8775p platform has LLCC as the system cache controller. It
includes 6 LLCC instances and 1 broadcast interface.
Signed-off-by: Tengfei Fan <[email protected]>
---
Tengfei Fan (3):
dt-bindings: cache: qcom,llcc: Add SA8775p description
soc: qcom: llcc: Add llcc configuration support for the SA8775p
platform
arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform
.../devicetree/bindings/cache/qcom,llcc.yaml | 28 +++++++++++++++
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 ++++++++++
drivers/soc/qcom/llcc-qcom.c | 35 +++++++++++++++++++
3 files changed, 82 insertions(+)
base-commit: 9d99040b1bc8dbf385a8aa535e9efcdf94466e19
--
2.25.1
Add the cache controller compatible and register region descriptions for
SA8775p platform.
Signed-off-by: Tengfei Fan <[email protected]>
---
.../devicetree/bindings/cache/qcom,llcc.yaml | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 07ccbda4a0ab..37eada55e0f0 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -21,6 +21,7 @@ properties:
compatible:
enum:
- qcom,qdu1000-llcc
+ - qcom,sa8775p-llcc
- qcom,sc7180-llcc
- qcom,sc7280-llcc
- qcom,sc8180x-llcc
@@ -80,6 +81,33 @@ allOf:
- const: llcc0_base
- const: llcc_broadcast_base
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sa8775p-llcc
+ then:
+ properties:
+ reg:
+ items:
+ - description: LLCC0 base register region
+ - description: LLCC1 base register region
+ - description: LLCC2 base register region
+ - description: LLCC3 base register region
+ - description: LLCC4 base register region
+ - description: LLCC5 base register region
+ - description: LLCC broadcast base register region
+ reg-names:
+ items:
+ - const: llcc0_base
+ - const: llcc1_base
+ - const: llcc2_base
+ - const: llcc3_base
+ - const: llcc4_base
+ - const: llcc5_base
+ - const: llcc_broadcast_base
+
- if:
properties:
compatible:
--
2.25.1
Add llcc support for the SA8775p platform.
Signed-off-by: Tengfei Fan <[email protected]>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 5632fa896b93..8f910ab113f5 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2885,6 +2885,25 @@ serdes1: phy@8902000 {
status = "disabled";
};
+ llcc: system-cache-controller@9200000 {
+ compatible = "qcom,sa8775p-llcc";
+ reg = <0x0 0x09200000 0x0 0x80000>,
+ <0x0 0x09300000 0x0 0x80000>,
+ <0x0 0x09400000 0x0 0x80000>,
+ <0x0 0x09500000 0x0 0x80000>,
+ <0x0 0x09600000 0x0 0x80000>,
+ <0x0 0x09700000 0x0 0x80000>,
+ <0x0 0x09a00000 0x0 0x80000>;
+ reg-names = "llcc0_base",
+ "llcc1_base",
+ "llcc2_base",
+ "llcc3_base",
+ "llcc4_base",
+ "llcc5_base",
+ "llcc_broadcast_base";
+ interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sa8775p-pdc", "qcom,pdc";
reg = <0x0 0x0b220000 0x0 0x30000>,
--
2.25.1
On 29/05/2024 12:15, Tengfei Fan wrote:
> Add the cache controller compatible and register region descriptions for
> SA8775p platform.
>
> Signed-off-by: Tengfei Fan <[email protected]>
> ---
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, 29 May 2024 18:15:31 +0800, Tengfei Fan wrote:
> The SA8775p platform has LLCC as the system cache controller. It
> includes 6 LLCC instances and 1 broadcast interface.
>
>
Applied, thanks!
[3/3] arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform
commit: 809c20b1ffc80200bfcbbeceb0d946a3e0eed3a4
Best regards,
--
Bjorn Andersson <[email protected]>
On Wed, May 29, 2024 at 10:27:00PM -0500, Bjorn Andersson wrote:
>
> On Wed, 29 May 2024 18:15:31 +0800, Tengfei Fan wrote:
> > The SA8775p platform has LLCC as the system cache controller. It
> > includes 6 LLCC instances and 1 broadcast interface.
> >
> >
>
> Applied, thanks!
>
> [3/3] arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform
> commit: 809c20b1ffc80200bfcbbeceb0d946a3e0eed3a4
I'm confused why you didn't pick up the driver and binding?
Rob
On 31.05.2024 3:41 AM, Rob Herring wrote:
> On Wed, May 29, 2024 at 10:27:00PM -0500, Bjorn Andersson wrote:
>>
>> On Wed, 29 May 2024 18:15:31 +0800, Tengfei Fan wrote:
>>> The SA8775p platform has LLCC as the system cache controller. It
>>> includes 6 LLCC instances and 1 broadcast interface.
>>>
>>>
>>
>> Applied, thanks!
>>
>> [3/3] arm64: dts: qcom: sa8775p: Add llcc support for the SA8775p platform
>> commit: 809c20b1ffc80200bfcbbeceb0d946a3e0eed3a4
>
> I'm confused why you didn't pick up the driver and binding?
He did, although to a different tree (qcom/arm64-for-x.y vs qcom/drivers-for-x.y)
Konrad