Some SkyLake server variants don't support any SST functionality. No use
of providing any SST related interfaces on them.
All supported SkyLake servers provide mailbox interface via MSR. So check
for the presence of MSR 0xB0 and 0xB1. If not present don't load common
module.
Move defines for MSR_OS_MAILBOX_INTERFACE and MSR_OS_MAILBOX_DATA to
common header file to avoid duplicating them.
Signed-off-by: Srinivas Pandruvada <[email protected]>
---
New patch, split from v1 1/2
The mbox MSR defines are moved to common header file to avoid duplicates
.../x86/intel/speed_select_if/isst_if_common.c | 13 +++++++++++--
.../x86/intel/speed_select_if/isst_if_common.h | 3 +++
.../x86/intel/speed_select_if/isst_if_mbox_msr.c | 2 --
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
index 47f5f26e6c20..7ea058571ab5 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -814,6 +814,7 @@ void isst_if_cdev_unregister(int device_type)
EXPORT_SYMBOL_GPL(isst_if_cdev_unregister);
#define SST_HPM_SUPPORTED 0x01
+#define SST_MBOX_SUPPORTED 0x02
static const struct x86_cpu_id isst_cpu_ids[] = {
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, SST_HPM_SUPPORTED),
@@ -824,7 +825,7 @@ static const struct x86_cpu_id isst_cpu_ids[] = {
X86_MATCH_VFM(INTEL_ICELAKE_D, 0),
X86_MATCH_VFM(INTEL_ICELAKE_X, 0),
X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0),
- X86_MATCH_VFM(INTEL_SKYLAKE_X, 0),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, SST_MBOX_SUPPORTED),
{}
};
MODULE_DEVICE_TABLE(x86cpu, isst_cpu_ids);
@@ -837,8 +838,16 @@ static int __init isst_if_common_init(void)
if (!id)
return -ENODEV;
- if (id->driver_data == SST_HPM_SUPPORTED)
+ if (id->driver_data == SST_HPM_SUPPORTED) {
isst_hpm_support = true;
+ } else if (id->driver_data == SST_MBOX_SUPPORTED) {
+ u64 data;
+
+ /* Can fail only on some Skylake-X generations */
+ if (rdmsrl_safe(MSR_OS_MAILBOX_INTERFACE, &data) ||
+ rdmsrl_safe(MSR_OS_MAILBOX_DATA, &data))
+ return -ENODEV;
+ }
return isst_misc_reg();
}
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.h b/drivers/platform/x86/intel/speed_select_if/isst_if_common.h
index 1004f2c9cca8..378055fe1d16 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.h
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.h
@@ -16,6 +16,9 @@
#define PCI_DEVICE_ID_INTEL_RAPL_PRIO_DEVID_1 0x3251
#define PCI_DEVICE_ID_INTEL_CFG_MBOX_DEVID_1 0x3259
+#define MSR_OS_MAILBOX_INTERFACE 0xB0
+#define MSR_OS_MAILBOX_DATA 0xB1
+
/*
* Validate maximum commands in a single request.
* This is enough to handle command to every core in one ioctl, or all
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
index 1b6eab071068..48b608eaca5f 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
@@ -21,8 +21,6 @@
#include "isst_if_common.h"
-#define MSR_OS_MAILBOX_INTERFACE 0xB0
-#define MSR_OS_MAILBOX_DATA 0xB1
#define MSR_OS_MAILBOX_BUSY_BIT 31
/*
--
2.40.1