More speed grades for the AM62Px SoC family have been defined which
unfortunately no longer align with the AM62x table. So create a new
table with these new speed grades defined for the AM62Px
Signed-off-by: Bryan Brattlof <[email protected]>
---
drivers/cpufreq/ti-cpufreq.c | 35 ++++++++++++++++++++++++++++++++++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index a80698f3cfe65..6c84562de5c6b 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -69,6 +69,13 @@ enum {
#define AM62A7_SUPPORT_R_MPU_OPP BIT(1)
#define AM62A7_SUPPORT_V_MPU_OPP BIT(2)
+#define AM62P5_EFUSE_O_MPU_OPP 15
+#define AM62P5_EFUSE_S_MPU_OPP 19
+#define AM62P5_EFUSE_U_MPU_OPP 21
+
+#define AM62P5_SUPPORT_O_MPU_OPP BIT(0)
+#define AM62P5_SUPPORT_U_MPU_OPP BIT(2)
+
#define VERSION_COUNT 2
struct ti_cpufreq_data;
@@ -134,6 +141,23 @@ static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data,
return BIT(efuse);
}
+static unsigned long am62p5_efuse_xlate(struct ti_cpufreq_data *opp_data,
+ unsigned long efuse)
+{
+ unsigned long calc_efuse = AM62P5_SUPPORT_O_MPU_OPP;
+
+ switch (efuse) {
+ case AM62P5_EFUSE_U_MPU_OPP:
+ case AM62P5_EFUSE_S_MPU_OPP:
+ calc_efuse |= AM62P5_SUPPORT_U_MPU_OPP;
+ fallthrough;
+ case AM62P5_EFUSE_O_MPU_OPP:
+ calc_efuse |= AM62P5_SUPPORT_O_MPU_OPP;
+ }
+
+ return calc_efuse;
+}
+
static unsigned long am62a7_efuse_xlate(struct ti_cpufreq_data *opp_data,
unsigned long efuse)
{
@@ -291,6 +315,15 @@ static struct ti_cpufreq_soc_data am62a7_soc_data = {
.multi_regulator = false,
};
+static struct ti_cpufreq_soc_data am62p5_soc_data = {
+ .efuse_xlate = am62p5_efuse_xlate,
+ .efuse_offset = 0x0,
+ .efuse_mask = 0x07c0,
+ .efuse_shift = 0x6,
+ .rev_offset = 0x0014,
+ .multi_regulator = false,
+};
+
/**
* ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
* @opp_data: pointer to ti_cpufreq_data context
@@ -395,7 +428,7 @@ static const struct of_device_id ti_cpufreq_of_match[] = {
{ .compatible = "ti,omap36xx", .data = &omap36xx_soc_data, },
{ .compatible = "ti,am625", .data = &am625_soc_data, },
{ .compatible = "ti,am62a7", .data = &am62a7_soc_data, },
- { .compatible = "ti,am62p5", .data = &am625_soc_data, },
+ { .compatible = "ti,am62p5", .data = &am62p5_soc_data, },
/* legacy */
{ .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
{ .compatible = "ti,omap3630", .data = &omap36xx_soc_data, },
--
2.45.2
On Jun 12, 2024 at 18:17:35 -0500, Bryan Brattlof wrote:
> More speed grades for the AM62Px SoC family have been defined which
> unfortunately no longer align with the AM62x table. So create a new
> table with these new speed grades defined for the AM62Px
>
> Signed-off-by: Bryan Brattlof <[email protected]>
> ---
> drivers/cpufreq/ti-cpufreq.c | 35 ++++++++++++++++++++++++++++++++++-
> 1 file changed, 34 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
> index a80698f3cfe65..6c84562de5c6b 100644
> --- a/drivers/cpufreq/ti-cpufreq.c
> +++ b/drivers/cpufreq/ti-cpufreq.c
> @@ -69,6 +69,13 @@ enum {
> #define AM62A7_SUPPORT_R_MPU_OPP BIT(1)
> #define AM62A7_SUPPORT_V_MPU_OPP BIT(2)
>
> +#define AM62P5_EFUSE_O_MPU_OPP 15
> +#define AM62P5_EFUSE_S_MPU_OPP 19
> +#define AM62P5_EFUSE_U_MPU_OPP 21
> +
> +#define AM62P5_SUPPORT_O_MPU_OPP BIT(0)
> +#define AM62P5_SUPPORT_U_MPU_OPP BIT(2)
> +
> #define VERSION_COUNT 2
>
> struct ti_cpufreq_data;
> @@ -134,6 +141,23 @@ static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data,
> return BIT(efuse);
> }
>
> +static unsigned long am62p5_efuse_xlate(struct ti_cpufreq_data *opp_data,
> + unsigned long efuse)
> +{
> + unsigned long calc_efuse = AM62P5_SUPPORT_O_MPU_OPP;
This and he earlier patch, why not continue using the name convention
calculated_efuse like in am625 and dra ?
> +
> + switch (efuse) {
> + case AM62P5_EFUSE_U_MPU_OPP:
> + case AM62P5_EFUSE_S_MPU_OPP:
> + calc_efuse |= AM62P5_SUPPORT_U_MPU_OPP;
> + fallthrough;
> + case AM62P5_EFUSE_O_MPU_OPP:
> + calc_efuse |= AM62P5_SUPPORT_O_MPU_OPP;
> + }
> +
> + return calc_efuse;
> +}
> +
> static unsigned long am62a7_efuse_xlate(struct ti_cpufreq_data *opp_data,
> unsigned long efuse)
Otherwise, Looks good.
Reviewed-by: Dhruva Gole <[email protected]>
--
Best regards,
Dhruva
On June 13, 2024 thus sayeth Dhruva Gole:
> On Jun 12, 2024 at 18:17:35 -0500, Bryan Brattlof wrote:
> > More speed grades for the AM62Px SoC family have been defined which
> > unfortunately no longer align with the AM62x table. So create a new
> > table with these new speed grades defined for the AM62Px
> >
> > Signed-off-by: Bryan Brattlof <[email protected]>
> > ---
> > drivers/cpufreq/ti-cpufreq.c | 35 ++++++++++++++++++++++++++++++++++-
> > 1 file changed, 34 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
> > index a80698f3cfe65..6c84562de5c6b 100644
> > --- a/drivers/cpufreq/ti-cpufreq.c
> > +++ b/drivers/cpufreq/ti-cpufreq.c
> > @@ -69,6 +69,13 @@ enum {
> > #define AM62A7_SUPPORT_R_MPU_OPP BIT(1)
> > #define AM62A7_SUPPORT_V_MPU_OPP BIT(2)
> >
> > +#define AM62P5_EFUSE_O_MPU_OPP 15
> > +#define AM62P5_EFUSE_S_MPU_OPP 19
> > +#define AM62P5_EFUSE_U_MPU_OPP 21
> > +
> > +#define AM62P5_SUPPORT_O_MPU_OPP BIT(0)
> > +#define AM62P5_SUPPORT_U_MPU_OPP BIT(2)
> > +
> > #define VERSION_COUNT 2
> >
> > struct ti_cpufreq_data;
> > @@ -134,6 +141,23 @@ static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data,
> > return BIT(efuse);
> > }
> >
> > +static unsigned long am62p5_efuse_xlate(struct ti_cpufreq_data *opp_data,
> > + unsigned long efuse)
> > +{
> > + unsigned long calc_efuse = AM62P5_SUPPORT_O_MPU_OPP;
>
> This and he earlier patch, why not continue using the name convention
> calculated_efuse like in am625 and dra ?
>
For whatever reason I've been more of a minimalist when it comes to
naming stack variables. Single letters are just as good as full
sentences ;)
I'll use the full name next round
~Bryan