From: Chen-Yu Tsai <[email protected]>
Hi everyone,
This series adds DMA and SPDIF controllers for the H616 and H618.
There's also a fix for SPDIF on H6: the controller also has a
receiver that was not correctly modeled.
Patch 1 fixes the binding for the SPDIF controller on the H6 by adding
the RX DMA channel.
Patch 2 adds a compatible string for the H616's SPDIF transmitter to the
binding.
Patch 3 adds a compatible string for the H616's SPDIF transmitter to the
driver.
Patch 4 adds a compatible string for the H616's DMA controller.
Patch 5 adds the RX DMA channel to the SPDIF controller on the H6.
Patch 6 adds a device node for the H616's DMA controller.
Patch 7 adds a device node for the H616's SPDIF controller.
This was tested on the Orange Pi Zero 3 with SPI flash transfers and
SPDIF audio output. The H6 SPDIF change is superficial as the driver
does not support receiving / capturing an audio stream.
Please have a look. I expect the first three patches to go through the
ASoC tree, the fourth patch to either go through the DMA tree, or
through the sunxi tree with an Ack, and the last three through the sunxi
tree.
Thanks
ChenYu
Chen-Yu Tsai (7):
dt-bindings: sound: sun4i-spdif: Fix requirements for H6
dt-bindings: sound: sun4i-spdif: Add Allwinner H616 compatible
ASoC: sunxi: sun4i-spdif: Add support for Allwinner H616
dt-bindings: dma: allwinner,sun50i-a64-dma: Add compatible for H616
arm64: dts: allwinner: h6: Add RX DMA channel for SPDIF
arm64: dts: allwinner: h616: Add DMA controller and DMA channels
arm64: dts: allwinner: h616: Add SPDIF device node
.../dma/allwinner,sun50i-a64-dma.yaml | 15 +++--
.../sound/allwinner,sun4i-a10-spdif.yaml | 5 +-
.../dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 +
.../boot/dts/allwinner/sun50i-h6-tanix.dtsi | 2 +
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 7 +--
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 59 +++++++++++++++++++
sound/soc/sunxi/sun4i-spdif.c | 5 ++
7 files changed, 86 insertions(+), 9 deletions(-)
--
2.39.2
From: Chen-Yu Tsai <[email protected]>
The SPDIF hardware block found in the H616 SoC has the same layout as
the one found in the H6 SoC, except that it is missing the receiver
side.
Since the driver currently only supports the transmit function, support
for the H616 is identical to what is currently done for the H6.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
sound/soc/sunxi/sun4i-spdif.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index 702386823d17..f41c30955857 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -577,6 +577,11 @@ static const struct of_device_id sun4i_spdif_of_match[] = {
.compatible = "allwinner,sun50i-h6-spdif",
.data = &sun50i_h6_spdif_quirks,
},
+ {
+ .compatible = "allwinner,sun50i-h616-spdif",
+ /* Essentially the same as the H6, but without RX */
+ .data = &sun50i_h6_spdif_quirks,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
--
2.39.2
From: Chen-Yu Tsai <[email protected]>
The SPDIF hardware found on the H6 supports both transmit and receive
functions. However it is missing the RX DMA channel.
Add the SPDIF hardware block's RX DMA channel. Also remove the
by-default pinmux, since the end device can choose to implement
either or both functionalities.
Fixes: f95b598df419 ("arm64: dts: allwinner: Add SPDIF node for Allwinner H6")
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 ++
arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi | 2 ++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 7 +++----
3 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 9ec49ac2f6fd..381d58cea092 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -291,6 +291,8 @@ sw {
};
&spdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
index 4903d6358112..855b7d43bc50 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
@@ -166,6 +166,8 @@ &r_ir {
};
&spdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx_pin>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index ca1d287a0a01..d11e5041bae9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -406,6 +406,7 @@ spi1_cs_pin: spi1-cs-pin {
function = "spi1";
};
+ /omit-if-no-ref/
spdif_tx_pin: spdif-tx-pin {
pins = "PH7";
function = "spdif";
@@ -655,10 +656,8 @@ spdif: spdif@5093000 {
clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
clock-names = "apb", "spdif";
resets = <&ccu RST_BUS_SPDIF>;
- dmas = <&dma 2>;
- dma-names = "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&spdif_tx_pin>;
+ dmas = <&dma 2>, <&dma 2>;
+ dma-names = "rx", "tx";
status = "disabled";
};
--
2.39.2
From: Chen-Yu Tsai <[email protected]>
The DMA controllers found on the H616 and H618 are the same as the one
found on the H6. The only difference is the DMA endpoint (DRQ) layout.
Add a device node for it, and add DMA channels for existing peripherals.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index d549d277d972..a0268439f3be 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -133,6 +133,19 @@ ccu: clock@3001000 {
#reset-cells = <1>;
};
+ dma: dma-controller@3002000 {
+ compatible = "allwinner,sun50i-h616-dma",
+ "allwinner,sun50i-h6-dma";
+ reg = <0x03002000 0x1000>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
+ clock-names = "bus", "mbus";
+ dma-channels = <16>;
+ dma-requests = <49>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid";
reg = <0x03006000 0x1000>;
@@ -339,6 +352,8 @@ uart0: serial@5000000 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
+ dmas = <&dma 14>, <&dma 14>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@@ -350,6 +365,8 @@ uart1: serial@5000400 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@@ -361,6 +378,8 @@ uart2: serial@5000800 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
+ dmas = <&dma 16>, <&dma 16>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART2>;
status = "disabled";
};
@@ -372,6 +391,8 @@ uart3: serial@5000c00 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART3>;
+ dmas = <&dma 17>, <&dma 17>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART3>;
status = "disabled";
};
@@ -383,6 +404,8 @@ uart4: serial@5001000 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART4>;
+ dmas = <&dma 18>, <&dma 18>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART4>;
status = "disabled";
};
@@ -394,6 +417,8 @@ uart5: serial@5001400 {
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART5>;
+ dmas = <&dma 19>, <&dma 19>;
+ dma-names = "tx", "rx";
resets = <&ccu RST_BUS_UART5>;
status = "disabled";
};
@@ -405,6 +430,8 @@ i2c0: i2c@5002000 {
reg = <0x05002000 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C0>;
+ dmas = <&dma 43>, <&dma 43>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_I2C0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
@@ -420,6 +447,8 @@ i2c1: i2c@5002400 {
reg = <0x05002400 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C1>;
+ dmas = <&dma 44>, <&dma 44>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_I2C1>;
status = "disabled";
#address-cells = <1>;
@@ -433,6 +462,8 @@ i2c2: i2c@5002800 {
reg = <0x05002800 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>;
+ dmas = <&dma 45>, <&dma 45>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_I2C2>;
status = "disabled";
#address-cells = <1>;
@@ -446,6 +477,8 @@ i2c3: i2c@5002c00 {
reg = <0x05002c00 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C3>;
+ dmas = <&dma 46>, <&dma 46>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_I2C3>;
status = "disabled";
#address-cells = <1>;
@@ -459,6 +492,8 @@ i2c4: i2c@5003000 {
reg = <0x05003000 0x400>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C4>;
+ dmas = <&dma 47>, <&dma 47>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_I2C4>;
status = "disabled";
#address-cells = <1>;
@@ -472,6 +507,8 @@ spi0: spi@5010000 {
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
+ dmas = <&dma 22>, <&dma 22>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_SPI0>;
status = "disabled";
#address-cells = <1>;
@@ -485,6 +522,8 @@ spi1: spi@5011000 {
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
+ dmas = <&dma 23>, <&dma 23>;
+ dma-names = "rx", "tx";
resets = <&ccu RST_BUS_SPI1>;
status = "disabled";
#address-cells = <1>;
--
2.39.2
From: Chen-Yu Tsai <[email protected]>
The H616 SoC has an SPDIF transmitter hardware block, which has the same
layout as the one in the H6, minus the receiver side.
Add a device node for it, and a default pinmux.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index a0268439f3be..fd4c080b8e62 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -253,6 +253,11 @@ spi1_cs0_pin: spi1-cs0-pin {
function = "spi1";
};
+ spdif_tx_pin: spdif-tx-pin {
+ pins = "PH4";
+ function = "spdif";
+ };
+
uart0_ph_pins: uart0-ph-pins {
pins = "PH0", "PH1";
function = "uart0";
@@ -550,6 +555,21 @@ mdio0: mdio {
};
};
+ spdif: spdif@5093000 {
+ compatible = "allwinner,sun50i-h616-spdif";
+ reg = <0x05093000 0x400>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
+ clock-names = "apb", "spdif";
+ resets = <&ccu RST_BUS_SPDIF>;
+ dmas = <&dma 2>;
+ dma-names = "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx_pin>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
usbotg: usb@5100000 {
compatible = "allwinner,sun50i-h616-musb",
"allwinner,sun8i-h3-musb";
--
2.39.2
From: Chen-Yu Tsai <[email protected]>
The SPDIF hardware block found in the H616 SoC has the same layout as
the one found in the H6 SoC, except that it is missing the receiver
side.
Add a new compatible string for it.
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
.../devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
index 98e2e053fa19..aa32dc950e72 100644
--- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
@@ -22,6 +22,7 @@ properties:
- const: allwinner,sun6i-a31-spdif
- const: allwinner,sun8i-h3-spdif
- const: allwinner,sun50i-h6-spdif
+ - const: allwinner,sun50i-h616-spdif
- items:
- const: allwinner,sun8i-a83t-spdif
- const: allwinner,sun8i-h3-spdif
@@ -63,6 +64,7 @@ allOf:
- allwinner,sun6i-a31-spdif
- allwinner,sun8i-h3-spdif
- allwinner,sun50i-h6-spdif
+ - allwinner,sun50i-h616-spdif
then:
required:
@@ -74,6 +76,7 @@ allOf:
contains:
enum:
- allwinner,sun8i-h3-spdif
+ - allwinner,sun50i-h616-spdif
then:
properties:
--
2.39.2
On Tue, Jan 23, 2024 at 01:05:13AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware block found in the H616 SoC has the same layout as
> the one found in the H6 SoC, except that it is missing the receiver
> side.
>
> Add a new compatible string for it.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Cheers,
Conor.
On Tue, 23 Jan 2024 01:05:16 +0800
Chen-Yu Tsai <[email protected]> wrote:
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware found on the H6 supports both transmit and receive
> functions. However it is missing the RX DMA channel.
>
> Add the SPDIF hardware block's RX DMA channel. Also remove the
> by-default pinmux, since the end device can choose to implement
> either or both functionalities.
>
> Fixes: f95b598df419 ("arm64: dts: allwinner: Add SPDIF node for Allwinner H6")
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Looks alright, just moving lines around, order of rx, tx DMA is correct:
Reviewed-by: Andre Przywara <[email protected]>
Cheers,
Andre
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 ++
> arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi | 2 ++
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 7 +++----
> 3 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> index 9ec49ac2f6fd..381d58cea092 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> @@ -291,6 +291,8 @@ sw {
> };
>
> &spdif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spdif_tx_pin>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
> index 4903d6358112..855b7d43bc50 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
> @@ -166,6 +166,8 @@ &r_ir {
> };
>
> &spdif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spdif_tx_pin>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index ca1d287a0a01..d11e5041bae9 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -406,6 +406,7 @@ spi1_cs_pin: spi1-cs-pin {
> function = "spi1";
> };
>
> + /omit-if-no-ref/
> spdif_tx_pin: spdif-tx-pin {
> pins = "PH7";
> function = "spdif";
> @@ -655,10 +656,8 @@ spdif: spdif@5093000 {
> clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
> clock-names = "apb", "spdif";
> resets = <&ccu RST_BUS_SPDIF>;
> - dmas = <&dma 2>;
> - dma-names = "tx";
> - pinctrl-names = "default";
> - pinctrl-0 = <&spdif_tx_pin>;
> + dmas = <&dma 2>, <&dma 2>;
> + dma-names = "rx", "tx";
> status = "disabled";
> };
>
On Tue, 23 Jan 2024 01:05:18 +0800
Chen-Yu Tsai <[email protected]> wrote:
Hi,
> From: Chen-Yu Tsai <[email protected]>
>
> The H616 SoC has an SPDIF transmitter hardware block, which has the same
> layout as the one in the H6, minus the receiver side.
>
> Add a device node for it, and a default pinmux.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Compared the details against the manual, the clock driver, and the
binding, they match:
Reviewed-by: Andre Przywara <[email protected]>
Cheers,
Andre
> ---
> .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 20 +++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> index a0268439f3be..fd4c080b8e62 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> @@ -253,6 +253,11 @@ spi1_cs0_pin: spi1-cs0-pin {
> function = "spi1";
> };
>
> + spdif_tx_pin: spdif-tx-pin {
> + pins = "PH4";
> + function = "spdif";
> + };
> +
> uart0_ph_pins: uart0-ph-pins {
> pins = "PH0", "PH1";
> function = "uart0";
> @@ -550,6 +555,21 @@ mdio0: mdio {
> };
> };
>
> + spdif: spdif@5093000 {
> + compatible = "allwinner,sun50i-h616-spdif";
> + reg = <0x05093000 0x400>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>;
> + clock-names = "apb", "spdif";
> + resets = <&ccu RST_BUS_SPDIF>;
> + dmas = <&dma 2>;
> + dma-names = "tx";
> + pinctrl-names = "default";
> + pinctrl-0 = <&spdif_tx_pin>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> usbotg: usb@5100000 {
> compatible = "allwinner,sun50i-h616-musb",
> "allwinner,sun8i-h3-musb";
On Tue, 23 Jan 2024 01:05:14 +0800
Chen-Yu Tsai <[email protected]> wrote:
Hi Chen-Yu,
thanks for posting this!
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware block found in the H616 SoC has the same layout as
> the one found in the H6 SoC, except that it is missing the receiver
> side.
>
> Since the driver currently only supports the transmit function, support
> for the H616 is identical to what is currently done for the H6.
I compared the OWA manual sections of the H6 and the H616 manuals, and
can confirm that indeed the H616 is the same as the H6, minus the RX
part:
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Cheers,
Andre
> ---
> sound/soc/sunxi/sun4i-spdif.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
> index 702386823d17..f41c30955857 100644
> --- a/sound/soc/sunxi/sun4i-spdif.c
> +++ b/sound/soc/sunxi/sun4i-spdif.c
> @@ -577,6 +577,11 @@ static const struct of_device_id sun4i_spdif_of_match[] = {
> .compatible = "allwinner,sun50i-h6-spdif",
> .data = &sun50i_h6_spdif_quirks,
> },
> + {
> + .compatible = "allwinner,sun50i-h616-spdif",
> + /* Essentially the same as the H6, but without RX */
> + .data = &sun50i_h6_spdif_quirks,
> + },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
On Tue, 23 Jan 2024 01:05:17 +0800
Chen-Yu Tsai <[email protected]> wrote:
> From: Chen-Yu Tsai <[email protected]>
>
> The DMA controllers found on the H616 and H618 are the same as the one
> found on the H6. The only difference is the DMA endpoint (DRQ) layout.
>
> Add a device node for it, and add DMA channels for existing peripherals.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
> ---
> .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 39 +++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> index d549d277d972..a0268439f3be 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> @@ -133,6 +133,19 @@ ccu: clock@3001000 {
> #reset-cells = <1>;
> };
>
> + dma: dma-controller@3002000 {
> + compatible = "allwinner,sun50i-h616-dma",
> + "allwinner,sun50i-h6-dma";
This should include the A100, to cover 34 bits of address space, see
the binding patch comment.
> + reg = <0x03002000 0x1000>;
> + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>;
> + clock-names = "bus", "mbus";
> + dma-channels = <16>;
> + dma-requests = <49>;
> + resets = <&ccu RST_BUS_DMA>;
> + #dma-cells = <1>;
I compared those bits against the manual and the clock driver: they are
correct.
> + };
> +
> sid: efuse@3006000 {
> compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid";
> reg = <0x03006000 0x1000>;
> @@ -339,6 +352,8 @@ uart0: serial@5000000 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART0>;
> + dmas = <&dma 14>, <&dma 14>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART0>;
> status = "disabled";
> };
> @@ -350,6 +365,8 @@ uart1: serial@5000400 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART1>;
> + dmas = <&dma 15>, <&dma 15>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART1>;
> status = "disabled";
> };
> @@ -361,6 +378,8 @@ uart2: serial@5000800 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART2>;
> + dmas = <&dma 16>, <&dma 16>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART2>;
> status = "disabled";
> };
> @@ -372,6 +391,8 @@ uart3: serial@5000c00 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART3>;
> + dmas = <&dma 17>, <&dma 17>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART3>;
> status = "disabled";
> };
> @@ -383,6 +404,8 @@ uart4: serial@5001000 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART4>;
> + dmas = <&dma 18>, <&dma 18>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART4>;
> status = "disabled";
> };
> @@ -394,6 +417,8 @@ uart5: serial@5001400 {
> reg-shift = <2>;
> reg-io-width = <4>;
> clocks = <&ccu CLK_BUS_UART5>;
> + dmas = <&dma 19>, <&dma 19>;
> + dma-names = "tx", "rx";
> resets = <&ccu RST_BUS_UART5>;
> status = "disabled";
> };
> @@ -405,6 +430,8 @@ i2c0: i2c@5002000 {
> reg = <0x05002000 0x400>;
> interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_I2C0>;
> + dmas = <&dma 43>, <&dma 43>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_I2C0>;
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins>;
> @@ -420,6 +447,8 @@ i2c1: i2c@5002400 {
> reg = <0x05002400 0x400>;
> interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_I2C1>;
> + dmas = <&dma 44>, <&dma 44>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_I2C1>;
> status = "disabled";
> #address-cells = <1>;
> @@ -433,6 +462,8 @@ i2c2: i2c@5002800 {
> reg = <0x05002800 0x400>;
> interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_I2C2>;
> + dmas = <&dma 45>, <&dma 45>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_I2C2>;
> status = "disabled";
> #address-cells = <1>;
> @@ -446,6 +477,8 @@ i2c3: i2c@5002c00 {
> reg = <0x05002c00 0x400>;
> interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_I2C3>;
> + dmas = <&dma 46>, <&dma 46>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_I2C3>;
> status = "disabled";
> #address-cells = <1>;
> @@ -459,6 +492,8 @@ i2c4: i2c@5003000 {
> reg = <0x05003000 0x400>;
> interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_I2C4>;
> + dmas = <&dma 47>, <&dma 47>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_I2C4>;
> status = "disabled";
> #address-cells = <1>;
The manual mentions "S_TWI0" using port48, so should we add dma
properties to the r_i2c node as well?
I compared all the other port numbers against the manual, they match.
Cheers,
Andre
i
> @@ -472,6 +507,8 @@ spi0: spi@5010000 {
> interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> clock-names = "ahb", "mod";
> + dmas = <&dma 22>, <&dma 22>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_SPI0>;
> status = "disabled";
> #address-cells = <1>;
> @@ -485,6 +522,8 @@ spi1: spi@5011000 {
> interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
> clock-names = "ahb", "mod";
> + dmas = <&dma 23>, <&dma 23>;
> + dma-names = "rx", "tx";
> resets = <&ccu RST_BUS_SPI1>;
> status = "disabled";
> #address-cells = <1>;
Dne ponedeljek, 22. januar 2024 ob 18:05:13 CET je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware block found in the H616 SoC has the same layout as
> the one found in the H6 SoC, except that it is missing the receiver
> side.
>
> Add a new compatible string for it.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej
Dne ponedeljek, 22. januar 2024 ob 18:05:14 CET je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware block found in the H616 SoC has the same layout as
> the one found in the H6 SoC, except that it is missing the receiver
> side.
>
> Since the driver currently only supports the transmit function, support
> for the H616 is identical to what is currently done for the H6.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej
Dne ponedeljek, 22. januar 2024 ob 18:05:18 CET je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <[email protected]>
>
> The H616 SoC has an SPDIF transmitter hardware block, which has the same
> layout as the one in the H6, minus the receiver side.
>
> Add a device node for it, and a default pinmux.
>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej
Dne ponedeljek, 22. januar 2024 ob 18:05:16 CET je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <[email protected]>
>
> The SPDIF hardware found on the H6 supports both transmit and receive
> functions. However it is missing the RX DMA channel.
>
> Add the SPDIF hardware block's RX DMA channel. Also remove the
> by-default pinmux, since the end device can choose to implement
> either or both functionalities.
>
> Fixes: f95b598df419 ("arm64: dts: allwinner: Add SPDIF node for Allwinner H6")
> Signed-off-by: Chen-Yu Tsai <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej