From: Jan Kiszka <[email protected]>
This adds the missing num-viewport, phys and phy-name properties to the
schema. Based on driver code, num-viewport is required for the root
complex, phys are optional. Their number corresponds to the number of
lanes. The AM65x supports up to 2 lanes.
Signed-off-by: Jan Kiszka <[email protected]>
---
.../bindings/pci/ti,am65-pci-host.yaml | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
index a20dccbafd94..cdd6834f6a6f 100644
--- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
@@ -55,6 +55,20 @@ properties:
dma-coherent: true
+ num-viewport:
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ phys:
+ description: per-lane PHYs
+ minItems: 1
+ maxItems: 2
+
+ phy-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ pattern: '^pcie-phy[0-9]+$'
+
required:
- compatible
- reg
@@ -74,6 +88,7 @@ then:
- dma-coherent
- power-domains
- msi-map
+ - num-viewport
unevaluatedProperties: false
@@ -98,9 +113,13 @@ examples:
ti,syscon-pcie-id = <&scm_conf 0x0210>;
ti,syscon-pcie-mode = <&scm_conf 0x4060>;
bus-range = <0x0 0xff>;
+ num-viewport = <16>;
max-link-speed = <2>;
dma-coherent;
interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
msi-map = <0x0 &gic_its 0x0 0x10000>;
device_type = "pci";
+ num-lanes = <1>;
+ phys = <&serdes0 PHY_TYPE_PCIE 0>;
+ phy-names = "pcie-phy0";
};
--
2.35.3
On Thu, 15 Feb 2024 09:14:47 +0100, Jan Kiszka wrote:
> From: Jan Kiszka <[email protected]>
>
> This adds the missing num-viewport, phys and phy-name properties to the
> schema. Based on driver code, num-viewport is required for the root
> complex, phys are optional. Their number corresponds to the number of
> lanes. The AM65x supports up to 2 lanes.
>
> Signed-off-by: Jan Kiszka <[email protected]>
> ---
> .../bindings/pci/ti,am65-pci-host.yaml | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/pci/ti,am65-pci-host.example.dts:50.30-31 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/pci/ti,am65-pci-host.example.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1428: dt_binding_check] Error 2
make: *** [Makefile:240: __sub-make] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On Thu, Feb 15, 2024 at 09:14:47AM +0100, Jan Kiszka wrote:
> From: Jan Kiszka <[email protected]>
>
> This adds the missing num-viewport, phys and phy-name properties to the
> schema. Based on driver code, num-viewport is required for the root
> complex, phys are optional. Their number corresponds to the number of
> lanes. The AM65x supports up to 2 lanes.
This is DW controller, right? num-viewport shouldn't be required. The
number of iATU entries is determined at runtime now. If it stays, it
should be deprecated.
>
> Signed-off-by: Jan Kiszka <[email protected]>
> ---
> .../bindings/pci/ti,am65-pci-host.yaml | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> index a20dccbafd94..cdd6834f6a6f 100644
> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
> @@ -55,6 +55,20 @@ properties:
>
> dma-coherent: true
>
> + num-viewport:
> + $ref: /schemas/types.yaml#/definitions/uint32
> +
> + phys:
> + description: per-lane PHYs
> + minItems: 1
> + maxItems: 2
> +
> + phy-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + pattern: '^pcie-phy[0-9]+$'
0-1 only
> +
> required:
> - compatible
> - reg
> @@ -74,6 +88,7 @@ then:
> - dma-coherent
> - power-domains
> - msi-map
> + - num-viewport
>
> unevaluatedProperties: false
>
> @@ -98,9 +113,13 @@ examples:
> ti,syscon-pcie-id = <&scm_conf 0x0210>;
> ti,syscon-pcie-mode = <&scm_conf 0x4060>;
> bus-range = <0x0 0xff>;
> + num-viewport = <16>;
> max-link-speed = <2>;
> dma-coherent;
> interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
> msi-map = <0x0 &gic_its 0x0 0x10000>;
> device_type = "pci";
> + num-lanes = <1>;
> + phys = <&serdes0 PHY_TYPE_PCIE 0>;
> + phy-names = "pcie-phy0";
> };
> --
> 2.35.3
On 15.02.24 13:10, Rob Herring wrote:
> On Thu, Feb 15, 2024 at 09:14:47AM +0100, Jan Kiszka wrote:
>> From: Jan Kiszka <[email protected]>
>>
>> This adds the missing num-viewport, phys and phy-name properties to the
>> schema. Based on driver code, num-viewport is required for the root
>> complex, phys are optional. Their number corresponds to the number of
>> lanes. The AM65x supports up to 2 lanes.
>
> This is DW controller, right? num-viewport shouldn't be required. The
> number of iATU entries is determined at runtime now. If it stays, it
> should be deprecated.
>
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=fcde397422ef621e52dac509e253d5e8a8f43b23
You likely better understand than I what the state of all that is, but
that is how it looks like today and how the DTS are written, have to be
written.
>>
>> Signed-off-by: Jan Kiszka <[email protected]>
>> ---
>> .../bindings/pci/ti,am65-pci-host.yaml | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> index a20dccbafd94..cdd6834f6a6f 100644
>> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml
>> @@ -55,6 +55,20 @@ properties:
>>
>> dma-coherent: true
>>
>> + num-viewport:
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> +
>> + phys:
>> + description: per-lane PHYs
>> + minItems: 1
>> + maxItems: 2
>> +
>> + phy-names:
>> + minItems: 1
>> + maxItems: 2
>> + items:
>> + pattern: '^pcie-phy[0-9]+$'
>
> 0-1 only
>
Good point, fixing up, just like the example build failure.
Thanks,
Jan
>> +
>> required:
>> - compatible
>> - reg
>> @@ -74,6 +88,7 @@ then:
>> - dma-coherent
>> - power-domains
>> - msi-map
>> + - num-viewport
>>
>> unevaluatedProperties: false
>>
>> @@ -98,9 +113,13 @@ examples:
>> ti,syscon-pcie-id = <&scm_conf 0x0210>;
>> ti,syscon-pcie-mode = <&scm_conf 0x4060>;
>> bus-range = <0x0 0xff>;
>> + num-viewport = <16>;
>> max-link-speed = <2>;
>> dma-coherent;
>> interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
>> msi-map = <0x0 &gic_its 0x0 0x10000>;
>> device_type = "pci";
>> + num-lanes = <1>;
>> + phys = <&serdes0 PHY_TYPE_PCIE 0>;
>> + phy-names = "pcie-phy0";
>> };
>> --
>> 2.35.3
--
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