R528 and T113 are SoCs based on the same design as D1/D1s, but with ARM
CPUs instead of RISC-V. They use the same CCU implementation, meaning
the CCU has gates/resets for all peripherals present on any SoC in this
family. I verified the CAN bus bits are also present on D1/D1s.
Patches 1-2 clean up the Kconfig in preparation for patch 3, which
allows building the driver. Patches 4-6 add the missing binding header
and driver bits.
Changes in v2:
- Expand commit message
- Move dt-bindings header changes to a separate patch
András Szemző (1):
clk: sunxi-ng: d1: Mark cpux clock as critical
Fabien Poussin (1):
clk: sunxi-ng: d1: Add CAN bus gates and resets
Samuel Holland (4):
clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies
clk: sunxi-ng: Move SoC driver conditions to dependencies
clk: sunxi-ng: d1: Allow building for R528/T113
dt-bindings: clock: Add D1 CAN bus gates and resets
drivers/clk/sunxi-ng/Kconfig | 71 ++++++++++++-----------
drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 13 ++++-
drivers/clk/sunxi-ng/ccu-sun20i-d1.h | 2 +-
include/dt-bindings/clock/sun20i-d1-ccu.h | 2 +
include/dt-bindings/reset/sun20i-d1-ccu.h | 2 +
5 files changed, 53 insertions(+), 37 deletions(-)
--
2.37.4
Do not duplicate the same expression on the `default` line, so the two
lines do not need to be kept in sync. Drivers stay disabled under
COMPILE_TEST because of the `default ARCH_SUNXI` applied to SUNXI_CCU.
Three drivers had no conditions.
- SUN6I_RTC_CCU and SUN8I_DE2_CCU are used on current hardware
regardless of CPU architecture.
- SUN8I_R_CCU is only used on pre-H6 SoCs, which means no RISCV SoCs.
Acked-by: Jernej Skrabec <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
---
(no changes since v1)
drivers/clk/sunxi-ng/Kconfig | 46 +++++++++++++++++++-----------------
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index 64cfa022e320..78deee2996ce 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -9,111 +9,113 @@ if SUNXI_CCU
config SUNIV_F1C100S_CCU
tristate "Support for the Allwinner newer F1C100s CCU"
- default MACH_SUNIV
+ default y
depends on MACH_SUNIV || COMPILE_TEST
config SUN20I_D1_CCU
tristate "Support for the Allwinner D1 CCU"
- default RISCV
+ default y
depends on RISCV || COMPILE_TEST
config SUN20I_D1_R_CCU
tristate "Support for the Allwinner D1 PRCM CCU"
- default RISCV
+ default y
depends on RISCV || COMPILE_TEST
config SUN50I_A64_CCU
tristate "Support for the Allwinner A64 CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN50I_A100_CCU
tristate "Support for the Allwinner A100 CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN50I_A100_R_CCU
tristate "Support for the Allwinner A100 PRCM CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN50I_H6_CCU
tristate "Support for the Allwinner H6 CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN50I_H616_CCU
tristate "Support for the Allwinner H616 CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN50I_H6_R_CCU
tristate "Support for the Allwinner H6 and H616 PRCM CCU"
- default ARM64
+ default y
depends on ARM64 || COMPILE_TEST
config SUN4I_A10_CCU
tristate "Support for the Allwinner A10/A20 CCU"
- default MACH_SUN4I
- default MACH_SUN7I
+ default y
depends on MACH_SUN4I || MACH_SUN7I || COMPILE_TEST
config SUN5I_CCU
bool "Support for the Allwinner sun5i family CCM"
- default MACH_SUN5I
+ default y
depends on MACH_SUN5I || COMPILE_TEST
depends on SUNXI_CCU=y
config SUN6I_A31_CCU
tristate "Support for the Allwinner A31/A31s CCU"
- default MACH_SUN6I
+ default y
depends on MACH_SUN6I || COMPILE_TEST
config SUN6I_RTC_CCU
tristate "Support for the Allwinner H616/R329 RTC CCU"
default y
+ depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
config SUN8I_A23_CCU
tristate "Support for the Allwinner A23 CCU"
- default MACH_SUN8I
+ default y
depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_A33_CCU
tristate "Support for the Allwinner A33 CCU"
- default MACH_SUN8I
+ default y
depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_A83T_CCU
tristate "Support for the Allwinner A83T CCU"
- default MACH_SUN8I
+ default y
depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_H3_CCU
tristate "Support for the Allwinner H3 CCU"
- default MACH_SUN8I || ARM64
+ default y
depends on MACH_SUN8I || ARM64 || COMPILE_TEST
config SUN8I_V3S_CCU
tristate "Support for the Allwinner V3s CCU"
- default MACH_SUN8I
+ default y
depends on MACH_SUN8I || COMPILE_TEST
config SUN8I_DE2_CCU
tristate "Support for the Allwinner SoCs DE2 CCU"
- default MACH_SUN8I || ARM64
+ default y
+ depends on MACH_SUN8I || ARM64 || RISCV || COMPILE_TEST
config SUN8I_R40_CCU
tristate "Support for the Allwinner R40 CCU"
- default MACH_SUN8I
+ default y
depends on MACH_SUN8I || COMPILE_TEST
config SUN9I_A80_CCU
tristate "Support for the Allwinner A80 CCU"
- default MACH_SUN9I
+ default y
depends on MACH_SUN9I || COMPILE_TEST
config SUN8I_R_CCU
tristate "Support for Allwinner SoCs' PRCM CCUs"
- default MACH_SUN8I || ARM64
+ default y
+ depends on MACH_SUN8I || ARM64 || COMPILE_TEST
endif
--
2.37.4
From: Fabien Poussin <[email protected]>
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.
Signed-off-by: Fabien Poussin <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
---
Changes in v2:
- Move dt-bindings header changes to a separate patch
drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 11 +++++++++++
drivers/clk/sunxi-ng/ccu-sun20i-d1.h | 2 +-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
index c5a7df93602c..48a8fb2c43b7 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c
@@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws,
static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws,
0x91c, BIT(3), 0);
+static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws,
+ 0x92c, BIT(0), 0);
+static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws,
+ 0x92c, BIT(1), 0);
+
static const struct clk_parent_data spi_parents[] = {
{ .fw_name = "hosc" },
{ .hw = &pll_periph0_clk.hw },
@@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = {
&bus_i2c1_clk.common,
&bus_i2c2_clk.common,
&bus_i2c3_clk.common,
+ &bus_can0_clk.common,
+ &bus_can1_clk.common,
&spi0_clk.common,
&spi1_clk.common,
&bus_spi0_clk.common,
@@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = {
[CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
[CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw,
[CLK_BUS_I2C3] = &bus_i2c3_clk.common.hw,
+ [CLK_BUS_CAN0] = &bus_can0_clk.common.hw,
+ [CLK_BUS_CAN1] = &bus_can1_clk.common.hw,
[CLK_SPI0] = &spi0_clk.common.hw,
[CLK_SPI1] = &spi1_clk.common.hw,
[CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
@@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = {
[RST_BUS_I2C1] = { 0x91c, BIT(17) },
[RST_BUS_I2C2] = { 0x91c, BIT(18) },
[RST_BUS_I2C3] = { 0x91c, BIT(19) },
+ [RST_BUS_CAN0] = { 0x92c, BIT(16) },
+ [RST_BUS_CAN1] = { 0x92c, BIT(17) },
[RST_BUS_SPI0] = { 0x96c, BIT(16) },
[RST_BUS_SPI1] = { 0x96c, BIT(17) },
[RST_BUS_EMAC] = { 0x97c, BIT(16) },
diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
index e303176f0d4e..b14da36e2537 100644
--- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
+++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.h
@@ -10,6 +10,6 @@
#include <dt-bindings/clock/sun20i-d1-ccu.h>
#include <dt-bindings/reset/sun20i-d1-ccu.h>
-#define CLK_NUMBER (CLK_FANOUT2 + 1)
+#define CLK_NUMBER (CLK_BUS_CAN1 + 1)
#endif /* _CCU_SUN20I_D1_H_ */
--
2.37.4
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
---
Changes in v2:
- Move dt-bindings header changes to a separate patch
include/dt-bindings/clock/sun20i-d1-ccu.h | 2 ++
include/dt-bindings/reset/sun20i-d1-ccu.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h b/include/dt-bindings/clock/sun20i-d1-ccu.h
index e3ac53315e1a..e143b9929763 100644
--- a/include/dt-bindings/clock/sun20i-d1-ccu.h
+++ b/include/dt-bindings/clock/sun20i-d1-ccu.h
@@ -152,5 +152,7 @@
#define CLK_FANOUT0 142
#define CLK_FANOUT1 143
#define CLK_FANOUT2 144
+#define CLK_BUS_CAN0 145
+#define CLK_BUS_CAN1 146
#endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */
diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h
index de9ff5203239..f8001cf50bf1 100644
--- a/include/dt-bindings/reset/sun20i-d1-ccu.h
+++ b/include/dt-bindings/reset/sun20i-d1-ccu.h
@@ -73,5 +73,7 @@
#define RST_BUS_DSP_CFG 63
#define RST_BUS_DSP_DBG 64
#define RST_BUS_RISCV_CFG 65
+#define RST_BUS_CAN0 66
+#define RST_BUS_CAN1 67
#endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */
--
2.37.4
On 01/01/2023 00:14, Samuel Holland wrote:
> The D1 CCU contains gates and resets for two CAN buses. While the CAN
> bus controllers are only documented for the T113 SoC, the CCU is the
> same across all SoC variants.
>
> Reviewed-by: Andre Przywara <[email protected]>
> Signed-off-by: Samuel Holland <[email protected]>
> ---
>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Sat, Dec 31, 2022 at 05:14:28PM -0600, Samuel Holland wrote:
> The D1 CCU contains gates and resets for two CAN buses. While the CAN
> bus controllers are only documented for the T113 SoC, the CCU is the
> same across all SoC variants.
>
> Reviewed-by: Andre Przywara <[email protected]>
> Signed-off-by: Samuel Holland <[email protected]>
[...]
> diff --git a/include/dt-bindings/reset/sun20i-d1-ccu.h b/include/dt-bindings/reset/sun20i-d1-ccu.h
> index de9ff5203239..f8001cf50bf1 100644
> --- a/include/dt-bindings/reset/sun20i-d1-ccu.h
> +++ b/include/dt-bindings/reset/sun20i-d1-ccu.h
> @@ -73,5 +73,7 @@
> #define RST_BUS_DSP_CFG 63
> #define RST_BUS_DSP_DBG 64
> #define RST_BUS_RISCV_CFG 65
> +#define RST_BUS_CAN0 66
> +#define RST_BUS_CAN1 67
Acked-by: Philipp Zabel <[email protected]>
regards
Philipp
Dne nedelja, 01. januar 2023 ob 00:14:29 CET je Samuel Holland napisal(a):
> From: Fabien Poussin <[email protected]>
>
> The D1 CCU contains gates and resets for two CAN buses. While the CAN
> bus controllers are only documented for the T113 SoC, the CCU is the
> same across all SoC variants.
>
> Signed-off-by: Fabien Poussin <[email protected]>
> Reviewed-by: Andre Przywara <[email protected]>
> Signed-off-by: Samuel Holland <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Best regards,
Jernej
Dne nedelja, 01. januar 2023 ob 00:14:23 CET je Samuel Holland napisal(a):
> R528 and T113 are SoCs based on the same design as D1/D1s, but with ARM
> CPUs instead of RISC-V. They use the same CCU implementation, meaning
> the CCU has gates/resets for all peripherals present on any SoC in this
> family. I verified the CAN bus bits are also present on D1/D1s.
>
> Patches 1-2 clean up the Kconfig in preparation for patch 3, which
> allows building the driver. Patches 4-6 add the missing binding header
> and driver bits.
>
> Changes in v2:
> - Expand commit message
> - Move dt-bindings header changes to a separate patch
>
> András Szemző (1):
> clk: sunxi-ng: d1: Mark cpux clock as critical
>
> Fabien Poussin (1):
> clk: sunxi-ng: d1: Add CAN bus gates and resets
>
> Samuel Holland (4):
> clk: sunxi-ng: Remove duplicate ARCH_SUNXI dependencies
> clk: sunxi-ng: Move SoC driver conditions to dependencies
> clk: sunxi-ng: d1: Allow building for R528/T113
> dt-bindings: clock: Add D1 CAN bus gates and resets
>
> drivers/clk/sunxi-ng/Kconfig | 71 ++++++++++++-----------
> drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 13 ++++-
> drivers/clk/sunxi-ng/ccu-sun20i-d1.h | 2 +-
> include/dt-bindings/clock/sun20i-d1-ccu.h | 2 +
> include/dt-bindings/reset/sun20i-d1-ccu.h | 2 +
> 5 files changed, 53 insertions(+), 37 deletions(-)
Applied, thanks!
Best regards,
Jernej