Hi Jaafar,
On 8/5/19 15:27, Jaafar Ali wrote:
> Dear All,
> Kernel 5.3-rc1
> OS: ubuntu 18.04
> Hardware: Odroid-XU4
> The sound of Odroid-XU4 after suspend/resume cycle is choppy and slow.
> I have found a workaround, the I2SMOD register value should be set to
> zero after resume to force using internal codec clock (cdclkcon bit = 0),
> also the rclk_srcrate which is obtained from the function
> *clk_get_rate(rclksrc) *inside *hw_params* function is not correct and
> must be divided by 2 to obtain proper value, i2s_resume function
> is modified to:
>
> static int i2s_resume(struct snd_soc_dai *dai)
> {
> struct samsung_i2s_priv *priv = dev_get_drvdata(dai->dev);
> priv->suspend_i2smod = 0;//workaround-1 ,
> return pm_runtime_force_resume(dai->dev);
>
> }
>
> inside hw_params function, the rclk_srcrate must be halved to solve
> unknown problem of clock shift, so before return from hw_params we
> must insert:
> if(mod == 0){
> priv->rclk_srcrate = priv->rclk_srcrate / 2; //workaround-2,
> }
>
> With these two workaround sound issue was solved, but I hope we can
> get concrete fix.
Thank you for the bug report. I spent some time on debugging this and
it turned out that there is a clock mux between EPLL and the audio
subsystem which looses its configuration during suspend/resume cycle.
So we end up with the I2S controller clocked from the main oscillator
clock (24 MHz) rather than the EPLL (196.608 MHz) after system suspend/
resume. I will post a patch for clk-exynos5420 driver shortly.
--
Regards,
Sylwester
On 8/7/19 10:22, Sylwester Nawrocki wrote:
> On 8/5/19 15:27, Jaafar Ali wrote:
>> Dear All,
>> Kernel 5.3-rc1
>> OS: ubuntu 18.04
>> Hardware: Odroid-XU4
>> The sound of Odroid-XU4 after suspend/resume cycle is choppy and slow.
>> I have found a workaround, the I2SMOD register value should be set to
>> zero after resume to force using internal codec clock (cdclkcon bit = 0),
>> also the rclk_srcrate which is obtained from the function
>> *clk_get_rate(rclksrc) *inside *hw_params* function is not correct and
>> must be divided by 2 to obtain proper value, i2s_resume function
>> is modified to:
>>
>> static int i2s_resume(struct snd_soc_dai *dai)
>> {
>> struct samsung_i2s_priv *priv = dev_get_drvdata(dai->dev);
>> priv->suspend_i2smod = 0;//workaround-1 ,
>> return pm_runtime_force_resume(dai->dev);
>>
>> }
>>
>> inside hw_params function, the rclk_srcrate must be halved to solve
>> unknown problem of clock shift, so before return from hw_params we
>> must insert:
>> if(mod == 0){
>> priv->rclk_srcrate = priv->rclk_srcrate / 2; //workaround-2,
>> }
>>
>> With these two workaround sound issue was solved, but I hope we can
>> get concrete fix.
> Thank you for the bug report. I spent some time on debugging this and
> it turned out that there is a clock mux between EPLL and the audio
> subsystem which looses its configuration during suspend/resume cycle.
> So we end up with the I2S controller clocked from the main oscillator
> clock (24 MHz) rather than the EPLL (196.608 MHz) after system suspend/
> resume. I will post a patch for clk-exynos5420 driver shortly.
My apologies, I forgot to add you at Cc of related patches, they are
available at patchwork:
https://patchwork.kernel.org/patch/11082423
https://patchwork.kernel.org/patch/11082427
Could you try and test and let me know if that fixes your issue?
--
Thanks,
Sylwester