2022-07-28 11:32:02

by Shinjo Park

Subject: [PATCH 2/3] ARM: dts: qcom: msm8960: add references to USB1

Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.

Signed-off-by: Shinjo Park <[email protected]>
Reviewed-by: David Heidelberg <[email protected]>
---
arch/arm/boot/dts/qcom-msm8960.dtsi | 32 +++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index 991eb1948..a32073d61 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,lcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h>

@@ -201,6 +202,37 @@ regulators {
};
};

+ usb1: usb@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x200>,
+ <0x12500200 0x200>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+ assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
+ assigned-clock-rates = <60000000>;
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "core";
+ phy_type = "ulpi";
+ ahb-burst-config = <0>;
+ phys = <&usb_hs1_phy>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ #reset-cells = <1>;
+
+ ulpi {
+ usb_hs1_phy: phy {
+ compatible = "qcom,usb-hs-phy-msm8960",
+ "qcom,usb-hs-phy";
+ clocks = <&sleep_clk>, <&cxo_board>;
+ clock-names = "sleep", "ref";
+ resets = <&usb1 0>;
+ reset-names = "por";
+ #phy-cells = <0>;
+ };
+ };
+ };
+
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
--
2.34.1

2022-07-28 12:18:20

by Krzysztof Kozlowski

Subject: Re: [PATCH 2/3] ARM: dts: qcom: msm8960: add references to USB1

On 28/07/2022 13:16, Shinjo Park wrote:
> Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.
>
> Signed-off-by: Shinjo Park <[email protected]>
> Reviewed-by: David Heidelberg <[email protected]>

Thank you for your patch. There is something to discuss/improve.

Similar problems as with previous patch - thread your patches and how
did you get review?

> ---
> arch/arm/boot/dts/qcom-msm8960.dtsi | 32 +++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
> index 991eb1948..a32073d61 100644
> --- a/arch/arm/boot/dts/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
> @@ -4,6 +4,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> #include <dt-bindings/clock/qcom,lcc-msm8960.h>
> +#include <dt-bindings/reset/qcom,gcc-msm8960.h>
> #include <dt-bindings/mfd/qcom-rpm.h>
> #include <dt-bindings/soc/qcom,gsbi.h>
>
> @@ -201,6 +202,37 @@ regulators {
> };
> };
>
> + usb1: usb@12500000 {
> + compatible = "qcom,ci-hdrc";
> + reg = <0x12500000 0x200>,
> + <0x12500200 0x200>;
> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
> + clock-names = "core", "iface";
> + assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
> + assigned-clock-rates = <60000000>;
> + resets = <&gcc USB_HS1_RESET>;
> + reset-names = "core";
> + phy_type = "ulpi";
> + ahb-burst-config = <0>;
> + phys = <&usb_hs1_phy>;
> + phy-names = "usb-phy";
> + status = "disabled";

status is the last property.

> + #reset-cells = <1>;



Best regards,
Krzysztof

2022-07-30 08:36:27

by Shinjo Park

Subject: [PATCH v2 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.

Signed-off-by: Shinjo Park <[email protected]>
Reviewed-by: David Heidelberg <[email protected]>
---

v2:
- Rewrite commit message
- Reorder status line

arch/arm/boot/dts/qcom-msm8960.dtsi | 32 +++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index e1f010c9643e..4c8a67c0cc7b 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,lcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h>

@@ -201,6 +202,37 @@ regulators {
};
};

+ usb1: usb@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x200>,
+ <0x12500200 0x200>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+ assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
+ assigned-clock-rates = <60000000>;
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "core";
+ phy_type = "ulpi";
+ ahb-burst-config = <0>;
+ phys = <&usb_hs1_phy>;
+ phy-names = "usb-phy";
+ #reset-cells = <1>;
+ status = "disabled";
+
+ ulpi {
+ usb_hs1_phy: phy {
+ compatible = "qcom,usb-hs-phy-msm8960",
+ "qcom,usb-hs-phy";
+ clocks = <&sleep_clk>, <&cxo_board>;
+ clock-names = "sleep", "ref";
+ resets = <&usb1 0>;
+ reset-names = "por";
+ #phy-cells = <0>;
+ };
+ };
+ };
+
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
--
2.34.1

2022-08-02 05:29:03

by Rudraksha Gupta

Subject: Re: [PATCH v2 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

> #include <dt-bindings/clock/qcom,lcc-msm8960.h>
Does not apply cleanly to mainline. Please include the above

2022-08-03 07:42:41

by Shinjo Park

Subject: Re: [PATCH v2 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

On 2022년 8월 2일 화요일 오전 7시 21분 54초 CEST Rudraksha Gupta wrote:
> > #include <dt-bindings/clock/qcom,lcc-msm8960.h>
>
> Does not apply cleanly to mainline. Please include the above

Will be fixed in the next revision of this patch.

2022-08-03 08:06:58

by Shinjo Park

Subject: [PATCH v3 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.

Signed-off-by: Shinjo Park <[email protected]>
Reviewed-by: David Heidelberg <[email protected]>
---

v3:
- Include missing clock/qcom,lcc-msm8960.h to make cleanly applicable

v2:
- Rewrite commit message
- Reorder status line

arch/arm/boot/dts/qcom-msm8960.dtsi | 33 +++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
index e14e1c5d1..0e099aa7c 100644
--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
@@ -3,6 +3,8 @@

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/clock/qcom,lcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h>

@@ -167,6 +169,37 @@ regulators {
};
};

+ usb1: usb@12500000 {
+ compatible = "qcom,ci-hdrc";
+ reg = <0x12500000 0x200>,
+ <0x12500200 0x200>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
+ clock-names = "core", "iface";
+ assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
+ assigned-clock-rates = <60000000>;
+ resets = <&gcc USB_HS1_RESET>;
+ reset-names = "core";
+ phy_type = "ulpi";
+ ahb-burst-config = <0>;
+ phys = <&usb_hs1_phy>;
+ phy-names = "usb-phy";
+ #reset-cells = <1>;
+ status = "disabled";
+
+ ulpi {
+ usb_hs1_phy: phy {
+ compatible = "qcom,usb-hs-phy-msm8960",
+ "qcom,usb-hs-phy";
+ clocks = <&sleep_clk>, <&cxo_board>;
+ clock-names = "sleep", "ref";
+ resets = <&usb1 0>;
+ reset-names = "por";
+ #phy-cells = <0>;
+ };
+ };
+ };
+
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
--
2.34.1

2022-08-09 22:04:57

by Bjorn Andersson

Subject: Re: [PATCH v3 2/3] ARM: dts: qcom: msm8960: add the device node of USB1

On Wed 03 Aug 02:46 CDT 2022, Shinjo Park wrote:

> Use the same USB definition as qcom-apq8064.dtsi, tested on Casio GzOne.
>

I think this looks good, but I have a v2 of patch 1 and a v3 of patch 2,
and I don't seem to have patch 3 in my inbox(?)

Can you please resubmit the 3 patches with a --cover-letter, instead of
each patch being a reply of the previous instance of that particular
patch? This will make it much easier for me to merge the end result.

Thanks,
Bjorn

> Signed-off-by: Shinjo Park <[email protected]>
> Reviewed-by: David Heidelberg <[email protected]>
> ---
>
> v3:
> - Include missing clock/qcom,lcc-msm8960.h to make cleanly applicable
>
> v2:
> - Rewrite commit message
> - Reorder status line
>
> arch/arm/boot/dts/qcom-msm8960.dtsi | 33 +++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi
> index e14e1c5d1..0e099aa7c 100644
> --- a/arch/arm/boot/dts/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
> @@ -3,6 +3,8 @@
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> +#include <dt-bindings/clock/qcom,lcc-msm8960.h>
> +#include <dt-bindings/reset/qcom,gcc-msm8960.h>
> #include <dt-bindings/mfd/qcom-rpm.h>
> #include <dt-bindings/soc/qcom,gsbi.h>
>
> @@ -167,6 +169,37 @@ regulators {
> };
> };
>
> + usb1: usb@12500000 {
> + compatible = "qcom,ci-hdrc";
> + reg = <0x12500000 0x200>,
> + <0x12500200 0x200>;
> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
> + clock-names = "core", "iface";
> + assigned-clocks = <&gcc USB_HS1_XCVR_CLK>;
> + assigned-clock-rates = <60000000>;
> + resets = <&gcc USB_HS1_RESET>;
> + reset-names = "core";
> + phy_type = "ulpi";
> + ahb-burst-config = <0>;
> + phys = <&usb_hs1_phy>;
> + phy-names = "usb-phy";
> + #reset-cells = <1>;
> + status = "disabled";
> +
> + ulpi {
> + usb_hs1_phy: phy {
> + compatible = "qcom,usb-hs-phy-msm8960",
> + "qcom,usb-hs-phy";
> + clocks = <&sleep_clk>, <&cxo_board>;
> + clock-names = "sleep", "ref";
> + resets = <&usb1 0>;
> + reset-names = "por";
> + #phy-cells = <0>;
> + };
> + };
> + };
> +
> acc0: clock-controller@2088000 {
> compatible = "qcom,kpss-acc-v1";
> reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
> --
> 2.34.1
>