From: Elad Nachman <[email protected]>
Add support for CN9130 and CN9131 COM Express Type 7 CPU
module boards by Marvell.
Add device tree bindings for this board.
Define these COM Express CPU modules as dtsi, and
provide a dtsi file for a carrier board (Marvell AC5X RD
COM Express type 7 carrier board).
This Carrier board only utilizes the PCIe link, hence no
special device / driver support is provided by this dtsi file.
Finally, add dts file for the combined carrier and CPU module.
v6:
1) Add cn9130 COM Express system
2) Drop with from compatibility name of COM Express system
3) Fix identation issues of dt bindings
v5:
1) List only carrier compatibility on carrier dtsi
2) Fix dt_bindings_check warnings using latest yamllint/dtschema
3) Fix subject lines to remove unnecessary wordings.
4) Remove dt bindings for standalone CPU modules
5) Move CN913x dt bindings to A7K dt bindings file
6) Fix dtbs_check warnings for dtb and bindings,
using latest yamllint/dtschema.
7) Move memory definition to main dts file, as memory
is socket based.
v4:
1) reorder patches - dt bindings before dts/dtsi files
2) correct description in dt bindings
3) separate dt bindings for CPU module, carrier and combination
4) make carrier board dts into dtsi, make dts for combination of
carrier and CPU module
5) correct compatibility strings and file names to use dashes
instead of underscores
v3:
1) Remove acronym which creates warnings for checkpatch.pl
2) Correct compatibility string for ac5x rd board
3) Add above compatibility string to dt bindings
4) update MAINTAINERS file with ac5 series dts files
5) remove memory property from carrier dts
6) add comment explaining that OOB RGMII ethernet port
connector and PHY are both on CPU module
v2:
1) add compatibility string for the board
2) remove unneeded hard-coded PHY LED blinking mode initialization
3) Split the CPU portion of the carrier board to
dtsi files, and define a dts file for the AC5X RD
carrier board.
Elad Nachman (3):
MAINTAINERS: add ac5 to list of maintained Marvell dts files
dt-bindings: arm64: add Marvell COM Express boards
arm64: dts: cn913x: add device trees for COM Express boards
.../bindings/arm/marvell/armada-7k-8k.yaml | 24 ++++
MAINTAINERS | 1 +
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../dts/marvell/ac5x-rd-carrier-cn9131.dts | 25 ++++
.../boot/dts/marvell/ac5x-rd-carrier.dtsi | 14 +++
.../dts/marvell/cn9130-db-comexpress.dtsi | 96 ++++++++++++++++
.../dts/marvell/cn9131-db-comexpress.dtsi | 108 ++++++++++++++++++
7 files changed, 269 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
--
2.25.1
From: Elad Nachman <[email protected]>
Add dt bindings for:
CN9130 COM Express CPU module
CN9131 COM Express CPU module
AC5X RD COM Express Type 7 carrier board.
AC5X RD COM Express board with a CN9131 COM Express Type 7 CPU module.
Signed-off-by: Elad Nachman <[email protected]>
---
.../bindings/arm/marvell/armada-7k-8k.yaml | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
index 52d78521e412..d00866aeaa8d 100644
--- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
@@ -60,4 +60,28 @@ properties:
- const: marvell,armada-ap807-quad
- const: marvell,armada-ap807
+ - description:
+ Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
+ Armada CN9130 COM Express CPU module
+ items:
+ - enum:
+ - marvell,cn9130-ac5x-carrier
+ - const: marvell,rd-ac5x-carrier
+ - const: marvell,cn9130-cpu-module
+ - const: marvell,cn9130
+ - const: marvell,armada-ap807-quad
+ - const: marvell,armada-ap807
+
+ - description:
+ Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
+ Armada CN9131 COM Express CPU module
+ items:
+ - enum:
+ - marvell,cn9131-ac5x-carrier
+ - const: marvell,rd-ac5x-carrier
+ - const: marvell,cn9131-cpu-module
+ - const: marvell,cn9131
+ - const: marvell,armada-ap807-quad
+ - const: marvell,armada-ap807
+
additionalProperties: true
--
2.25.1
From: Elad Nachman <[email protected]>
Add support for CN9130 and CN9131 COM Express Type 7 CPU
module boards by Marvell.
Define these COM Express CPU modules as dtsi and
provide a dtsi file for a carrier board (Marvell AC5X RD
COM Express type 7 carrier board).
This Carrier board only utilizes the PCIe link, hence no
special device / driver support is provided by this dtsi file.
Finally, provide a dts file for the com express carrier and
CPU module combination.
These COM Express boards differ from the existing CN913x DB
boards by the type of ethernet connection (RGMII),
the type of voltage regulators (not i2c expander based)
and the USB phy (not UTMI based).
Note - PHY + RGMII connector is OOB on CPU module.
CN9131 COM Express board is basically CN9130 COM Express board
with an additional CP115 I/O co-processor, which in this case
provides an additional USB host controller on the board.
Signed-off-by: Elad Nachman <[email protected]>
---
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../dts/marvell/ac5x-rd-carrier-cn9131.dts | 25 ++++
.../boot/dts/marvell/ac5x-rd-carrier.dtsi | 14 +++
.../dts/marvell/cn9130-db-comexpress.dtsi | 96 ++++++++++++++++
.../dts/marvell/cn9131-db-comexpress.dtsi | 108 ++++++++++++++++++
5 files changed, 244 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 79ac09b58a89..99b8cb3c49e1 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -26,4 +26,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb
dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
new file mode 100644
index 000000000000..e83b9ae379ec
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the AC5X RD Type 7 Com Express carrier board,
+ * Utilizing the CN913x COM Express CPU module board.
+ * This specific board only maintains a PCIe link with the CPU CPU module
+ * module, which does not require any special DTS definitions.
+ */
+
+#include "cn9131-db-comexpress.dtsi"
+#include "ac5x-rd-carrier.dtsi"
+
+/ {
+ model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board with CN9131 CPU module";
+ compatible = "marvell,cn9131-ac5x-carrier", "marvell,rd-ac5x-carrier",
+ "marvell,cn9131-cpu-module", "marvell,cn9131",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x2 0x00000000>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
new file mode 100644
index 000000000000..fd45d5582233
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the AC5X RD Type 7 Com Express carrier board,
+ * This specific board only maintains a PCIe link with the CPU CPU module
+ * module, which does not require any special DTS definitions.
+ */
+
+/ {
+ model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
+ compatible = "marvell,rd-ac5x-carrier";
+
+};
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
new file mode 100644
index 000000000000..028496ebc473
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9130-DB Com Express CPU module board.
+ */
+
+#include "cn9130-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9130-DB COM EXPRESS type 7 CPU module board";
+ compatible = "marvell,cn9130-cpu-module", "marvell,cn9130",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ status = "okay";
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
new file mode 100644
index 000000000000..6f3914bcfd01
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9131-DB Com Express CPU module board.
+ */
+
+#include "cn9131-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
+ compatible = "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn9130",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp1_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ status = "okay";
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp1_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp1_usb3_0_phy0>;
+ /* Generic PHY, providing serdes lanes */
+ phys = <&cp1_comphy3 1>;
+ phy-names = "usb";
+};
--
2.25.1
> +++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2023 Marvell International Ltd.
> + *
> + * Device tree for the AC5X RD Type 7 Com Express carrier board,
> + * Utilizing the CN913x COM Express CPU module board.
> + * This specific board only maintains a PCIe link with the CPU CPU module
> + * module, which does not require any special DTS definitions.
> + */
> +
> +#include "cn9131-db-comexpress.dtsi"
> +#include "ac5x-rd-carrier.dtsi"
> +
> +/ {
> + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board with CN9131 CPU module";
> + compatible = "marvell,cn9131-ac5x-carrier", "marvell,rd-ac5x-carrier",
> + "marvell,cn9131-cpu-module", "marvell,cn9131",
> + "marvell,armada-ap807-quad", "marvell,armada-ap807";
> diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
> new file mode 100644
> index 000000000000..fd45d5582233
> +/ {
> + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
> + compatible = "marvell,rd-ac5x-carrier";
Now i'm confused. What does rd mean?
I would expect RD mean Reference Design, and that is the complete
device in its box.
Yet, here you have RD for the carrier?
The box itself is called cn9131-ac5x-carrier?
This makes no sense to me.
Maybe i'm understanding this all wrong, and its the carrier which you
are producing a reference design for? The CPU module does not really
matter? I could use any off the shelf ComExpress 7 SOM. The bits you
are trying to sell are on the carrier? But since you are Marvell, you
don't want to recommend using an AMD ComExpress board when you happen
to also have CPU module which would work? But the CPU is not really
the point of this, its the carrier?
Andrew
On 27/11/2023 20:08, Elad Nachman wrote:
> From: Elad Nachman <[email protected]>
>
> Add dt bindings for:
> CN9130 COM Express CPU module
> CN9131 COM Express CPU module
> AC5X RD COM Express Type 7 carrier board.
> AC5X RD COM Express board with a CN9131 COM Express Type 7 CPU module.
>
I hope this time this was tested before sending.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
> -----Original Message-----
> From: Andrew Lunn <[email protected]>
> Sent: Tuesday, November 28, 2023 12:34 AM
> To: Elad Nachman <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Yuval Caduri
> <[email protected]>
> Subject: [EXT] Re: [PATCH v6 3/3] arm64: dts: cn913x: add device trees for
> COM Express boards
>
> External Email
>
> ----------------------------------------------------------------------
> > +++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
> > @@ -0,0 +1,25 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (C) 2023 Marvell International Ltd.
> > + *
> > + * Device tree for the AC5X RD Type 7 Com Express carrier board,
> > + * Utilizing the CN913x COM Express CPU module board.
> > + * This specific board only maintains a PCIe link with the CPU CPU
> > +module
> > + * module, which does not require any special DTS definitions.
> > + */
> > +
> > +#include "cn9131-db-comexpress.dtsi"
> > +#include "ac5x-rd-carrier.dtsi"
> > +
> > +/ {
> > + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier
> board with CN9131 CPU module";
> > + compatible = "marvell,cn9131-ac5x-carrier", "marvell,rd-ac5x-
> carrier",
> > + "marvell,cn9131-cpu-module", "marvell,cn9131",
> > + "marvell,armada-ap807-quad", "marvell,armada-
> ap807";
>
> > diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
> > b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
> > new file mode 100644
> > index 000000000000..fd45d5582233
>
> > +/ {
> > + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier
> board";
> > + compatible = "marvell,rd-ac5x-carrier";
>
> Now i'm confused. What does rd mean?
>
> I would expect RD mean Reference Design, and that is the complete device in
> its box.
AC5X RD can either work as you would expect, as a complete standalone box using the internal CPU, or you can move the switch on the back of the box to "external" mode, and connect via an external cable a kit which would allow it to use an external CPU COM Express module, mounted on top of an interposer kit.
>
> Yet, here you have RD for the carrier?
>
> The box itself is called cn9131-ac5x-carrier?
>
> This makes no sense to me.
>
> Maybe i'm understanding this all wrong, and its the carrier which you are
> producing a reference design for? The CPU module does not really matter? I
So in this case, once the switch is set to external as explained above, the AC5X RD becomes part of the carrier solution.
This is a development/reference solution, not a full commercial solution, hence it has the flexibility to be configured in different modes of operation.
> could use any off the shelf ComExpress 7 SOM. The bits you are trying to sell
Basically, yes. We have it validated versus few x86_64 system in our labs.
> are on the carrier? But since you are Marvell, you don't want to recommend
> using an AMD ComExpress board when you happen to also have CPU
To the best of my knowledge, we did not validate specifically against AMD COM Express solutions.
Since some of these modules utilize non-standard implementation of the COM Express standard (for example, few AMD CPUs do not have 10G signals, hence few AMD COM Express designs drive PCIe signals via the 10G-KR Ethernet pins of the COM Express standard), it is up to the customer, if he chooses to use such module(s), to validate them against the Marvell AC5X RD, acting as carrier via the interposer kit.
> module which would work? But the CPU is not really the point of this, its the
> carrier?
We have tested and validated a complete reference/development solution combining CN9131 Com Express CPU module, interposer kit and AC5X RD as carrier.
We only push to upstream solutions which we have validated in the lab, hence we push device tree files for the combination tested - specific CPU and specific carrier.
Customers are free to use other COM Express CPU modules, but they will have to validate them by themselves, to account for any deviation from the COM Express standard.
After that, if they wish, they can choose to go for the process of upstreaming their device tree files by their own, like we chose.
>
> Andrew
FYI,
Elad.