The patchsets add support for MediaTek hardware module named DVFSRC
(dynamic voltage and frequency scaling resource collector). The DVFSRC is
a HW module which is used to collect all the requests from both software
and hardware and turn into the decision of minimum operating voltage and
minimum DRAM frequency to fulfill those requests.
So, This series is to implement the dvfsrc driver to collect all the
requests of operating voltage or DRAM bandwidth from other device drivers
likes GPU/Camera through 3 frameworks basically:
1. interconnect framework: to aggregate the bandwidth
requirements from different clients
[1] https://patchwork.kernel.org/cover/10766329/
Below is the emi bandwidth map of mt8183. There has a hw module "DRAM scheduler"
which used to control the throughput. The DVFSRC will collect forecast data
of dram bandwidth from SW consumers(camera/gpu...), and according the forecast
to change the DRAM frequency
ICC provider ICC Nodes
---- ----
--------- |CPU | |--->|VPU |
----- | |-----> ---- | ----
|DRAM |--|DRAM | ---- | ----
| |--|scheduler|----->|GPU | |--->|DISP|
| |--|(EMI) | ---- | ----
| |--| | ----- | ----
----- | |----->|MMSYS|--|--->|VDEC|
--------- ----- | ----
/|\ | ----
|change DRAM freq |--->|VENC|
---------- | ----
| DVFSR | |
| | | ----
---------- |--->|IMG |
| ----
| ----
|--->|CAM |
----
2. Active state management of power domains[1]: to handle the operating
voltage/dram opp requirement from different power domains
[2] https://lwn.net/Articles/744047/
3. Regualtor framework: to handle the operating voltage requirement from user or
cosumer which not belong any power domain
Changes in V4:
* Add acked TAG on dt-bindings patches. (Rob)
* Declaration of emi_icc_aggregate since the prototype of aggregate function
has changed meanwhile. (Georgi)
* Used emi_icc_remove instead of icc_provider_del on probe. (Georgi)
* Add dvfsrc regulator driver into series.
* Bug fixed of mt8183_get_current_level.
* Add mutex protection for pstate operation on dvfsrc_set_performance.
Changes in V3:
* Remove RFC from the subject prefix of the series
* Combine dt-binding patch and move interconnect dt-binding document into
dvfsrc. (Rob)
* Remove unused header, add unit descirption to the bandwidth, rename compatible
name on interconnect driver. (Georgi)
* Fixed some coding style: check flow, naming, used readx_poll_timeout
on dvfsrc driver. (Ryan)
* Rename interconnect driver mt8183.c to mtk-emi.c
* Rename interconnect header mtk,mt8183.h to mtk,emi.h
* mtk-scpsys.c: Add opp table check first to avoid OF runtime parse failed
Changes in RFC V2:
* Remove the DT property dram_type. (Rob)
* Used generic dts property 'opp-level' to get the performace state. (Stephen)
* Remove unecessary dependency config on Kconfig. (Stephen)
* Remove unused header file, fixed some coding style issue, typo,
error handling on dvfsrc driver. (Nicolas/Stephen)
* Remove irq handler on dvfsrc driver. (Stephen)
* Remove init table on dvfsrc driver, combine hw init on trustzone.
* Add interconnect support of mt8183 to aggregate the emi bandwidth.
(Georgi)
V3: https://patchwork.kernel.org/cover/11118867/
RFC V2: https://lore.kernel.org/patchwork/patch/1068113/
RFC V1: https://lore.kernel.org/patchwork/cover/1028535/
Add support for performance state of scpsys on mt8183 platform
Signed-off-by: Henry Chen <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 433c62e..7bf20ca 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/power/mt8183-power.h>
#include <dt-bindings/reset-controller/mt8183-resets.h>
#include "mt8183-pinfunc.h"
+#include <dt-bindings/soc/mtk,dvfsrc.h>
/ {
compatible = "mediatek,mt8183";
@@ -310,6 +311,26 @@
"vpu-3", "vpu-4", "vpu-5";
infracfg = <&infracfg>;
smi_comm = <&smi_common>;
+ operating-points-v2 = <&dvfsrc_opp_table>;
+ dvfsrc_opp_table: opp-table {
+ compatible = "operating-points-v2-level";
+
+ dvfsrc_vol_min: opp1 {
+ opp,level = <MT8183_DVFSRC_LEVEL_1>;
+ };
+
+ dvfsrc_freq_medium: opp2 {
+ opp,level = <MT8183_DVFSRC_LEVEL_2>;
+ };
+
+ dvfsrc_freq_max: opp3 {
+ opp,level = <MT8183_DVFSRC_LEVEL_3>;
+ };
+
+ dvfsrc_vol_max: opp4 {
+ opp,level = <MT8183_DVFSRC_LEVEL_4>;
+ };
+ };
};
apmixedsys: syscon@1000c000 {
--
1.9.1
Hi Henry,
On 3/13/20 11:34, Henry Chen wrote:
> The patchsets add support for MediaTek hardware module named DVFSRC
> (dynamic voltage and frequency scaling resource collector). The DVFSRC is
> a HW module which is used to collect all the requests from both software
> and hardware and turn into the decision of minimum operating voltage and
> minimum DRAM frequency to fulfill those requests.
>
> So, This series is to implement the dvfsrc driver to collect all the
> requests of operating voltage or DRAM bandwidth from other device drivers
> likes GPU/Camera through 3 frameworks basically:
>
> 1. interconnect framework: to aggregate the bandwidth
> requirements from different clients
>
> [1] https://patchwork.kernel.org/cover/10766329/
>
> Below is the emi bandwidth map of mt8183. There has a hw module "DRAM scheduler"
> which used to control the throughput. The DVFSRC will collect forecast data
> of dram bandwidth from SW consumers(camera/gpu...), and according the forecast
> to change the DRAM frequency
>
> ICC provider ICC Nodes
> ---- ----
> --------- |CPU | |--->|VPU |
> ----- | |-----> ---- | ----
> |DRAM |--|DRAM | ---- | ----
> | |--|scheduler|----->|GPU | |--->|DISP|
> | |--|(EMI) | ---- | ----
> | |--| | ----- | ----
> ----- | |----->|MMSYS|--|--->|VDEC|
> --------- ----- | ----
> /|\ | ----
> |change DRAM freq |--->|VENC|
> ---------- | ----
> | DVFSR | |
> | | | ----
> ---------- |--->|IMG |
> | ----
> | ----
> |--->|CAM |
> ----
It would be useful to also add the above diagram into the commit text of
patch 09/13. By doing so, it will be saved into the history, as cover letters
are discarded.
Thanks,
Georgi
Hi Georgi,
On Wed, 2020-04-01 at 18:09 +0300, Georgi Djakov wrote:
> Hi Henry,
>
> On 3/13/20 11:34, Henry Chen wrote:
> > The patchsets add support for MediaTek hardware module named DVFSRC
> > (dynamic voltage and frequency scaling resource collector). The DVFSRC is
> > a HW module which is used to collect all the requests from both software
> > and hardware and turn into the decision of minimum operating voltage and
> > minimum DRAM frequency to fulfill those requests.
> >
> > So, This series is to implement the dvfsrc driver to collect all the
> > requests of operating voltage or DRAM bandwidth from other device drivers
> > likes GPU/Camera through 3 frameworks basically:
> >
> > 1. interconnect framework: to aggregate the bandwidth
> > requirements from different clients
> >
> > [1] https://patchwork.kernel.org/cover/10766329/
> >
> > Below is the emi bandwidth map of mt8183. There has a hw module "DRAM scheduler"
> > which used to control the throughput. The DVFSRC will collect forecast data
> > of dram bandwidth from SW consumers(camera/gpu...), and according the forecast
> > to change the DRAM frequency
> >
> > ICC provider ICC Nodes
> > ---- ----
> > --------- |CPU | |--->|VPU |
> > ----- | |-----> ---- | ----
> > |DRAM |--|DRAM | ---- | ----
> > | |--|scheduler|----->|GPU | |--->|DISP|
> > | |--|(EMI) | ---- | ----
> > | |--| | ----- | ----
> > ----- | |----->|MMSYS|--|--->|VDEC|
> > --------- ----- | ----
> > /|\ | ----
> > |change DRAM freq |--->|VENC|
> > ---------- | ----
> > | DVFSR | |
> > | | | ----
> > ---------- |--->|IMG |
> > | ----
> > | ----
> > |--->|CAM |
> > ----
>
> It would be useful to also add the above diagram into the commit text of
> patch 09/13. By doing so, it will be saved into the history, as cover letters
> are discarded.
OK, thanks.
>
> Thanks,
> Georgi
>
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