From: Cédric Le Goater <[email protected]>
[ Upstream commit 1753081f2d445f9157550692fcc4221cd3ff0958 ]
PCI MSIs now live in an MSI domain but the underlying calls, which
will EOI the interrupt in real mode, need an HW IRQ number mapped in
the XICS IRQ domain. Grab it there.
Signed-off-by: Cédric Le Goater <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sasha Levin <[email protected]>
---
arch/powerpc/kvm/book3s_hv.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 085fb8ecbf68..1ca0a4f760bc 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -5328,6 +5328,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
struct kvmppc_passthru_irqmap *pimap;
struct irq_chip *chip;
int i, rc = 0;
+ struct irq_data *host_data;
if (!kvm_irq_bypass)
return 1;
@@ -5392,7 +5393,14 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
* the KVM real mode handler.
*/
smp_wmb();
- irq_map->r_hwirq = desc->irq_data.hwirq;
+
+ /*
+ * The 'host_irq' number is mapped in the PCI-MSI domain but
+ * the underlying calls, which will EOI the interrupt in real
+ * mode, need an HW IRQ number mapped in the XICS IRQ domain.
+ */
+ host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq);
+ irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data);
if (i == pimap->n_mapped)
pimap->n_mapped++;
@@ -5400,7 +5408,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
if (xics_on_xive())
rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
else
- kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
+ kvmppc_xics_set_mapped(kvm, guest_gsi, irq_map->r_hwirq);
if (rc)
irq_map->r_hwirq = 0;
--
2.30.2
On 9/10/21 2:14 AM, Sasha Levin wrote:
> From: Cédric Le Goater <[email protected]>
>
> [ Upstream commit 1753081f2d445f9157550692fcc4221cd3ff0958 ]
>
> PCI MSIs now live in an MSI domain but the underlying calls, which
> will EOI the interrupt in real mode, need an HW IRQ number mapped in
> the XICS IRQ domain. Grab it there.
>
> Signed-off-by: Cédric Le Goater <[email protected]>
> Signed-off-by: Michael Ellerman <[email protected]>
> Link: https://lore.kernel.org/r/[email protected]
> Signed-off-by: Sasha Levin <[email protected]>
Why are we backporting this patch in stable trees ?
It should be fine but to compile, we need a partial backport of commit
51be9e51a800 ("KVM: PPC: Book3S HV: XIVE: Fix mapping of passthrough
interrupts") which exports irq_get_default_host().
Thanks,
C.
> ---
> arch/powerpc/kvm/book3s_hv.c | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 085fb8ecbf68..1ca0a4f760bc 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -5328,6 +5328,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
> struct kvmppc_passthru_irqmap *pimap;
> struct irq_chip *chip;
> int i, rc = 0;
> + struct irq_data *host_data;
>
> if (!kvm_irq_bypass)
> return 1;
> @@ -5392,7 +5393,14 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
> * the KVM real mode handler.
> */
> smp_wmb();
> - irq_map->r_hwirq = desc->irq_data.hwirq;
> +
> + /*
> + * The 'host_irq' number is mapped in the PCI-MSI domain but
> + * the underlying calls, which will EOI the interrupt in real
> + * mode, need an HW IRQ number mapped in the XICS IRQ domain.
> + */
> + host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq);
> + irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data);
>
> if (i == pimap->n_mapped)
> pimap->n_mapped++;
> @@ -5400,7 +5408,7 @@ static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
> if (xics_on_xive())
> rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
> else
> - kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
> + kvmppc_xics_set_mapped(kvm, guest_gsi, irq_map->r_hwirq);
> if (rc)
> irq_map->r_hwirq = 0;
>
>
On Fri, Sep 10, 2021 at 07:48:18AM +0200, C?dric Le Goater wrote:
>On 9/10/21 2:14 AM, Sasha Levin wrote:
>> From: C?dric Le Goater <[email protected]>
>>
>> [ Upstream commit 1753081f2d445f9157550692fcc4221cd3ff0958 ]
>>
>> PCI MSIs now live in an MSI domain but the underlying calls, which
>> will EOI the interrupt in real mode, need an HW IRQ number mapped in
>> the XICS IRQ domain. Grab it there.
>>
>> Signed-off-by: C?dric Le Goater <[email protected]>
>> Signed-off-by: Michael Ellerman <[email protected]>
>> Link: https://lore.kernel.org/r/[email protected]
>> Signed-off-by: Sasha Levin <[email protected]>
>
>
>Why are we backporting this patch in stable trees ?
>
>It should be fine but to compile, we need a partial backport of commit
>51be9e51a800 ("KVM: PPC: Book3S HV: XIVE: Fix mapping of passthrough
>interrupts") which exports irq_get_default_host().
Or, I can drop it if it makes no sense?
--
Thanks,
Sasha
On 9/11/21 4:35 PM, Sasha Levin wrote:
> On Fri, Sep 10, 2021 at 07:48:18AM +0200, Cédric Le Goater wrote:
>> On 9/10/21 2:14 AM, Sasha Levin wrote:
>>> From: Cédric Le Goater <[email protected]>
>>>
>>> [ Upstream commit 1753081f2d445f9157550692fcc4221cd3ff0958 ]
>>>
>>> PCI MSIs now live in an MSI domain but the underlying calls, which
>>> will EOI the interrupt in real mode, need an HW IRQ number mapped in
>>> the XICS IRQ domain. Grab it there.
>>>
>>> Signed-off-by: Cédric Le Goater <[email protected]>
>>> Signed-off-by: Michael Ellerman <[email protected]>
>>> Link: https://lore.kernel.org/r/[email protected]
>>> Signed-off-by: Sasha Levin <[email protected]>
>>
>>
>> Why are we backporting this patch in stable trees ?
>>
>> It should be fine but to compile, we need a partial backport of commit
>> 51be9e51a800 ("KVM: PPC: Book3S HV: XIVE: Fix mapping of passthrough
>> interrupts") which exports irq_get_default_host().
>
> Or, I can drop it if it makes no sense?
Yes I would.
It makes sense only with the full patchset, the one reworking PCI MSI
support in the PPC pSeries and PowerNV platforms.
Thanks,
C.