Export some APIs for module drivers.
Fix the clock config to support module build.
Fix the clk driver init, add module author, description
and license to support building RK3399 SoC clock driver as module.
Change in V2:
[PATCH v2 1/6]: remove "clk",and check "hw" isn't an error value.
[PATCH v2 6/6]: store a function pointer in the match data.
Elaine Zhang (6):
clk: rockchip: Use clk_hw_register_composite instead of
clk_register_composite calls
clk: rockchip: Export rockchip_clk_register_ddrclk()
clk: rockchip: Export rockchip_register_softrst()
clk: rockchip: Export some clock common APIs for module drivers
clk: rockchip: fix the clk config to support module build
clk: rockchip: rk3399: Support module build
drivers/clk/Kconfig | 1 +
drivers/clk/rockchip/Kconfig | 78 +++++++++++++++++
drivers/clk/rockchip/Makefile | 42 ++++-----
drivers/clk/rockchip/clk-ddr.c | 1 +
drivers/clk/rockchip/clk-half-divider.c | 18 ++--
drivers/clk/rockchip/clk-rk3399.c | 55 ++++++++++++
drivers/clk/rockchip/clk.c | 110 +++++++++++++-----------
drivers/clk/rockchip/softrst.c | 7 +-
8 files changed, 229 insertions(+), 83 deletions(-)
create mode 100644 drivers/clk/rockchip/Kconfig
--
2.17.1
use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.
use CONFIG_CLK_RKXX for Rk soc clk driver.
Mark configuration to "tristate",
to support building Rk SoCs clock driver as module.
Signed-off-by: Elaine Zhang <[email protected]>
---
drivers/clk/Kconfig | 1 +
drivers/clk/rockchip/Kconfig | 78 +++++++++++++++++++++++++++++++++++
drivers/clk/rockchip/Makefile | 42 ++++++++++---------
3 files changed, 101 insertions(+), 20 deletions(-)
create mode 100644 drivers/clk/rockchip/Kconfig
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 4026fac9fac3..b41aaed9bd51 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -373,6 +373,7 @@ source "drivers/clk/meson/Kconfig"
source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
+source "drivers/clk/rockchip/Kconfig"
source "drivers/clk/samsung/Kconfig"
source "drivers/clk/sifive/Kconfig"
source "drivers/clk/sprd/Kconfig"
diff --git a/drivers/clk/rockchip/Kconfig b/drivers/clk/rockchip/Kconfig
new file mode 100644
index 000000000000..53a44396bc35
--- /dev/null
+++ b/drivers/clk/rockchip/Kconfig
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: GPL-2.0
+# common clock support for ROCKCHIP SoC family.
+
+config COMMON_CLK_ROCKCHIP
+ tristate "Rockchip clock controller common support"
+ depends on ARCH_ROCKCHIP
+ default ARCH_ROCKCHIP
+ help
+ Say y here to enable common clock controller.
+
+if COMMON_CLK_ROCKCHIP
+config CLK_PX30
+ tristate "Rockchip Px30 clock controller support"
+ default y
+ help
+ Build the driver for Px30 Clock Driver.
+
+config CLK_RV110X
+ tristate "Rockchip Rv110x clock controller support"
+ default y
+ help
+ Build the driver for Rv110x Clock Driver.
+
+config CLK_RK3036
+ tristate "Rockchip Rk3036 clock controller support"
+ default y
+ help
+ Build the driver for Rk3036 Clock Driver.
+
+config CLK_RK312X
+ tristate "Rockchip Rk312x clock controller support"
+ default y
+ help
+ Build the driver for Rk312x Clock Driver.
+
+config CLK_RK3188
+ tristate "Rockchip Rk3188 clock controller support"
+ default y
+ help
+ Build the driver for Rk3188 Clock Driver.
+
+config CLK_RK322X
+ tristate "Rockchip Rk322x clock controller support"
+ default y
+ help
+ Build the driver for Rk322x Clock Driver.
+
+config CLK_RK3288
+ tristate "Rockchip Rk3288 clock controller support"
+ depends on ARM
+ default y
+ help
+ Build the driver for Rk3288 Clock Driver.
+
+config CLK_RK3308
+ tristate "Rockchip Rk3308 clock controller support"
+ default y
+ help
+ Build the driver for Rk3308 Clock Driver.
+
+config CLK_RK3328
+ tristate "Rockchip Rk3328 clock controller support"
+ default y
+ help
+ Build the driver for Rk3328 Clock Driver.
+
+config CLK_RK3368
+ tristate "Rockchip Rk3368 clock controller support"
+ default y
+ help
+ Build the driver for Rk3368 Clock Driver.
+
+config CLK_RK3399
+ tristate "Rockchip Rk3399 clock controller support"
+ default y
+ help
+ Build the driver for Rk3399 Clock Driver.
+endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 7c5b5813a87c..a99e4d9bbae1 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -3,24 +3,26 @@
# Rockchip Clock specific Makefile
#
-obj-y += clk.o
-obj-y += clk-pll.o
-obj-y += clk-cpu.o
-obj-y += clk-half-divider.o
-obj-y += clk-inverter.o
-obj-y += clk-mmc-phase.o
-obj-y += clk-muxgrf.o
-obj-y += clk-ddr.o
-obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
+obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
-obj-y += clk-px30.o
-obj-y += clk-rv1108.o
-obj-y += clk-rk3036.o
-obj-y += clk-rk3128.o
-obj-y += clk-rk3188.o
-obj-y += clk-rk3228.o
-obj-y += clk-rk3288.o
-obj-y += clk-rk3308.o
-obj-y += clk-rk3328.o
-obj-y += clk-rk3368.o
-obj-y += clk-rk3399.o
+clk-rockchip-y += clk.o
+clk-rockchip-y += clk-pll.o
+clk-rockchip-y += clk-cpu.o
+clk-rockchip-y += clk-half-divider.o
+clk-rockchip-y += clk-inverter.o
+clk-rockchip-y += clk-mmc-phase.o
+clk-rockchip-y += clk-muxgrf.o
+clk-rockchip-y += clk-ddr.o
+clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
+
+obj-$(CONFIG_CLK_PX30) += clk-px30.o
+obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o
+obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o
+obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o
+obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o
+obj-$(CONFIG_CLK_RK322X) += clk-rk3228.o
+obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o
+obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o
+obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o
+obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o
+obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o
--
2.17.1
support CLK_OF_DECLARE and builtin_platform_driver_probe
double clk init method.
add module author, description and license to support building
Soc Rk3399 clock driver as module.
Signed-off-by: Elaine Zhang <[email protected]>
---
drivers/clk/rockchip/clk-rk3399.c | 55 +++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index ce1d2446f142..40ff17aee5b6 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -5,9 +5,11 @@
*/
#include <linux/clk-provider.h>
+#include <linux/module.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <dt-bindings/clock/rk3399-cru.h>
@@ -1600,3 +1602,56 @@ static void __init rk3399_pmu_clk_init(struct device_node *np)
rockchip_clk_of_add_provider(np, ctx);
}
CLK_OF_DECLARE(rk3399_cru_pmu, "rockchip,rk3399-pmucru", rk3399_pmu_clk_init);
+
+struct clk_rk3399_inits {
+ void (*inits)(struct device_node *np);
+};
+
+static const struct clk_rk3399_inits clk_rk3399_pmucru_init = {
+ .inits = rk3399_pmu_clk_init,
+};
+
+static const struct clk_rk3399_inits clk_rk3399_cru_init = {
+ .inits = rk3399_clk_init,
+};
+
+static const struct of_device_id clk_rk3399_match_table[] = {
+ {
+ .compatible = "rockchip,rk3399-cru",
+ .data = &clk_rk3399_cru_init,
+ }, {
+ .compatible = "rockchip,rk3399-pmucru",
+ .data = &clk_rk3399_pmucru_init,
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(of, clk_rk3399_match_table);
+
+static int __init clk_rk3399_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ const struct of_device_id *match;
+ const struct clk_rk3399_inits *init_data;
+
+ match = of_match_device(clk_rk3399_match_table, &pdev->dev);
+ if (!match || !match->data)
+ return -EINVAL;
+
+ init_data = match->data;
+ if (init_data->inits)
+ init_data->inits(np);
+
+ return 0;
+}
+
+static struct platform_driver clk_rk3399_driver = {
+ .driver = {
+ .name = "clk-rk3399",
+ .of_match_table = clk_rk3399_match_table,
+ },
+};
+builtin_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);
+
+MODULE_DESCRIPTION("Rockchip RK3399 Clock Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:clk-rk3399");
--
2.17.1
This is used by the Rockchip clk driver, export it to allow that
driver to be compiled as a module..
Signed-off-by: Elaine Zhang <[email protected]>
---
drivers/clk/rockchip/softrst.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/rockchip/softrst.c b/drivers/clk/rockchip/softrst.c
index 5f1ff5e47c4f..caba9055090b 100644
--- a/drivers/clk/rockchip/softrst.c
+++ b/drivers/clk/rockchip/softrst.c
@@ -77,9 +77,9 @@ static const struct reset_control_ops rockchip_softrst_ops = {
.deassert = rockchip_softrst_deassert,
};
-void __init rockchip_register_softrst(struct device_node *np,
- unsigned int num_regs,
- void __iomem *base, u8 flags)
+void rockchip_register_softrst(struct device_node *np,
+ unsigned int num_regs,
+ void __iomem *base, u8 flags)
{
struct rockchip_softrst *softrst;
int ret;
@@ -107,3 +107,4 @@ void __init rockchip_register_softrst(struct device_node *np,
kfree(softrst);
}
};
+EXPORT_SYMBOL(rockchip_register_softrst);
--
2.17.1
On 2020/9/3 下午2:32, Elaine Zhang wrote:
> support CLK_OF_DECLARE and builtin_platform_driver_probe
> double clk init method.
> add module author, description and license to support building
> Soc Rk3399 clock driver as module.
>
> Signed-off-by: Elaine Zhang <[email protected]>
> ---
> drivers/clk/rockchip/clk-rk3399.c | 55 +++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
> index ce1d2446f142..40ff17aee5b6 100644
> --- a/drivers/clk/rockchip/clk-rk3399.c
> +++ b/drivers/clk/rockchip/clk-rk3399.c
> @@ -5,9 +5,11 @@
> */
>
> #include <linux/clk-provider.h>
> +#include <linux/module.h>
> #include <linux/io.h>
> #include <linux/of.h>
> #include <linux/of_address.h>
> +#include <linux/of_device.h>
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> #include <dt-bindings/clock/rk3399-cru.h>
> @@ -1600,3 +1602,56 @@ static void __init rk3399_pmu_clk_init(struct device_node *np)
> rockchip_clk_of_add_provider(np, ctx);
> }
> CLK_OF_DECLARE(rk3399_cru_pmu, "rockchip,rk3399-pmucru", rk3399_pmu_clk_init);
> +
> +struct clk_rk3399_inits {
> + void (*inits)(struct device_node *np);
> +};
> +
> +static const struct clk_rk3399_inits clk_rk3399_pmucru_init = {
> + .inits = rk3399_pmu_clk_init,
> +};
> +
> +static const struct clk_rk3399_inits clk_rk3399_cru_init = {
> + .inits = rk3399_clk_init,
> +};
> +
> +static const struct of_device_id clk_rk3399_match_table[] = {
> + {
> + .compatible = "rockchip,rk3399-cru",
> + .data = &clk_rk3399_cru_init,
> + }, {
> + .compatible = "rockchip,rk3399-pmucru",
> + .data = &clk_rk3399_pmucru_init,
> + },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, clk_rk3399_match_table);
> +
> +static int __init clk_rk3399_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + const struct of_device_id *match;
> + const struct clk_rk3399_inits *init_data;
> +
> + match = of_match_device(clk_rk3399_match_table, &pdev->dev);
> + if (!match || !match->data)
> + return -EINVAL;
> +
> + init_data = match->data;
> + if (init_data->inits)
> + init_data->inits(np);
> +
> + return 0;
> +}
> +
> +static struct platform_driver clk_rk3399_driver = {
> + .driver = {
> + .name = "clk-rk3399",
> + .of_match_table = clk_rk3399_match_table,
> + },
> +};
> +builtin_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);
> +
> +MODULE_DESCRIPTION("Rockchip RK3399 Clock Driver");
> +MODULE_LICENSE("GPL");
> +MODULE_ALIAS("platform:clk-rk3399");
This looks good to me, so
Reviewed-by: Kever Yang <[email protected]>
Thanks,
- Kever
On 2020/9/3 下午2:32, Elaine Zhang wrote:
> use CONFIG_COMMON_CLK_ROCKCHIP for Rk common clk drivers.
> use CONFIG_CLK_RKXX for Rk soc clk driver.
> Mark configuration to "tristate",
> to support building Rk SoCs clock driver as module.
>
> Signed-off-by: Elaine Zhang <[email protected]>
> ---
> drivers/clk/Kconfig | 1 +
> drivers/clk/rockchip/Kconfig | 78 +++++++++++++++++++++++++++++++++++
> drivers/clk/rockchip/Makefile | 42 ++++++++++---------
> 3 files changed, 101 insertions(+), 20 deletions(-)
> create mode 100644 drivers/clk/rockchip/Kconfig
>
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 4026fac9fac3..b41aaed9bd51 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -373,6 +373,7 @@ source "drivers/clk/meson/Kconfig"
> source "drivers/clk/mvebu/Kconfig"
> source "drivers/clk/qcom/Kconfig"
> source "drivers/clk/renesas/Kconfig"
> +source "drivers/clk/rockchip/Kconfig"
> source "drivers/clk/samsung/Kconfig"
> source "drivers/clk/sifive/Kconfig"
> source "drivers/clk/sprd/Kconfig"
> diff --git a/drivers/clk/rockchip/Kconfig b/drivers/clk/rockchip/Kconfig
> new file mode 100644
> index 000000000000..53a44396bc35
> --- /dev/null
> +++ b/drivers/clk/rockchip/Kconfig
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: GPL-2.0
> +# common clock support for ROCKCHIP SoC family.
> +
> +config COMMON_CLK_ROCKCHIP
> + tristate "Rockchip clock controller common support"
> + depends on ARCH_ROCKCHIP
> + default ARCH_ROCKCHIP
> + help
> + Say y here to enable common clock controller.
> +
> +if COMMON_CLK_ROCKCHIP
> +config CLK_PX30
> + tristate "Rockchip Px30 clock controller support"
> + default y
> + help
> + Build the driver for Px30 Clock Driver.
> +
> +config CLK_RV110X
> + tristate "Rockchip Rv110x clock controller support"
> + default y
> + help
> + Build the driver for Rv110x Clock Driver.
> +
> +config CLK_RK3036
> + tristate "Rockchip Rk3036 clock controller support"
> + default y
> + help
> + Build the driver for Rk3036 Clock Driver.
> +
> +config CLK_RK312X
> + tristate "Rockchip Rk312x clock controller support"
> + default y
> + help
> + Build the driver for Rk312x Clock Driver.
> +
> +config CLK_RK3188
> + tristate "Rockchip Rk3188 clock controller support"
> + default y
> + help
> + Build the driver for Rk3188 Clock Driver.
> +
> +config CLK_RK322X
> + tristate "Rockchip Rk322x clock controller support"
> + default y
> + help
> + Build the driver for Rk322x Clock Driver.
> +
> +config CLK_RK3288
> + tristate "Rockchip Rk3288 clock controller support"
> + depends on ARM
> + default y
> + help
> + Build the driver for Rk3288 Clock Driver.
> +
> +config CLK_RK3308
> + tristate "Rockchip Rk3308 clock controller support"
> + default y
> + help
> + Build the driver for Rk3308 Clock Driver.
> +
> +config CLK_RK3328
> + tristate "Rockchip Rk3328 clock controller support"
> + default y
> + help
> + Build the driver for Rk3328 Clock Driver.
> +
> +config CLK_RK3368
> + tristate "Rockchip Rk3368 clock controller support"
> + default y
> + help
> + Build the driver for Rk3368 Clock Driver.
> +
> +config CLK_RK3399
> + tristate "Rockchip Rk3399 clock controller support"
> + default y
> + help
> + Build the driver for Rk3399 Clock Driver.
> +endif
> diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
> index 7c5b5813a87c..a99e4d9bbae1 100644
> --- a/drivers/clk/rockchip/Makefile
> +++ b/drivers/clk/rockchip/Makefile
> @@ -3,24 +3,26 @@
> # Rockchip Clock specific Makefile
> #
>
> -obj-y += clk.o
> -obj-y += clk-pll.o
> -obj-y += clk-cpu.o
> -obj-y += clk-half-divider.o
> -obj-y += clk-inverter.o
> -obj-y += clk-mmc-phase.o
> -obj-y += clk-muxgrf.o
> -obj-y += clk-ddr.o
> -obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
> +obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
>
> -obj-y += clk-px30.o
> -obj-y += clk-rv1108.o
> -obj-y += clk-rk3036.o
> -obj-y += clk-rk3128.o
> -obj-y += clk-rk3188.o
> -obj-y += clk-rk3228.o
> -obj-y += clk-rk3288.o
> -obj-y += clk-rk3308.o
> -obj-y += clk-rk3328.o
> -obj-y += clk-rk3368.o
> -obj-y += clk-rk3399.o
> +clk-rockchip-y += clk.o
> +clk-rockchip-y += clk-pll.o
> +clk-rockchip-y += clk-cpu.o
> +clk-rockchip-y += clk-half-divider.o
> +clk-rockchip-y += clk-inverter.o
> +clk-rockchip-y += clk-mmc-phase.o
> +clk-rockchip-y += clk-muxgrf.o
> +clk-rockchip-y += clk-ddr.o
> +clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
> +
> +obj-$(CONFIG_CLK_PX30) += clk-px30.o
> +obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o
> +obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o
> +obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o
> +obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o
> +obj-$(CONFIG_CLK_RK322X) += clk-rk3228.o
> +obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o
> +obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o
> +obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o
> +obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o
> +obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o
This looks good to me, so
Reviewed-by: Kever Yang <[email protected]>
Thanks,
- Kever
On 2020/9/3 下午2:31, Elaine Zhang wrote:
> This is used by the Rockchip clk driver, export it to allow that
> driver to be compiled as a module..
>
> Signed-off-by: Elaine Zhang <[email protected]>
> ---
> drivers/clk/rockchip/softrst.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/rockchip/softrst.c b/drivers/clk/rockchip/softrst.c
> index 5f1ff5e47c4f..caba9055090b 100644
> --- a/drivers/clk/rockchip/softrst.c
> +++ b/drivers/clk/rockchip/softrst.c
> @@ -77,9 +77,9 @@ static const struct reset_control_ops rockchip_softrst_ops = {
> .deassert = rockchip_softrst_deassert,
> };
>
> -void __init rockchip_register_softrst(struct device_node *np,
> - unsigned int num_regs,
> - void __iomem *base, u8 flags)
> +void rockchip_register_softrst(struct device_node *np,
> + unsigned int num_regs,
> + void __iomem *base, u8 flags)
> {
> struct rockchip_softrst *softrst;
> int ret;
> @@ -107,3 +107,4 @@ void __init rockchip_register_softrst(struct device_node *np,
> kfree(softrst);
> }
> };
> +EXPORT_SYMBOL(rockchip_register_softrst);
This looks good to me, so
Reviewed-by: Kever Yang <[email protected]>
Thanks,
- Kever