VP2 and VP3 are unused video ports and VP3 share the same parent
clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
So remove the parent clocks for unused VPs.
Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support")
Reported-by: Nishanth Menon <[email protected]>
Closes: https://storage.kernelci.org/mainline/master/v6.7-rc6/arm64/defconfig/gcc-10/lab-ti/baseline-nfs-am69_sk-fs.txt
Signed-off-by: Jayesh Choudhary <[email protected]>
---
Local testing log for HDMI on AM69-SK:
<https://gist.github.com/Jayesh2000/517395cd85eb28d65b8ee4568cefb809>
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 8da591579868..370980eb59b0 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -918,13 +918,9 @@ &dss {
pinctrl-names = "default";
pinctrl-0 = <&dss_vout0_pins_default>;
assigned-clocks = <&k3_clks 218 2>,
- <&k3_clks 218 5>,
- <&k3_clks 218 14>,
- <&k3_clks 218 18>;
+ <&k3_clks 218 5>;
assigned-clock-parents = <&k3_clks 218 3>,
- <&k3_clks 218 7>,
- <&k3_clks 218 16>,
- <&k3_clks 218 22>;
+ <&k3_clks 218 7>;
};
&serdes_wiz4 {
--
2.25.1
On 17:00-20231221, Jayesh Choudhary wrote:
> VP2 and VP3 are unused video ports and VP3 share the same parent
> clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
> So remove the parent clocks for unused VPs.
>
> Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support")
> Reported-by: Nishanth Menon <[email protected]>
> Closes: https://storage.kernelci.org/mainline/master/v6.7-rc6/arm64/defconfig/gcc-10/lab-ti/baseline-nfs-am69_sk-fs.txt
> Signed-off-by: Jayesh Choudhary <[email protected]>
> ---
>
> Local testing log for HDMI on AM69-SK:
> <https://gist.github.com/Jayesh2000/517395cd85eb28d65b8ee4568cefb809>
Has this been always failing or just something introduced in rc6? I know
I noticed this in rc6.. so wondering..
>
> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> index 8da591579868..370980eb59b0 100644
> --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> @@ -918,13 +918,9 @@ &dss {
> pinctrl-names = "default";
> pinctrl-0 = <&dss_vout0_pins_default>;
> assigned-clocks = <&k3_clks 218 2>,
> - <&k3_clks 218 5>,
> - <&k3_clks 218 14>,
> - <&k3_clks 218 18>;
> + <&k3_clks 218 5>;
> assigned-clock-parents = <&k3_clks 218 3>,
> - <&k3_clks 218 7>,
> - <&k3_clks 218 16>,
> - <&k3_clks 218 22>;
> + <&k3_clks 218 7>;
> };
>
> &serdes_wiz4 {
> --
> 2.25.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi,
On 21/12/2023 13:30, Jayesh Choudhary wrote:
> VP2 and VP3 are unused video ports and VP3 share the same parent
> clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
> So remove the parent clocks for unused VPs.
>
> Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI support")
> Reported-by: Nishanth Menon <[email protected]>
> Closes: https://storage.kernelci.org/mainline/master/v6.7-rc6/arm64/defconfig/gcc-10/lab-ti/baseline-nfs-am69_sk-fs.txt
> Signed-off-by: Jayesh Choudhary <[email protected]>
> ---
>
> Local testing log for HDMI on AM69-SK:
> <https://gist.github.com/Jayesh2000/517395cd85eb28d65b8ee4568cefb809>
>
> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> index 8da591579868..370980eb59b0 100644
> --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> @@ -918,13 +918,9 @@ &dss {
> pinctrl-names = "default";
> pinctrl-0 = <&dss_vout0_pins_default>;
> assigned-clocks = <&k3_clks 218 2>,
> - <&k3_clks 218 5>,
> - <&k3_clks 218 14>,
> - <&k3_clks 218 18>;
> + <&k3_clks 218 5>;
> assigned-clock-parents = <&k3_clks 218 3>,
> - <&k3_clks 218 7>,
> - <&k3_clks 218 16>,
> - <&k3_clks 218 22>;
> + <&k3_clks 218 7>;
> };
>
> &serdes_wiz4 {
The SK has two outputs, using VP0 and VP1, so the above kind of makes
sense. Then again, setting up 4 clocks here really shouldn't break the
SK, should it? The AM69 has 4 available VPs. How does one configure the
clocks for a board that uses 4 VPs, or possibly a different selection of
VPs?
I think the patch desc should explain why this doesn't work. Afaik, the
dts is not wrong as such, but there's an underlying issue that breaks
the clocking if all four clocks are set up here.
So, with the desc updated, as this fixes an issue and is not wrong:
Reviewed-by: Tomi Valkeinen <[email protected]>
But I also feel this is dodging a firmware (?) issue.
Tomi
Hello Tomi,
On 03/01/24 18:35, Tomi Valkeinen wrote:
> Hi,
>
> On 21/12/2023 13:30, Jayesh Choudhary wrote:
>> VP2 and VP3 are unused video ports and VP3 share the same parent
>> clock as VP1 causing issue with pixel clock setting for HDMI (VP1).
>> So remove the parent clocks for unused VPs.
>>
>> Fixes: 6f8605fd7d11 ("arm64: dts: ti: k3-am69-sk: Add DP and HDMI
>> support")
>> Reported-by: Nishanth Menon <[email protected]>
>> Closes:
>> https://storage.kernelci.org/mainline/master/v6.7-rc6/arm64/defconfig/gcc-10/lab-ti/baseline-nfs-am69_sk-fs.txt
>> Signed-off-by: Jayesh Choudhary <[email protected]>
>> ---
>>
>> Local testing log for HDMI on AM69-SK:
>> <https://gist.github.com/Jayesh2000/517395cd85eb28d65b8ee4568cefb809>
>>
>> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++------
>> 1 file changed, 2 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
>> b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
>> index 8da591579868..370980eb59b0 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
>> @@ -918,13 +918,9 @@ &dss {
>> pinctrl-names = "default";
>> pinctrl-0 = <&dss_vout0_pins_default>;
>> assigned-clocks = <&k3_clks 218 2>,
>> - <&k3_clks 218 5>,
>> - <&k3_clks 218 14>,
>> - <&k3_clks 218 18>;
>> + <&k3_clks 218 5>;
>> assigned-clock-parents = <&k3_clks 218 3>,
>> - <&k3_clks 218 7>,
>> - <&k3_clks 218 16>,
>> - <&k3_clks 218 22>;
>> + <&k3_clks 218 7>;
>> };
>> &serdes_wiz4 {
>
> The SK has two outputs, using VP0 and VP1, so the above kind of makes
> sense. Then again, setting up 4 clocks here really shouldn't break the
> SK, should it? The AM69 has 4 available VPs. How does one configure the
> clocks for a board that uses 4 VPs, or possibly a different selection of
> VPs?
>
> I think the patch desc should explain why this doesn't work. Afaik, the
> dts is not wrong as such, but there's an underlying issue that breaks
> the clocking if all four clocks are set up here.
>
I discussed this with firmware team, there is an issue with sibling
child clocks. If parent clock is shared, DM cannot set its rate.
The determine_rate and set_rate query are behaving unexpectedly in
this case. determine_rate is returning 0 and set_rate is setting it
to 1.8G even when VP can support max 600M.
Jayesh
> So, with the desc updated, as this fixes an issue and is not wrong:
>
> Reviewed-by: Tomi Valkeinen <[email protected]>
>
> But I also feel this is dodging a firmware (?) issue.
>
> Tomi
>