static unsigned int phys_pkg_id(int index_msb)
{
return hard_smp_processor_id() >> index_msb;
}
In arch/x86_64/kernel/genapic_cluster.c
Should be changed to
static unsigned int phys_pkg_id(int index_msb)
{
/* physical apicid, so we need to substract offset */
return (hard_smp_processor_id() - boot_cpu_id) >> index_msb;
}
-----Original Message-----
From: YhLu
Sent: Thursday, January 06, 2005 5:07 PM
To: Andi Kleen; Matt Domsch
Cc: [email protected]; [email protected]
Subject: RE: 256 apic id for amd64
Andi,
I made the Opteron using apic id from 16 later in LinuxBIOS.
So leave 0-15 for ioapic.
The problem is that the kernel (caliberate_delay) doesn't like that.
If using lpj=2170880 as the command line for that, it works well.
What's the jiffies? The TSC is changing but it doesn't.
YH
Without offset:
Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
Memory: 1019456k/1048576k available (3011k kernel code, 0k reserved, 1310k
data, 544k init)
LYH calibrating 0 jiffies = 4294667563, now=2922366256
LYH calibrating 1 jiffies = 4294667568, now=2934372713
LYH calibrating 3 jiffies = 4294667600, now=3003581909
4341.76 BogoMIPS (lpj=2170880)
Mount-cache hash table entries: 256 (order: 0, 4096 bytes)
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 1024K (64 bytes/line)
CPU 0 -> Node 0
CPU: Physical Processor ID: 0
With apic id offset:
Console: colour dummy device 80x25
Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
Memory: 1019456k/1048576k available (3011k kernel code, 0k reserved, 1310k
data, 544k init)
LYH calibrating 0 jiffies = 4294667296, now=1383947209
LYH calibrating 1 jiffies = 4294667296, now=1395952717
Please refer the print in init/main.c
void __devinit calibrate_delay(void)
{
unsigned long ticks, loopbit;
int lps_precision = LPS_PREC;
+ unsigned long now;
+
+ rdtscl(now);
+
+ printk("LYH calibrating 0 jiffies = %lu, now=%lu\r\n", jiffies,
now);
if (preset_lpj) {
loops_per_jiffy = preset_lpj;
printk("Calibrating delay loop (skipped)... "
"%lu.%02lu BogoMIPS preset\n",
loops_per_jiffy/(500000/HZ),
(loops_per_jiffy/(5000/HZ)) % 100);
} else {
loops_per_jiffy = (1<<12);
+ rdtscl(now);
+ printk("LYH calibrating 1 jiffies = %lu, now=%lu\r\n",
jiffies, now);
printk(KERN_DEBUG "Calibrating delay loop... ");
while ((loops_per_jiffy <<= 1) != 0) {
/* wait for "start of" clock tick */
ticks = jiffies;
while (ticks == jiffies)
/* nothing */;
/* Go .. */
ticks = jiffies;
__delay(loops_per_jiffy);
ticks = jiffies - ticks;
if (ticks)
break;
}
/*
* Do a binary approximation to get loops_per_jiffy set to
* equal one clock (up to lps_precision bits)
*/
+ rdtscl(now);
+ printk("LYH calibrating 2 jiffies = %lu, now=%lu\r\n",
jiffies, now);
loops_per_jiffy >>= 1;
loopbit = loops_per_jiffy;
while (lps_precision-- && (loopbit >>= 1)) {
loops_per_jiffy |= loopbit;
ticks = jiffies;
while (ticks == jiffies)
/* nothing */;
ticks = jiffies;
__delay(loops_per_jiffy);
if (jiffies != ticks) /* longer than 1 tick */
loops_per_jiffy &= ~loopbit;
}
+ rdtscl(now);
+ printk("LYH calibrating 3 jiffies = %lu, now=%lu\r\n",
jiffies, now);
/* Round the value and print it */
printk("%lu.%02lu BogoMIPS (lpj=%lu)\n",
loops_per_jiffy/(500000/HZ),
(loops_per_jiffy/(5000/HZ)) % 100,
loops_per_jiffy);
}
}
On Thu, Jan 06, 2005 at 06:53:11PM -0800, YhLu wrote:
> static unsigned int phys_pkg_id(int index_msb)
> {
> return hard_smp_processor_id() >> index_msb;
> }
>
> In arch/x86_64/kernel/genapic_cluster.c
>
> Should be changed to
>
> static unsigned int phys_pkg_id(int index_msb)
> {
> /* physical apicid, so we need to substract offset */
> return (hard_smp_processor_id() - boot_cpu_id) >> index_msb;
> }
Why?
If you want a patch merged you need to supply some more explanation
please.
Also cc Suresh & James for comment.
-Andi
Andi has already dealt with some of the coding style issues elsewhere in
the thread.
My comment: This is playing with fire. We've gone to considerable
trouble to make the boot_cpu_id independent of the physical APIC ID
(which is what hard_smp_processor_id() returns). Different BIOSes and
different CPU revisions can cause the boot processor to shift.
Examples: We have a box where the boot CPU has an APIC ID of 3.
Another system starts with the BSP == 3, but the BIOS renumbers it to
zero after first reassigning the original 0 CPU. So, the APIC IDs end
up 0, 1, 2, 4. Yet another system assigns the IDs: 0, 1, 6, 7.
We can expect even stranger numbering schemes in the future, given that
dual core hyperthreaded CPUs are in the pipeline. Creating any
dependency between CPU number and APIC ID is a _bad_ idea.
On Friday 07 January 2005 04:24 am, Andi Kleen wrote:
> On Thu, Jan 06, 2005 at 06:53:11PM -0800, YhLu wrote:
> > static unsigned int phys_pkg_id(int index_msb)
> > {
> > return hard_smp_processor_id() >> index_msb;
> > }
> >
> > In arch/x86_64/kernel/genapic_cluster.c
> >
> > Should be changed to
> >
> > static unsigned int phys_pkg_id(int index_msb)
> > {
> > /* physical apicid, so we need to substract offset */
> > return (hard_smp_processor_id() - boot_cpu_id) >>
> > index_msb; }
>
> Why?
>
> If you want a patch merged you need to supply some more explanation
> please.
>
> Also cc Suresh & James for comment.
>
> -Andi
--
James Cleverdon
IBM LTC (xSeries Linux Solutions)
{jamesclv(Unix, preferred), cleverdj(Notes)} at us dot ibm dot comm