Hi all,
This patch series contains two improvements for the SiFive PLIC DT
bindings.
Changes compared to v2[1]:
- Add Acked-by, Reviewed-by.
Changes compared to v1[2]:
- Split in two patches,
- Improve patch description and document limit rationale.
Thanks!
[1] https://lore.kernel.org/r/[email protected]
[2] https://lore.kernel.org/r/[email protected]
Geert Uytterhoeven (2):
dt-bindings: interrupt-controller: sifive,plic: Fix number of
interrupts
dt-bindings: interrupt-controller: sifive,plic: Group interrupt tuples
.../interrupt-controller/sifive,plic-1.0.0.yaml | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
--
2.25.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
To improve human readability and enable automatic validation, the tuples
in "interrupts-extended" properties should be grouped using angle
brackets.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
v3:
- Add Reviewed-by,
v2:
- Split in two patches.
---
.../interrupt-controller/sifive,plic-1.0.0.yaml | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index 0c6687511457413e..52a3bc31a2c19c5d 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -91,12 +91,11 @@ examples:
#interrupt-cells = <1>;
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
interrupt-controller;
- interrupts-extended = <
- &cpu0_intc 11
- &cpu1_intc 11 &cpu1_intc 9
- &cpu2_intc 11 &cpu2_intc 9
- &cpu3_intc 11 &cpu3_intc 9
- &cpu4_intc 11 &cpu4_intc 9>;
+ interrupts-extended = <&cpu0_intc 11>,
+ <&cpu1_intc 11>, <&cpu1_intc 9>,
+ <&cpu2_intc 11>, <&cpu2_intc 9>,
+ <&cpu3_intc 11>, <&cpu3_intc 9>,
+ <&cpu4_intc 11>, <&cpu4_intc 9>;
reg = <0xc000000 0x4000000>;
riscv,ndev = <10>;
};
--
2.25.1
The number of interrupts lacks an upper bound, thus assuming one,
causing properly grouped "interrupts-extended" properties to be flagged
as an error by "make dtbs_check".
Fix this by adding the missing "maxItems". As the architectural maximum
is 15872 interrupts, using that as the limit would be unpractical.
Hence limit it to 9 interrupts (one interrupt for a system management
core, and two interrupts per core for other cores). This should be
sufficient for now, and the limit can always be increased when the need
arises.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
v3:
- Add Acked-by,
v2:
- Split in two patches,
- Improve patch description and document limit rationale.
---
.../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index 28b6b17fe4b26778..0c6687511457413e 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -62,6 +62,7 @@ properties:
interrupts-extended:
minItems: 1
+ maxItems: 9
description:
Specifies which contexts are connected to the PLIC, with "-1" specifying
that a context is not present. Each node pointed to should be a
--
2.25.1
On Fri, Dec 17, 2021 at 6:04 PM Geert Uytterhoeven <[email protected]> wrote:
>
> The number of interrupts lacks an upper bound, thus assuming one,
> causing properly grouped "interrupts-extended" properties to be flagged
> as an error by "make dtbs_check".
>
> Fix this by adding the missing "maxItems". As the architectural maximum
> is 15872 interrupts, using that as the limit would be unpractical.
> Hence limit it to 9 interrupts (one interrupt for a system management
> core, and two interrupts per core for other cores). This should be
> sufficient for now, and the limit can always be increased when the need
> arises.
I disagree with having "maxItems" as 9.
We are in the process of increasing max CPUs supported by
QEMU virt machine to 512. There are already high CPU count
systems already announced (example SiFive P650 which will
have 16 cores). The "maxItems = 9" set by this patch will soon
be out-of-date.
The "maxItems" should represent PLIC spec constraints so
please don't add any synthetic value here.
Regards,
Anup
>
> Signed-off-by: Geert Uytterhoeven <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> ---
> v3:
> - Add Acked-by,
>
> v2:
> - Split in two patches,
> - Improve patch description and document limit rationale.
> ---
> .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index 28b6b17fe4b26778..0c6687511457413e 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -62,6 +62,7 @@ properties:
>
> interrupts-extended:
> minItems: 1
> + maxItems: 9
> description:
> Specifies which contexts are connected to the PLIC, with "-1" specifying
> that a context is not present. Each node pointed to should be a
> --
> 2.25.1
>