Add support in the qcom-spmi-temp-alarm driver for the new PMIC
TEMP_ALARM peripheral subtypes: GEN2 rev 2 and LITE. The GEN2 rev 2
subtype provides greater flexibility in temperature threshold
specification by using an independent register value to configure
each of the three thresholds. The LITE subtype utilizes a simplified
set of control registers to configure two thresholds: warning and
shutdown.
Also add support to avoid a potential issue on certain versions of
the TEMP_ALARM GEN2 subtype when automatic stage 2 partial shutdown
is disabled.
Changes since v2 [1]:
* Added missing header <linux/bitfield.h> in the third patch
Changes since v1 [2]:
* Updated the thermal API usage in the patches to work with the recent commit
ca1b9a9eb3fd ("thermal/drivers/qcom: Switch to new of API")
[1]: https://lore.kernel.org/lkml/[email protected]/
[2]: https://lore.kernel.org/lkml/[email protected]/
David Collins (3):
thermal: qcom-spmi-temp-alarm: enable stage 2 shutdown when required
thermal: qcom-spmi-temp-alarm: add support for GEN2 rev 2 PMIC
peripherals
thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals
drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 407 +++++++++++++++++++-
1 file changed, 392 insertions(+), 15 deletions(-)
--
2.25.1
Certain TEMP_ALARM GEN2 PMIC peripherals need over-temperature
stage 2 automatic PMIC partial shutdown to be enabled in order to
avoid repeated faults in the event of reaching over-temperature
stage 3. Modify the stage 2 shutdown control logic to ensure that
stage 2 shutdown is enabled on all affected PMICs. Read the
digital major and minor revision registers to identify these
PMICs.
Signed-off-by: David Collins <[email protected]>
---
drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 32 +++++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
index ad84978109e6..e2e52703ac4d 100644
--- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
+++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/bitops.h>
@@ -18,6 +19,7 @@
#include "../thermal_core.h"
#include "../thermal_hwmon.h"
+#define QPNP_TM_REG_DIG_MINOR 0x00
#define QPNP_TM_REG_DIG_MAJOR 0x01
#define QPNP_TM_REG_TYPE 0x04
#define QPNP_TM_REG_SUBTYPE 0x05
@@ -73,6 +75,7 @@ struct qpnp_tm_chip {
struct device *dev;
struct thermal_zone_device *tz_dev;
unsigned int subtype;
+ unsigned int dig_revision;
long temp;
unsigned int thresh;
unsigned int stage;
@@ -224,6 +227,7 @@ static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1];
long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1];
bool disable_s2_shutdown = false;
+ bool require_s2_shutdown = false;
u8 reg;
WARN_ON(!mutex_is_locked(&chip->lock));
@@ -256,9 +260,25 @@ static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
temp, stage2_threshold_max, stage2_threshold_max);
}
+ if (chip->subtype == QPNP_TM_SUBTYPE_GEN2) {
+ /*
+ * Check if stage 2 automatic partial shutdown must remain
+ * enabled to avoid potential repeated faults upon reaching
+ * over-temperature stage 3.
+ */
+ switch (chip->dig_revision) {
+ case 0x0001:
+ case 0x0002:
+ case 0x0100:
+ case 0x0101:
+ require_s2_shutdown = true;
+ break;
+ }
+ }
+
skip:
reg |= chip->thresh;
- if (disable_s2_shutdown)
+ if (disable_s2_shutdown && !require_s2_shutdown)
reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
@@ -373,7 +393,7 @@ static int qpnp_tm_probe(struct platform_device *pdev)
{
struct qpnp_tm_chip *chip;
struct device_node *node;
- u8 type, subtype, dig_major;
+ u8 type, subtype, dig_major, dig_minor;
u32 res;
int ret, irq;
@@ -429,6 +449,14 @@ static int qpnp_tm_probe(struct platform_device *pdev)
return ret;
}
+ ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MINOR, &dig_minor);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "could not read dig_minor\n");
+ return ret;
+ }
+
+ chip->dig_revision = (dig_major << 8) | dig_minor;
+
if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
&& subtype != QPNP_TM_SUBTYPE_GEN2)) {
dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
--
2.25.1
On 1/24/23 15:46, David Collins wrote:
> Add support in the qcom-spmi-temp-alarm driver for the new PMIC
> TEMP_ALARM peripheral subtypes: GEN2 rev 2 and LITE. The GEN2 rev 2
> subtype provides greater flexibility in temperature threshold
> specification by using an independent register value to configure
> each of the three thresholds. The LITE subtype utilizes a simplified
> set of control registers to configure two thresholds: warning and
> shutdown.
>
> Also add support to avoid a potential issue on certain versions of
> the TEMP_ALARM GEN2 subtype when automatic stage 2 partial shutdown
> is disabled.
>
> Changes since v2 [1]:
> * Added missing header <linux/bitfield.h> in the third patch
>
> Changes since v1 [2]:
> * Updated the thermal API usage in the patches to work with the recent commit
> ca1b9a9eb3fd ("thermal/drivers/qcom: Switch to new of API")
>
> [1]: https://lore.kernel.org/lkml/[email protected]/
> [2]: https://lore.kernel.org/lkml/[email protected]/
>
> David Collins (3):
> thermal: qcom-spmi-temp-alarm: enable stage 2 shutdown when required
> thermal: qcom-spmi-temp-alarm: add support for GEN2 rev 2 PMIC
> peripherals
> thermal: qcom-spmi-temp-alarm: add support for LITE PMIC peripherals
>
> drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 407 +++++++++++++++++++-
> 1 file changed, 392 insertions(+), 15 deletions(-)
Hello Amit and Thara,
Could you please take a look at this patch series when you have some
time? It hasn't received any feedback yet after being sent out on
1/24/2023.
According to the MAINTAINERS files, you are the maintainers for all
files in the drivers/thermal/qcom/ directory:
QUALCOMM TSENS THERMAL DRIVER
M: Amit Kucheria <[email protected]>
M: Thara Gopinath <[email protected]>
L: [email protected]
L: [email protected]
S: Maintained
F: Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
F: drivers/thermal/qcom/
Can you please check if this entry needs to be updated? The
drivers/thermal/qcom directory now contains the qcom-tsens driver as
well as three other independent QCOM thermal drivers:
qcom-spmi-temp-alarm, qcom-spmi-adc-tm5, and lmh.
Thanks,
David
On 25/01/2023 01:46, David Collins wrote:
> Certain TEMP_ALARM GEN2 PMIC peripherals need over-temperature
> stage 2 automatic PMIC partial shutdown to be enabled in order to
> avoid repeated faults in the event of reaching over-temperature
> stage 3. Modify the stage 2 shutdown control logic to ensure that
> stage 2 shutdown is enabled on all affected PMICs. Read the
> digital major and minor revision registers to identify these
> PMICs.
>
> Signed-off-by: David Collins <[email protected]>
> ---
> drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 32 +++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> index ad84978109e6..e2e52703ac4d 100644
> --- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> +++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /*
> * Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
> */
>
> #include <linux/bitops.h>
> @@ -18,6 +19,7 @@
> #include "../thermal_core.h"
> #include "../thermal_hwmon.h"
>
> +#define QPNP_TM_REG_DIG_MINOR 0x00
> #define QPNP_TM_REG_DIG_MAJOR 0x01
> #define QPNP_TM_REG_TYPE 0x04
> #define QPNP_TM_REG_SUBTYPE 0x05
> @@ -73,6 +75,7 @@ struct qpnp_tm_chip {
> struct device *dev;
> struct thermal_zone_device *tz_dev;
> unsigned int subtype;
> + unsigned int dig_revision;
> long temp;
> unsigned int thresh;
> unsigned int stage;
> @@ -224,6 +227,7 @@ static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
> long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1];
> long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1];
> bool disable_s2_shutdown = false;
> + bool require_s2_shutdown = false;
> u8 reg;
>
> WARN_ON(!mutex_is_locked(&chip->lock));
> @@ -256,9 +260,25 @@ static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip,
> temp, stage2_threshold_max, stage2_threshold_max);
> }
>
> + if (chip->subtype == QPNP_TM_SUBTYPE_GEN2) {
> + /*
> + * Check if stage 2 automatic partial shutdown must remain
> + * enabled to avoid potential repeated faults upon reaching
> + * over-temperature stage 3.
> + */
> + switch (chip->dig_revision) {
> + case 0x0001:
> + case 0x0002:
> + case 0x0100:
> + case 0x0101:
> + require_s2_shutdown = true;
> + break;
> + }
> + }
Please move this switch to _probe and set chip->require_s2_shutdown instead.
> +
> skip:
> reg |= chip->thresh;
> - if (disable_s2_shutdown)
> + if (disable_s2_shutdown && !require_s2_shutdown)
> reg |= SHUTDOWN_CTRL1_OVERRIDE_S2;
>
> return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg);
> @@ -373,7 +393,7 @@ static int qpnp_tm_probe(struct platform_device *pdev)
> {
> struct qpnp_tm_chip *chip;
> struct device_node *node;
> - u8 type, subtype, dig_major;
> + u8 type, subtype, dig_major, dig_minor;
> u32 res;
> int ret, irq;
>
> @@ -429,6 +449,14 @@ static int qpnp_tm_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MINOR, &dig_minor);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "could not read dig_minor\n");
> + return ret;
> + }
> +
> + chip->dig_revision = (dig_major << 8) | dig_minor;
> +
> if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1
> && subtype != QPNP_TM_SUBTYPE_GEN2)) {
> dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n",
--
With best wishes
Dmitry