Hi,
Gigabyte (and/or AMI and/or VIA) decided that it is not worth
of effort to create full mptable and since version F5a for 6VXD7
they do not report PCI interrupts as 16-19, but only as traditional
0-15 (and they do not report them as conforms/conforms, but as
active-lo/level).
For now I hardwired correct routing table into my kernel, as
I have other uses for IRQ < 16, but after some investigation I
found that ACPI _SB_.PCI0._PRT element returns correct routing
table (using IRQ 16-19). So my question is, are there any plans
to use ACPI tables to get IRQ routing tables, or should I complain
to Gigabyte that I'm not satisfied (I'll complain anyway, but...)?
Thanks,
Petr Vandrovec
[email protected]
P.S.: No, there is no MPS1.1/MPS1.4 switch in BIOS (anymore) :-(
And no, there is no way to disable ACPI in that BIOS :-((
/* Old working BIOS... 6VXD7 - F2 */
Dec 22 23:03:41 vana kernel: Intel MultiProcessor Specification v1.1
Dec 22 23:03:41 vana kernel: Virtual Wire compatibility mode.
Dec 22 23:03:41 vana kernel: OEM ID: VIA Product ID: VT3075 APIC at: 0xFEE00000
Dec 22 23:03:41 vana kernel: Bus #0 is PCI
Dec 22 23:03:41 vana kernel: Bus #1 is PCI
Dec 22 23:03:41 vana kernel: Bus #2 is ISA
Dec 22 23:03:41 vana kernel: I/O APIC #2 Version 17 at 0xFEC00000.
Dec 22 23:03:41 vana kernel: Int: type 3, pol 0, trig 0, bus 2, IRQ 00, APIC ID 2, APIC INT 00
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 01, APIC ID 2, APIC INT 01
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 00, APIC ID 2, APIC INT 02
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 03, APIC ID 2, APIC INT 03
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 04, APIC ID 2, APIC INT 04
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 05, APIC ID 2, APIC INT 05
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 06, APIC ID 2, APIC INT 06
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 07, APIC ID 2, APIC INT 07
Dec 22 23:03:41 vana kernel: Int: type 0, pol 1, trig 1, bus 2, IRQ 08, APIC ID 2, APIC INT 08
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 09, APIC ID 2, APIC INT 09
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0a, APIC ID 2, APIC INT 0a
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0b, APIC ID 2, APIC INT 0b
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0c, APIC ID 2, APIC INT 0c
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0d, APIC ID 2, APIC INT 0d
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0e, APIC ID 2, APIC INT 0e
Dec 22 23:03:41 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0f, APIC ID 2, APIC INT 0f
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 1, IRQ 00, APIC ID 2, APIC INT 10
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 34, APIC ID 2, APIC INT 11
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 38, APIC ID 2, APIC INT 12
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 28, APIC ID 2, APIC INT 12
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 2c, APIC ID 2, APIC INT 13
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 2c, APIC ID 2, APIC INT 13
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 1f, APIC ID 2, APIC INT 13
Dec 22 23:03:41 vana kernel: Int: type 0, pol 3, trig 3, bus 0, IRQ 1f, APIC ID 2, APIC INT 13
Dec 22 23:03:41 vana kernel: Int: type 2, pol 0, trig 0, bus 2, IRQ 00, APIC ID 2, APIC INT 17
Dec 22 23:03:41 vana kernel: Lint: type 3, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 00
Dec 22 23:03:41 vana kernel: Lint: type 1, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 01
Dec 22 23:03:41 vana kernel: Processors: 2
/* 'Broken' 6VXD7 - F5a */
Feb 22 19:53:16 vana kernel: Intel MultiProcessor Specification v1.1
Feb 22 19:53:16 vana kernel: Virtual Wire compatibility mode.
Feb 22 19:53:16 vana kernel: OEM ID: VIA Product ID: VT3075 APIC at: 0xFEE00000
Feb 22 19:53:16 vana kernel: Bus #0 is PCI
Feb 22 19:53:16 vana kernel: Bus #1 is PCI
Feb 22 19:53:16 vana kernel: Bus #2 is ISA
Feb 22 19:53:16 vana kernel: I/O APIC #2 Version 17 at 0xFEC00000.
Feb 22 19:53:16 vana kernel: Int: type 3, pol 0, trig 0, bus 2, IRQ 00, APIC ID 2, APIC INT 00
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 01, APIC ID 2, APIC INT 01
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 00, APIC ID 2, APIC INT 02
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 03, APIC ID 2, APIC INT 03
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 04, APIC ID 2, APIC INT 04
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 06, APIC ID 2, APIC INT 06
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 07, APIC ID 2, APIC INT 07
Feb 22 19:53:16 vana kernel: Int: type 0, pol 1, trig 1, bus 2, IRQ 08, APIC ID 2, APIC INT 08
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0c, APIC ID 2, APIC INT 0c
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0d, APIC ID 2, APIC INT 0d
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0e, APIC ID 2, APIC INT 0e
Feb 22 19:53:16 vana kernel: Int: type 0, pol 0, trig 0, bus 2, IRQ 0f, APIC ID 2, APIC INT 0f
Feb 22 19:53:16 vana kernel: Int: type 0, pol 3, trig 3, bus 2, IRQ 0b, APIC ID 2, APIC INT 0b
Feb 22 19:53:16 vana kernel: Int: type 0, pol 3, trig 3, bus 2, IRQ 09, APIC ID 2, APIC INT 09
Feb 22 19:53:16 vana kernel: Int: type 0, pol 3, trig 3, bus 2, IRQ 0a, APIC ID 2, APIC INT 0a
Feb 22 19:53:16 vana kernel: Int: type 0, pol 3, trig 3, bus 2, IRQ 05, APIC ID 2, APIC INT 05
Feb 22 19:53:16 vana kernel: Lint: type 3, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 00
Feb 22 19:53:16 vana kernel: Lint: type 1, pol 0, trig 0, bus 0, IRQ 00, APIC ID ff, APIC LINT 01
Feb 22 19:53:16 vana kernel: Processors: 2
There are definitely plans to do this, and in fact on IA64 ACPI is already
used to obtain PCI routing. However, IA32 ACPI efforts have been focused on
other things, since we assumed MPS tables would be around for a while
longer. I guess that is no longer a correct assumption.
So yes, there are plans. ;-)
Regards -- Andy
> Hi,
> Gigabyte (and/or AMI and/or VIA) decided that it is not worth
> of effort to create full mptable and since version F5a for 6VXD7
> they do not report PCI interrupts as 16-19, but only as traditional
> 0-15 (and they do not report them as conforms/conforms, but as
> active-lo/level).
>
> For now I hardwired correct routing table into my kernel, as
> I have other uses for IRQ < 16, but after some investigation I
> found that ACPI _SB_.PCI0._PRT element returns correct routing
> table (using IRQ 16-19). So my question is, are there any plans
> to use ACPI tables to get IRQ routing tables, or should I complain
> to Gigabyte that I'm not satisfied (I'll complain anyway, but...)?
>
> Thanks,
> Petr Vandrovec
> [email protected]
>
> P.S.: No, there is no MPS1.1/MPS1.4 switch in BIOS (anymore) :-(
> And no, there is no way to disable ACPI in that BIOS :-((
Petr-
Where does someone find/get BIOS version F5a for the 6VXD7?
The latest that I see on the Gigabyte web pages is F5.
Thanks,
~Randy
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hi,
Gigabyte (and/or AMI and/or VIA) decided that it is not worth
of effort to create full mptable and since version F5a for 6VXD7
they do not report PCI interrupts as 16-19, but only as traditional
0-15 (and they do not report them as conforms/conforms, but as
active-lo/level).
For now I hardwired correct routing table into my kernel, as
I have other uses for IRQ < 16, but after some investigation I
found that ACPI _SB_.PCI0._PRT element returns correct routing
table (using IRQ 16-19). So my question is, are there any plans
to use ACPI tables to get IRQ routing tables, or should I complain
to Gigabyte that I'm not satisfied (I'll complain anyway, but...)?
Thanks,
Petr Vandrovec
[email protected]
P.S.: No, there is no MPS1.1/MPS1.4 switch in BIOS (anymore) :-(
And no, there is no way to disable ACPI in that BIOS :-((
/* Old working BIOS... 6VXD7 - F2 */
...
/* 'Broken' 6VXD7 - F5a */
...
On Fri, Jul 13, 2001 at 04:53:58PM -0700, Randy.Dunlap wrote:
> Petr-
>
> Where does someone find/get BIOS version F5a for the 6VXD7?
> The latest that I see on the Gigabyte web pages is F5.
It might be that F5a is older than F5, as on my filesystem
F5a has date Feb8, while F5 has Mar23 ... But it does not
matter, as both report same broken table, at least for me.
So I have kernel patched with self written IRQ routing table
instead of with BIOS's one, and machine is happy using
IRQ16-19. This implies that I did not coded retrieving
IRQ routing info from ACPI. With current discussions about
moving ACPI to userspace it might be even impossible, as
you for sure want console before you enter userspace,
but you cannot have console if you did not enumerate
devices (video card) yet...
Best regards,
Petr Vandrovec
[email protected]