Hi,
i'm having linuxppc-embedded based system (2.4.21-pre, but 2.4.20 shows
same results) with a normal ATAPI-5-styled IDE controller.
When using a 200GB Maxtor HDD, there are strange effects. When writing
just the sector number to every sector (or every 100MB is enough), and
reading back, data from incorrect sectors is read. The upper 24bit of
the LBA seem to be invalid, shows like the upper 24bit aren't updated in
the 2 cycle LBA-write in the ide-disk.c. For example, reading from
0x946000000 (LBA 0x4A30000) will read from 0x2f46000000 (LBA 0x17A30000).
note that i lineary fill the disk, and 0x17xxxxxx is the highest
possible LBA, so the last upper bit from the write won't be actualized
any more when reading back from lower addresses.
However, reading them back (using the HOB-bit) will work and give
correct results. I don't really know whats going wrong, except that
there are addressing-faults.
Is this a known bug of the Maxtor 6Y200L maybe? the 160GB version showed
the same effect.
Is it possible that the IDE-Controller causes the fault? normal 28bit
HDDs work just fine.
Can somebody please confirm again that i don't need an atapi-6 (ATA133)
controller to use LBA48 ?
Regulary some people are stating this, and regulary some people tell
that these people are wrong.
felix
On Tue, 2003-03-18 at 14:30, Felix Domke wrote:
> Can somebody please confirm again that i don't need an atapi-6 (ATA133)
> controller to use LBA48 ?
>
> Regulary some people are stating this, and regulary some people tell
> that these people are wrong.
LBA48 support and UDMA100/133 support are unrelated to one another.
There are controllers with one or the other, eg the older ALi can do
UDMA133 but not LBA48
Consult your IDE controller vendor
Alan Cox wrote:
> LBA48 support and UDMA100/133 support are unrelated to one another.
> There are controllers with one or the other, eg the older ALi can do
> UDMA133 but not LBA48
OK, looks bad for me.
Just for my interest:
Why does a certain IDE controller not support LBA48?
I always thought an IDE controller isn't more than some ISA-styled bus
with 3 address lines, 2 chip selects and special stuff for
DMA-transfers, together with very special timing generators for PIO-modes.
Whats the problem with these controllers? LBA48, i thought, isn't more
than writing the LBA-registers twice (because of the FIFO), and using
different commands for reading/writing (the _EXT functions).
felix
On Tue, 2003-03-18 at 18:20, Felix Domke wrote:
> Why does a certain IDE controller not support LBA48?
In DMA mode some of them have state machines that know too much.
The double pump of the control registers confuses them.