2023-10-28 19:07:57

by Bryan O'Donoghue

[permalink] [raw]
Subject: Re: [PATCH] clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz

On 28/10/2023 13:07, Vincent Knecht wrote:
> Fix mclk0 & mclk1 parent map to use correct GPLL6 configuration and
> freq_tbl to use GPLL6 instead of GPLL0 so that they tick at 24 MHz.
>
> Fixes: 1664014e4679 ("clk: qcom: gcc-msm8939: Add MSM8939 Generic Clock Controller")
> Suggested-by: Stephan Gerhold <[email protected]>
> Signed-off-by: Vincent Knecht <[email protected]>
> ---
> drivers/clk/qcom/gcc-msm8939.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-msm8939.c b/drivers/clk/qcom/gcc-msm8939.c
> index b45f97c07eeb..e4a44377b75f 100644
> --- a/drivers/clk/qcom/gcc-msm8939.c
> +++ b/drivers/clk/qcom/gcc-msm8939.c
> @@ -432,7 +432,7 @@ static const struct parent_map gcc_xo_gpll0_gpll1a_gpll6_sleep_map[] = {
> { P_XO, 0 },
> { P_GPLL0, 1 },
> { P_GPLL1_AUX, 2 },
> - { P_GPLL6, 2 },
> + { P_GPLL6, 3 },
> { P_SLEEP_CLK, 6 },
> };
>
> @@ -1100,7 +1100,7 @@ static struct clk_rcg2 jpeg0_clk_src = {
> };
>
> static const struct freq_tbl ftbl_gcc_camss_mclk0_1_clk[] = {
> - F(24000000, P_GPLL0, 1, 1, 45),
> + F(24000000, P_GPLL6, 1, 1, 45),
> F(66670000, P_GPLL0, 12, 0, 0),
> { }
> };

Reviewed-by: Bryan O'Donoghue <[email protected]>