PMC master clock register offset is different b/w sam9x60 and
other SoCs. Since there is a need of this register offset in
shutdown procedure we need to have it per SoC. This is what
this series does.
Changes in v2:
- do not use r5 as intermediary registers in at91_poweroff
Claudiu Beznea (2):
power: reset: at91-poweroff: introduce struct shdwc_reg_config
power: reset: at91-poweroff: use proper master clock register offset
drivers/power/reset/at91-sama5d2_shdwc.c | 72 +++++++++++++++++++++-----------
1 file changed, 47 insertions(+), 25 deletions(-)
--
2.7.4
This driver uses AT91_PMC_MCKR in poweroff() function. But the
SAM9X60's PMC versions maps AT91_PMC_MCKR functionality at different
offset compared to the SAMA5D2's one. This patch prepares the field
so that different AT91_PMC_MCKR's offsets to be introduced in
struct reg_config so that proper offset to be used for AT91_PMC_MCKR
based on compatible string.
Signed-off-by: Claudiu Beznea <[email protected]>
---
drivers/power/reset/at91-sama5d2_shdwc.c | 54 +++++++++++++++++++-------------
1 file changed, 32 insertions(+), 22 deletions(-)
diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c
index 1c18f465a245..84806d20846b 100644
--- a/drivers/power/reset/at91-sama5d2_shdwc.c
+++ b/drivers/power/reset/at91-sama5d2_shdwc.c
@@ -66,7 +66,7 @@
#define SHDW_CFG_NOT_USED (32)
-struct shdwc_config {
+struct shdwc_reg_config {
u8 wkup_pin_input;
u8 mr_rtcwk_shift;
u8 mr_rttwk_shift;
@@ -74,8 +74,12 @@ struct shdwc_config {
u8 sr_rttwk_shift;
};
+struct reg_config {
+ struct shdwc_reg_config shdwc;
+};
+
struct shdwc {
- const struct shdwc_config *cfg;
+ const struct reg_config *rcfg;
struct clk *sclk;
void __iomem *shdwc_base;
void __iomem *mpddrc_base;
@@ -95,6 +99,7 @@ static const unsigned long long sdwc_dbc_period[] = {
static void __init at91_wakeup_status(struct platform_device *pdev)
{
struct shdwc *shdw = platform_get_drvdata(pdev);
+ const struct reg_config *rcfg = shdw->rcfg;
u32 reg;
char *reason = "unknown";
@@ -106,11 +111,11 @@ static void __init at91_wakeup_status(struct platform_device *pdev)
if (!reg)
return;
- if (SHDW_WK_PIN(reg, shdw->cfg))
+ if (SHDW_WK_PIN(reg, &rcfg->shdwc))
reason = "WKUP pin";
- else if (SHDW_RTCWK(reg, shdw->cfg))
+ else if (SHDW_RTCWK(reg, &rcfg->shdwc))
reason = "RTC";
- else if (SHDW_RTTWK(reg, shdw->cfg))
+ else if (SHDW_RTTWK(reg, &rcfg->shdwc))
reason = "RTT";
pr_info("AT91: Wake-Up source: %s\n", reason);
@@ -215,6 +220,7 @@ static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
static void at91_shdwc_dt_configure(struct platform_device *pdev)
{
struct shdwc *shdw = platform_get_drvdata(pdev);
+ const struct reg_config *rcfg = shdw->rcfg;
struct device_node *np = pdev->dev.of_node;
u32 mode = 0, tmp, input;
@@ -227,10 +233,10 @@ static void at91_shdwc_dt_configure(struct platform_device *pdev)
mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
- mode |= SHDW_RTCWKEN(shdw->cfg);
+ mode |= SHDW_RTCWKEN(&rcfg->shdwc);
if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
- mode |= SHDW_RTTWKEN(shdw->cfg);
+ mode |= SHDW_RTTWKEN(&rcfg->shdwc);
dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
@@ -239,30 +245,34 @@ static void at91_shdwc_dt_configure(struct platform_device *pdev)
writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
}
-static const struct shdwc_config sama5d2_shdwc_config = {
- .wkup_pin_input = 0,
- .mr_rtcwk_shift = 17,
- .mr_rttwk_shift = SHDW_CFG_NOT_USED,
- .sr_rtcwk_shift = 5,
- .sr_rttwk_shift = SHDW_CFG_NOT_USED,
+static const struct reg_config sama5d2_reg_config = {
+ .shdwc = {
+ .wkup_pin_input = 0,
+ .mr_rtcwk_shift = 17,
+ .mr_rttwk_shift = SHDW_CFG_NOT_USED,
+ .sr_rtcwk_shift = 5,
+ .sr_rttwk_shift = SHDW_CFG_NOT_USED,
+ },
};
-static const struct shdwc_config sam9x60_shdwc_config = {
- .wkup_pin_input = 0,
- .mr_rtcwk_shift = 17,
- .mr_rttwk_shift = 16,
- .sr_rtcwk_shift = 5,
- .sr_rttwk_shift = 4,
+static const struct reg_config sam9x60_reg_config = {
+ .shdwc = {
+ .wkup_pin_input = 0,
+ .mr_rtcwk_shift = 17,
+ .mr_rttwk_shift = 16,
+ .sr_rtcwk_shift = 5,
+ .sr_rttwk_shift = 4,
+ },
};
static const struct of_device_id at91_shdwc_of_match[] = {
{
.compatible = "atmel,sama5d2-shdwc",
- .data = &sama5d2_shdwc_config,
+ .data = &sama5d2_reg_config,
},
{
.compatible = "microchip,sam9x60-shdwc",
- .data = &sam9x60_shdwc_config,
+ .data = &sam9x60_reg_config,
}, {
/*sentinel*/
}
@@ -303,7 +313,7 @@ static int __init at91_shdwc_probe(struct platform_device *pdev)
}
match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
- at91_shdwc->cfg = match->data;
+ at91_shdwc->rcfg = match->data;
at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(at91_shdwc->sclk))
--
2.7.4
SAM9X60's PMC uses different offset for master clock register.
Add a member of type struct pmc_reg_config in struct reg_config,
fill it correspondingly for SAMA5D2 and SAM9X60 and use it in
poweroff() function.
Signed-off-by: Claudiu Beznea <[email protected]>
---
drivers/power/reset/at91-sama5d2_shdwc.c | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c b/drivers/power/reset/at91-sama5d2_shdwc.c
index 84806d20846b..2fe3a627cb53 100644
--- a/drivers/power/reset/at91-sama5d2_shdwc.c
+++ b/drivers/power/reset/at91-sama5d2_shdwc.c
@@ -74,8 +74,13 @@ struct shdwc_reg_config {
u8 sr_rttwk_shift;
};
+struct pmc_reg_config {
+ u8 mckr;
+};
+
struct reg_config {
struct shdwc_reg_config shdwc;
+ struct pmc_reg_config pmc;
};
struct shdwc {
@@ -136,9 +141,9 @@ static void at91_poweroff(void)
" str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
/* Switch the master clock source to slow clock. */
- "1: ldr r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
+ "1: ldr r6, [%4, %5]\n\t"
" bic r6, r6, #" __stringify(AT91_PMC_CSS) "\n\t"
- " str r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
+ " str r6, [%4, %5]\n\t"
/* Wait for clock switch. */
"2: ldr r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
" tst r6, #" __stringify(AT91_PMC_MCKRDY) "\n\t"
@@ -153,7 +158,8 @@ static void at91_poweroff(void)
"r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
"r" (at91_shdwc->shdwc_base),
"r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
- "r" (at91_shdwc->pmc_base)
+ "r" (at91_shdwc->pmc_base),
+ "r" (at91_shdwc->rcfg->pmc.mckr)
: "r6");
}
@@ -253,6 +259,9 @@ static const struct reg_config sama5d2_reg_config = {
.sr_rtcwk_shift = 5,
.sr_rttwk_shift = SHDW_CFG_NOT_USED,
},
+ .pmc = {
+ .mckr = 0x30,
+ },
};
static const struct reg_config sam9x60_reg_config = {
@@ -263,6 +272,9 @@ static const struct reg_config sam9x60_reg_config = {
.sr_rtcwk_shift = 5,
.sr_rttwk_shift = 4,
},
+ .pmc = {
+ .mckr = 0x28,
+ },
};
static const struct of_device_id at91_shdwc_of_match[] = {
--
2.7.4
Le vendredi 20 décembre 2019 à 17:31 +0200, Claudiu Beznea a écrit :
> This driver uses AT91_PMC_MCKR in poweroff() function. But the
> SAM9X60's PMC versions maps AT91_PMC_MCKR functionality at different
> offset compared to the SAMA5D2's one. This patch prepares the field
> so that different AT91_PMC_MCKR's offsets to be introduced in
> struct reg_config so that proper offset to be used for AT91_PMC_MCKR
> based on compatible string.
>
> Signed-off-by: Claudiu Beznea <[email protected]>
Acked-by: Nicolas Ferre <[email protected]>
> ---
> drivers/power/reset/at91-sama5d2_shdwc.c | 54 +++++++++++++++++++--------
> -----
> 1 file changed, 32 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c
> b/drivers/power/reset/at91-sama5d2_shdwc.c
> index 1c18f465a245..84806d20846b 100644
> --- a/drivers/power/reset/at91-sama5d2_shdwc.c
> +++ b/drivers/power/reset/at91-sama5d2_shdwc.c
> @@ -66,7 +66,7 @@
>
> #define SHDW_CFG_NOT_USED (32)
>
> -struct shdwc_config {
> +struct shdwc_reg_config {
> u8 wkup_pin_input;
> u8 mr_rtcwk_shift;
> u8 mr_rttwk_shift;
> @@ -74,8 +74,12 @@ struct shdwc_config {
> u8 sr_rttwk_shift;
> };
>
> +struct reg_config {
> + struct shdwc_reg_config shdwc;
> +};
> +
> struct shdwc {
> - const struct shdwc_config *cfg;
> + const struct reg_config *rcfg;
> struct clk *sclk;
> void __iomem *shdwc_base;
> void __iomem *mpddrc_base;
> @@ -95,6 +99,7 @@ static const unsigned long long sdwc_dbc_period[] = {
> static void __init at91_wakeup_status(struct platform_device *pdev)
> {
> struct shdwc *shdw = platform_get_drvdata(pdev);
> + const struct reg_config *rcfg = shdw->rcfg;
> u32 reg;
> char *reason = "unknown";
>
> @@ -106,11 +111,11 @@ static void __init at91_wakeup_status(struct
> platform_device *pdev)
> if (!reg)
> return;
>
> - if (SHDW_WK_PIN(reg, shdw->cfg))
> + if (SHDW_WK_PIN(reg, &rcfg->shdwc))
> reason = "WKUP pin";
> - else if (SHDW_RTCWK(reg, shdw->cfg))
> + else if (SHDW_RTCWK(reg, &rcfg->shdwc))
> reason = "RTC";
> - else if (SHDW_RTTWK(reg, shdw->cfg))
> + else if (SHDW_RTTWK(reg, &rcfg->shdwc))
> reason = "RTT";
>
> pr_info("AT91: Wake-Up source: %s\n", reason);
> @@ -215,6 +220,7 @@ static u32 at91_shdwc_get_wakeup_input(struct
> platform_device *pdev,
> static void at91_shdwc_dt_configure(struct platform_device *pdev)
> {
> struct shdwc *shdw = platform_get_drvdata(pdev);
> + const struct reg_config *rcfg = shdw->rcfg;
> struct device_node *np = pdev->dev.of_node;
> u32 mode = 0, tmp, input;
>
> @@ -227,10 +233,10 @@ static void at91_shdwc_dt_configure(struct
> platform_device *pdev)
> mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev,
> tmp));
>
> if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
> - mode |= SHDW_RTCWKEN(shdw->cfg);
> + mode |= SHDW_RTCWKEN(&rcfg->shdwc);
>
> if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
> - mode |= SHDW_RTTWKEN(shdw->cfg);
> + mode |= SHDW_RTTWKEN(&rcfg->shdwc);
>
> dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
> writel(mode, shdw->shdwc_base + AT91_SHDW_MR);
> @@ -239,30 +245,34 @@ static void at91_shdwc_dt_configure(struct
> platform_device *pdev)
> writel(input, shdw->shdwc_base + AT91_SHDW_WUIR);
> }
>
> -static const struct shdwc_config sama5d2_shdwc_config = {
> - .wkup_pin_input = 0,
> - .mr_rtcwk_shift = 17,
> - .mr_rttwk_shift = SHDW_CFG_NOT_USED,
> - .sr_rtcwk_shift = 5,
> - .sr_rttwk_shift = SHDW_CFG_NOT_USED,
> +static const struct reg_config sama5d2_reg_config = {
> + .shdwc = {
> + .wkup_pin_input = 0,
> + .mr_rtcwk_shift = 17,
> + .mr_rttwk_shift = SHDW_CFG_NOT_USED,
> + .sr_rtcwk_shift = 5,
> + .sr_rttwk_shift = SHDW_CFG_NOT_USED,
> + },
> };
>
> -static const struct shdwc_config sam9x60_shdwc_config = {
> - .wkup_pin_input = 0,
> - .mr_rtcwk_shift = 17,
> - .mr_rttwk_shift = 16,
> - .sr_rtcwk_shift = 5,
> - .sr_rttwk_shift = 4,
> +static const struct reg_config sam9x60_reg_config = {
> + .shdwc = {
> + .wkup_pin_input = 0,
> + .mr_rtcwk_shift = 17,
> + .mr_rttwk_shift = 16,
> + .sr_rtcwk_shift = 5,
> + .sr_rttwk_shift = 4,
> + },
> };
>
> static const struct of_device_id at91_shdwc_of_match[] = {
> {
> .compatible = "atmel,sama5d2-shdwc",
> - .data = &sama5d2_shdwc_config,
> + .data = &sama5d2_reg_config,
> },
> {
> .compatible = "microchip,sam9x60-shdwc",
> - .data = &sam9x60_shdwc_config,
> + .data = &sam9x60_reg_config,
> }, {
> /*sentinel*/
> }
> @@ -303,7 +313,7 @@ static int __init at91_shdwc_probe(struct
> platform_device *pdev)
> }
>
> match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
> - at91_shdwc->cfg = match->data;
> + at91_shdwc->rcfg = match->data;
>
> at91_shdwc->sclk = devm_clk_get(&pdev->dev, NULL);
> if (IS_ERR(at91_shdwc->sclk))
Le vendredi 20 décembre 2019 à 17:31 +0200, Claudiu Beznea a écrit :
> SAM9X60's PMC uses different offset for master clock register.
> Add a member of type struct pmc_reg_config in struct reg_config,
> fill it correspondingly for SAMA5D2 and SAM9X60 and use it in
> poweroff() function.
>
> Signed-off-by: Claudiu Beznea <[email protected]>
Acked-by: Nicolas Ferre <[email protected]>
> ---
> drivers/power/reset/at91-sama5d2_shdwc.c | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/power/reset/at91-sama5d2_shdwc.c
> b/drivers/power/reset/at91-sama5d2_shdwc.c
> index 84806d20846b..2fe3a627cb53 100644
> --- a/drivers/power/reset/at91-sama5d2_shdwc.c
> +++ b/drivers/power/reset/at91-sama5d2_shdwc.c
> @@ -74,8 +74,13 @@ struct shdwc_reg_config {
> u8 sr_rttwk_shift;
> };
>
> +struct pmc_reg_config {
> + u8 mckr;
> +};
> +
> struct reg_config {
> struct shdwc_reg_config shdwc;
> + struct pmc_reg_config pmc;
> };
>
> struct shdwc {
> @@ -136,9 +141,9 @@ static void at91_poweroff(void)
> " str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
>
> /* Switch the master clock source to slow clock. */
> - "1: ldr r6, [%4, #" __stringify(AT91_PMC_MCKR)
> "]\n\t"
> + "1: ldr r6, [%4, %5]\n\t"
> " bic r6, r6, #" __stringify(AT91_PMC_CSS) "\n\t"
> - " str r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
> + " str r6, [%4, %5]\n\t"
> /* Wait for clock switch. */
> "2: ldr r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
> " tst r6, #" __stringify(AT91_PMC_MCKRDY) "\n\t"
> @@ -153,7 +158,8 @@ static void at91_poweroff(void)
> "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
> "r" (at91_shdwc->shdwc_base),
> "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
> - "r" (at91_shdwc->pmc_base)
> + "r" (at91_shdwc->pmc_base),
> + "r" (at91_shdwc->rcfg->pmc.mckr)
> : "r6");
> }
>
> @@ -253,6 +259,9 @@ static const struct reg_config sama5d2_reg_config = {
> .sr_rtcwk_shift = 5,
> .sr_rttwk_shift = SHDW_CFG_NOT_USED,
> },
> + .pmc = {
> + .mckr = 0x30,
> + },
> };
>
> static const struct reg_config sam9x60_reg_config = {
> @@ -263,6 +272,9 @@ static const struct reg_config sam9x60_reg_config = {
> .sr_rtcwk_shift = 5,
> .sr_rttwk_shift = 4,
> },
> + .pmc = {
> + .mckr = 0x28,
> + },
> };
>
> static const struct of_device_id at91_shdwc_of_match[] = {
Hi Sebastien,
I know you may busy, I just want to be sure that you didn't forgot this series.
Thank you,
Claudiu Beznea
On 20.12.2019 17:31, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> PMC master clock register offset is different b/w sam9x60 and
> other SoCs. Since there is a need of this register offset in
> shutdown procedure we need to have it per SoC. This is what
> this series does.
>
> Changes in v2:
> - do not use r5 as intermediary registers in at91_poweroff
>
> Claudiu Beznea (2):
> power: reset: at91-poweroff: introduce struct shdwc_reg_config
> power: reset: at91-poweroff: use proper master clock register offset
>
> drivers/power/reset/at91-sama5d2_shdwc.c | 72 +++++++++++++++++++++-----------
> 1 file changed, 47 insertions(+), 25 deletions(-)
>
> --
> 2.7.4
>
>
Hi
It wasn't lost, I just did not yet collect patches for the next
merge window. I queued the complete patchset to my for-next branch
now.
-- Sebastian
On Tue, Jan 14, 2020 at 10:34:55AM +0000, [email protected] wrote:
> Hi Sebastian,
>
> I know you may busy, I just want to be sure that you didn't forgot this series.
>
> Thank you,
> Claudiu Beznea
>
> On 20.12.2019 17:31, Claudiu Beznea wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > PMC master clock register offset is different b/w sam9x60 and
> > other SoCs. Since there is a need of this register offset in
> > shutdown procedure we need to have it per SoC. This is what
> > this series does.
> >
> > Changes in v2:
> > - do not use r5 as intermediary registers in at91_poweroff
> >
> > Claudiu Beznea (2):
> > power: reset: at91-poweroff: introduce struct shdwc_reg_config
> > power: reset: at91-poweroff: use proper master clock register offset
> >
> > drivers/power/reset/at91-sama5d2_shdwc.c | 72 +++++++++++++++++++++-----------
> > 1 file changed, 47 insertions(+), 25 deletions(-)
> >
> > --
> > 2.7.4
> >
> >